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      1 /* $NetBSD: pl050.c,v 1.2 2017/06/06 00:26:16 jmcneill Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 2017 Jared McNeill <jmcneill (at) invisible.ca>
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
     21  * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
     22  * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
     23  * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
     24  * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #include <sys/cdefs.h>
     30 __KERNEL_RCSID(0, "$NetBSD: pl050.c,v 1.2 2017/06/06 00:26:16 jmcneill Exp $");
     31 
     32 #include <sys/param.h>
     33 #include <sys/systm.h>
     34 #include <sys/device.h>
     35 #include <sys/kmem.h>
     36 #include <sys/bus.h>
     37 
     38 #include <dev/pckbport/pckbportvar.h>
     39 
     40 #include <dev/ic/pl050var.h>
     41 
     42 #define	KMICR		0x00
     43 #define	 KMIRXINTREN	__BIT(4)
     44 #define	 KMIEN		__BIT(2)
     45 #define	KMISTAT		0x04
     46 #define	 TXEMPTY	__BIT(6)
     47 #define	 RXFULL		__BIT(4)
     48 #define	KMIDATA		0x08
     49 #define	KMICLKDIV	0x0c
     50 #define	KMIIR		0x10
     51 #define	 KMIRXINTR	__BIT(0)
     52 
     53 #define	PLKMI_READ(sc, reg)		\
     54 	bus_space_read_4((sc)->sc_bst, (sc)->sc_bsh, (reg))
     55 #define	PLKMI_WRITE(sc, reg, val)	\
     56 	bus_space_write_4((sc)->sc_bst, (sc)->sc_bsh, (reg), (val))
     57 
     58 static int
     59 plkmi_wait(struct plkmi_softc *sc, uint32_t mask, bool set)
     60 {
     61 	int timeout = 1000;
     62 
     63 	const uint32_t val = (set ? mask : 0);
     64 
     65 	while (timeout-- > 0) {
     66 		const uint32_t stat = PLKMI_READ(sc, KMISTAT);
     67 		if ((stat & mask) == val)
     68 			return 0;
     69 		delay(10);
     70 	}
     71 
     72 	return ETIMEDOUT;
     73 }
     74 
     75 static int
     76 plkmi_xt_translation(void *priv, pckbport_slot_t port, int on)
     77 {
     78 	if (on)
     79 		return 0;
     80 	return 1;
     81 }
     82 
     83 static int
     84 plkmi_send_devcmd(void *priv, pckbport_slot_t slot, u_char byte)
     85 {
     86 	struct plkmi_softc * const sc = priv;
     87 
     88 	if (plkmi_wait(sc, TXEMPTY, true))
     89 		return 0;
     90 
     91 	PLKMI_WRITE(sc, KMIDATA, byte & 0xff);
     92 
     93 	return 1;
     94 }
     95 
     96 static int
     97 plkmi_poll_data1(void *priv, pckbport_slot_t slot)
     98 {
     99 	struct plkmi_softc * const sc = priv;
    100 
    101 	if (plkmi_wait(sc, RXFULL, true))
    102 		return -1;
    103 
    104 	return PLKMI_READ(sc, KMIDATA) & 0xff;
    105 }
    106 
    107 static void
    108 plkmi_slot_enable(void *priv, pckbport_slot_t slot, int on)
    109 {
    110 	struct plkmi_softc * const sc = priv;
    111 	uint32_t cr;
    112 
    113 	cr = PLKMI_READ(sc, KMICR);
    114 	if (on)
    115 		cr |= KMIEN;
    116 	else
    117 		cr &= ~KMIEN;
    118 	PLKMI_WRITE(sc, KMICR, cr);
    119 }
    120 
    121 static void
    122 plkmi_set_poll(void *priv, pckbport_slot_t slot, int on)
    123 {
    124 	struct plkmi_softc * const sc = priv;
    125 	uint32_t cr;
    126 
    127 	cr = PLKMI_READ(sc, KMICR);
    128 	if (on)
    129 		cr &= ~KMIRXINTREN;
    130 	else
    131 		cr |= KMIRXINTREN;
    132 	PLKMI_WRITE(sc, KMICR, cr);
    133 }
    134 
    135 static void
    136 plkmi_intr_establish(void *priv, pckbport_slot_t slot)
    137 {
    138 	/* XXX */
    139 	plkmi_set_poll(priv, slot, 0);
    140 }
    141 
    142 static struct pckbport_accessops plkmi_ops = {
    143 	.t_xt_translation = plkmi_xt_translation,
    144 	.t_send_devcmd = plkmi_send_devcmd,
    145 	.t_poll_data1 = plkmi_poll_data1,
    146 	.t_slot_enable = plkmi_slot_enable,
    147 	.t_set_poll = plkmi_set_poll,
    148 	.t_intr_establish = plkmi_intr_establish,
    149 };
    150 
    151 void
    152 plkmi_attach(struct plkmi_softc *sc)
    153 {
    154 	aprint_naive("\n");
    155 	aprint_normal(": PS2 controller\n");
    156 
    157 	sc->sc_pt = pckbport_attach(sc, &plkmi_ops);
    158 	sc->sc_slot = -1;
    159 
    160 	PLKMI_WRITE(sc, KMICR, KMIEN);
    161 
    162 	for (int slot = 0; slot < PCKBPORT_NSLOTS; slot++)
    163 		if (pckbport_attach_slot(sc->sc_dev, sc->sc_pt, slot)) {
    164 			sc->sc_slot = slot;
    165 			break;
    166 		}
    167 
    168 	if (sc->sc_slot == PCKBPORT_KBD_SLOT)
    169 		pckbport_cnattach(sc, &plkmi_ops, sc->sc_slot);
    170 }
    171 
    172 int
    173 plkmi_intr(void *priv)
    174 {
    175 	struct plkmi_softc * const sc = priv;
    176 	int handled = 0;
    177 
    178 	if (sc->sc_slot == -1)
    179 		return 0;
    180 
    181 	const uint32_t stat = PLKMI_READ(sc, KMISTAT);
    182 	if (stat & RXFULL) {
    183 		const uint32_t val = PLKMI_READ(sc, KMIDATA);
    184 		pckbportintr(sc->sc_pt, sc->sc_slot, val & 0xff);
    185 		handled = 1;
    186 	}
    187 
    188 	return handled;
    189 }
    190