etphy.c revision 1.4 1 /* $NetBSD: etphy.c,v 1.4 2019/03/25 09:29:08 msaitoh Exp $ */
2 /* $OpenBSD: etphy.c,v 1.4 2008/04/02 20:12:58 brad Exp $ */
3
4 /*
5 * Copyright (c) 2007 The DragonFly Project. All rights reserved.
6 *
7 * This code is derived from software contributed to The DragonFly Project
8 * by Sepherosa Ziehau <sepherosa (at) gmail.com>
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 *
14 * 1. Redistributions of source code must retain the above copyright
15 * notice, this list of conditions and the following disclaimer.
16 * 2. Redistributions in binary form must reproduce the above copyright
17 * notice, this list of conditions and the following disclaimer in
18 * the documentation and/or other materials provided with the
19 * distribution.
20 * 3. Neither the name of The DragonFly Project nor the names of its
21 * contributors may be used to endorse or promote products derived
22 * from this software without specific, prior written permission.
23 *
24 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
25 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
26 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
27 * FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE
28 * COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT,
29 * INCIDENTAL, SPECIAL, EXEMPLARY OR CONSEQUENTIAL DAMAGES (INCLUDING,
30 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
31 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
32 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
33 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT
34 * OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
35 * SUCH DAMAGE.
36 *
37 * $DragonFly: src/sys/dev/netif/mii_layer/truephy.c,v 1.1 2007/10/12 14:12:42 sephe Exp $
38 */
39
40 #include <sys/cdefs.h>
41 __KERNEL_RCSID(0, "$NetBSD: etphy.c,v 1.4 2019/03/25 09:29:08 msaitoh Exp $");
42
43 #include <sys/param.h>
44 #include <sys/systm.h>
45 #include <sys/kernel.h>
46 #include <sys/device.h>
47 #include <sys/socket.h>
48
49 #include <net/if.h>
50 #include <net/if_media.h>
51
52 #include <dev/mii/mii.h>
53 #include <dev/mii/miivar.h>
54 #include <dev/mii/miidevs.h>
55
56 #define ETPHY_INDEX 0x10 /* XXX reserved in DS */
57 #define ETPHY_INDEX_MAGIC 0x402
58 #define ETPHY_DATA 0x11 /* XXX reserved in DS */
59
60 #define ETPHY_CTRL 0x12
61 #define ETPHY_CTRL_DIAG 0x0004
62 #define ETPHY_CTRL_RSV1 0x0002 /* XXX reserved */
63 #define ETPHY_CTRL_RSV0 0x0001 /* XXX reserved */
64
65 #define ETPHY_CONF 0x16
66 #define ETPHY_CONF_TXFIFO_MASK 0x3000
67 #define ETPHY_CONF_TXFIFO_8 0x0000
68 #define ETPHY_CONF_TXFIFO_16 0x1000
69 #define ETPHY_CONF_TXFIFO_24 0x2000
70 #define ETPHY_CONF_TXFIFO_32 0x3000
71
72 #define ETPHY_SR 0x1a
73 #define ETPHY_SR_SPD_MASK 0x0300
74 #define ETPHY_SR_SPD_1000T 0x0200
75 #define ETPHY_SR_SPD_100TX 0x0100
76 #define ETPHY_SR_SPD_10T 0x0000
77 #define ETPHY_SR_FDX 0x0080
78
79
80 int etphy_service(struct mii_softc *, struct mii_data *, int);
81 void etphy_attach(device_t, device_t, void *);
82 int etphy_match(device_t, cfdata_t, void *);
83 void etphy_reset(struct mii_softc *);
84 void etphy_status(struct mii_softc *);
85
86 const struct mii_phy_funcs etphy_funcs = {
87 etphy_service, etphy_status, etphy_reset,
88 };
89
90 static const struct mii_phydesc etphys[] = {
91 MII_PHY_DESC(AGERE, ET1011),
92 MII_PHY_END,
93 };
94
95 CFATTACH_DECL_NEW(etphy, sizeof(struct mii_softc),
96 etphy_match, etphy_attach, mii_phy_detach, mii_phy_activate);
97
98 static const struct etphy_dsp {
99 uint16_t index;
100 uint16_t data;
101 } etphy_dspcode[] = {
102 { 0x880b, 0x0926 }, /* AfeIfCreg4B1000Msbs */
103 { 0x880c, 0x0926 }, /* AfeIfCreg4B100Msbs */
104 { 0x880d, 0x0926 }, /* AfeIfCreg4B10Msbs */
105
106 { 0x880e, 0xb4d3 }, /* AfeIfCreg4B1000Lsbs */
107 { 0x880f, 0xb4d3 }, /* AfeIfCreg4B100Lsbs */
108 { 0x8810, 0xb4d3 }, /* AfeIfCreg4B10Lsbs */
109
110 { 0x8805, 0xb03e }, /* AfeIfCreg3B1000Msbs */
111 { 0x8806, 0xb03e }, /* AfeIfCreg3B100Msbs */
112 { 0x8807, 0xff00 }, /* AfeIfCreg3B10Msbs */
113
114 { 0x8808, 0xe090 }, /* AfeIfCreg3B1000Lsbs */
115 { 0x8809, 0xe110 }, /* AfeIfCreg3B100Lsbs */
116 { 0x880a, 0x0000 }, /* AfeIfCreg3B10Lsbs */
117
118 { 0x300d, 1 }, /* DisableNorm */
119
120 { 0x280c, 0x0180 }, /* LinkHoldEnd */
121
122 { 0x1c21, 0x0002 }, /* AlphaM */
123
124 { 0x3821, 6 }, /* FfeLkgTx0 */
125 { 0x381d, 1 }, /* FfeLkg1g4 */
126 { 0x381e, 1 }, /* FfeLkg1g5 */
127 { 0x381f, 1 }, /* FfeLkg1g6 */
128 { 0x3820, 1 }, /* FfeLkg1g7 */
129
130 { 0x8402, 0x01f0 }, /* Btinact */
131 { 0x800e, 20 }, /* LftrainTime */
132 { 0x800f, 24 }, /* DvguardTime */
133 { 0x8010, 46 } /* IdlguardTime */
134 };
135
136 int
137 etphy_match(device_t parent, cfdata_t match, void *aux)
138 {
139 struct mii_attach_args *ma = aux;
140
141 if (mii_phy_match(ma, etphys) != NULL)
142 return 10;
143
144 return 0;
145 }
146
147 void
148 etphy_attach(device_t parent, device_t self, void *aux)
149 {
150 struct mii_softc *sc = device_private(self);
151 struct mii_attach_args *ma = aux;
152 struct mii_data *mii = ma->mii_data;
153 const struct mii_phydesc *mpd;
154
155 mpd = mii_phy_match(ma, etphys);
156 aprint_normal(": %s, rev. %d\n", mpd->mpd_name, MII_REV(ma->mii_id2));
157
158 sc->mii_dev = self;
159 sc->mii_inst = mii->mii_instance;
160 sc->mii_phy = ma->mii_phyno;
161 sc->mii_funcs = &etphy_funcs;
162 sc->mii_mpd_model = MII_MODEL(ma->mii_id2);
163 sc->mii_pdata = mii;
164 sc->mii_flags = ma->mii_flags;
165
166 sc->mii_flags |= MIIF_NOISOLATE | MIIF_NOLOOP;
167
168 PHY_RESET(sc);
169
170 PHY_READ(sc, MII_BMSR, &sc->mii_capabilities);
171 sc->mii_capabilities &= ma->mii_capmask;
172 if (sc->mii_capabilities & BMSR_EXTSTAT) {
173 PHY_READ(sc, MII_EXTSR, &sc->mii_extcapabilities);
174 /* No 1000baseT half-duplex support */
175 sc->mii_extcapabilities &= ~EXTSR_1000THDX;
176 }
177 aprint_normal_dev(self, "");
178 if ((sc->mii_capabilities & BMSR_MEDIAMASK) == 0)
179 aprint_error("no media present");
180 else
181 mii_phy_add_media(sc);
182 aprint_normal("\n");
183
184 if (!pmf_device_register(self, NULL, mii_phy_resume))
185 aprint_error_dev(self, "couldn't establish power handler\n");
186 }
187
188 int
189 etphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
190 {
191 struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
192 uint16_t bmcr;
193
194 switch (cmd) {
195 case MII_POLLSTAT:
196 /* If we're not polling our PHY instance, just return. */
197 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
198 return 0;
199 break;
200
201 case MII_MEDIACHG:
202 /*
203 * If the media indicates a different PHY instance,
204 * isolate ourselves.
205 */
206 if (IFM_INST(ife->ifm_media) != sc->mii_inst) {
207 PHY_READ(sc, MII_BMCR, &bmcr);
208 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_ISO);
209 return 0;
210 }
211
212 /* If the interface is not up, don't do anything. */
213 if ((mii->mii_ifp->if_flags & IFF_UP) == 0)
214 break;
215
216 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
217 PHY_READ(sc, MII_BMCR, &bmcr);
218 bmcr &= ~BMCR_AUTOEN;
219 PHY_WRITE(sc, MII_BMCR, bmcr);
220 PHY_WRITE(sc, MII_BMCR, bmcr | BMCR_PDOWN);
221 }
222
223 mii_phy_setmedia(sc);
224
225 if (IFM_SUBTYPE(ife->ifm_media) != IFM_AUTO) {
226 PHY_READ(sc, MII_BMCR, &bmcr);
227 bmcr &= ~BMCR_PDOWN;
228 PHY_WRITE(sc, MII_BMCR, bmcr);
229
230 if (IFM_SUBTYPE(ife->ifm_media) == IFM_1000_T) {
231 PHY_WRITE(sc, MII_BMCR,
232 bmcr | BMCR_AUTOEN | BMCR_STARTNEG);
233 }
234 }
235 break;
236
237 case MII_TICK:
238 /* If we're not currently selected, just return. */
239 if (IFM_INST(ife->ifm_media) != sc->mii_inst)
240 return 0;
241
242 if (mii_phy_tick(sc) == EJUSTRETURN)
243 return 0;
244 break;
245 }
246
247 /* Update the media status. */
248 mii_phy_status(sc);
249
250 /* Callback if something changed. */
251 mii_phy_update(sc, cmd);
252 return 0;
253 }
254
255 void
256 etphy_reset(struct mii_softc *sc)
257 {
258 uint16_t reg;
259 int i;
260
261 for (i = 0; i < 2; ++i) {
262 PHY_READ(sc, MII_PHYIDR1, ®);
263 PHY_READ(sc, MII_PHYIDR2, ®);
264
265 PHY_READ(sc, ETPHY_CTRL, ®);
266 PHY_WRITE(sc, ETPHY_CTRL,
267 ETPHY_CTRL_DIAG | ETPHY_CTRL_RSV1);
268
269 PHY_WRITE(sc, ETPHY_INDEX, ETPHY_INDEX_MAGIC);
270 PHY_READ(sc, ETPHY_DATA, ®);
271
272 PHY_WRITE(sc, ETPHY_CTRL, ETPHY_CTRL_RSV1);
273 }
274
275 PHY_READ(sc, MII_BMCR, ®);
276 PHY_READ(sc, ETPHY_CTRL, ®);
277 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_PDOWN | BMCR_S1000);
278 PHY_WRITE(sc, ETPHY_CTRL,
279 ETPHY_CTRL_DIAG | ETPHY_CTRL_RSV1 | ETPHY_CTRL_RSV0);
280
281 #define N(arr) (int)(sizeof(arr) / sizeof(arr[0]))
282
283 for (i = 0; i < N(etphy_dspcode); ++i) {
284 const struct etphy_dsp *dsp = &etphy_dspcode[i];
285
286 PHY_WRITE(sc, ETPHY_INDEX, dsp->index);
287 PHY_WRITE(sc, ETPHY_DATA, dsp->data);
288
289 PHY_WRITE(sc, ETPHY_INDEX, dsp->index);
290 PHY_READ(sc, ETPHY_DATA, ®);
291 }
292
293 #undef N
294
295 PHY_READ(sc, MII_BMCR, ®);
296 PHY_READ(sc, ETPHY_CTRL, ®);
297 PHY_WRITE(sc, MII_BMCR, BMCR_AUTOEN | BMCR_S1000);
298 PHY_WRITE(sc, ETPHY_CTRL, ETPHY_CTRL_RSV1);
299
300 mii_phy_reset(sc);
301 }
302
303 void
304 etphy_status(struct mii_softc *sc)
305 {
306 struct mii_data *mii = sc->mii_pdata;
307 uint16_t bmsr, bmcr, sr;
308
309 mii->mii_media_status = IFM_AVALID;
310 mii->mii_media_active = IFM_ETHER;
311
312 PHY_READ(sc, ETPHY_SR, &sr);
313 PHY_READ(sc, MII_BMCR, &bmcr);
314
315 PHY_READ(sc, MII_BMSR, &bmsr);
316 PHY_READ(sc, MII_BMSR, &bmsr);
317 if (bmsr & BMSR_LINK)
318 mii->mii_media_status |= IFM_ACTIVE;
319
320 if (bmcr & BMCR_AUTOEN) {
321 if ((bmsr & BMSR_ACOMP) == 0) {
322 mii->mii_media_active |= IFM_NONE;
323 return;
324 }
325 }
326
327 switch (sr & ETPHY_SR_SPD_MASK) {
328 case ETPHY_SR_SPD_1000T:
329 mii->mii_media_active |= IFM_1000_T;
330 break;
331 case ETPHY_SR_SPD_100TX:
332 mii->mii_media_active |= IFM_100_TX;
333 break;
334 case ETPHY_SR_SPD_10T:
335 mii->mii_media_active |= IFM_10_T;
336 break;
337 default:
338 mii->mii_media_active |= IFM_NONE;
339 return;
340 }
341
342 if (sr & ETPHY_SR_FDX)
343 mii->mii_media_active |= IFM_FDX;
344 else
345 mii->mii_media_active |= IFM_HDX;
346 }
347