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      1 /*	$NetBSD: agp_amd.c,v 1.22 2019/11/10 21:16:36 chs Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2000 Doug Rabson
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
     17  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     18  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     19  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
     20  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  *
     28  *	$FreeBSD: src/sys/pci/agp_amd.c,v 1.6 2001/07/05 21:28:46 jhb Exp $
     29  */
     30 
     31 #include <sys/cdefs.h>
     32 __KERNEL_RCSID(0, "$NetBSD: agp_amd.c,v 1.22 2019/11/10 21:16:36 chs Exp $");
     33 
     34 #include <sys/param.h>
     35 #include <sys/systm.h>
     36 #include <sys/malloc.h>
     37 #include <sys/kernel.h>
     38 #include <sys/proc.h>
     39 #include <sys/conf.h>
     40 #include <sys/device.h>
     41 #include <sys/agpio.h>
     42 
     43 #include <dev/pci/pcivar.h>
     44 #include <dev/pci/pcireg.h>
     45 #include <dev/pci/agpvar.h>
     46 #include <dev/pci/agpreg.h>
     47 
     48 #include <dev/pci/pcidevs.h>
     49 
     50 #define READ2(off)	bus_space_read_2(asc->iot, asc->ioh, off)
     51 #define READ4(off)	bus_space_read_4(asc->iot, asc->ioh, off)
     52 #define WRITE2(off,v)	bus_space_write_2(asc->iot, asc->ioh, off, v)
     53 #define WRITE4(off,v)	bus_space_write_4(asc->iot, asc->ioh, off, v)
     54 
     55 struct agp_amd_gatt {
     56 	bus_dmamap_t	ag_dmamap;
     57 	bus_dma_segment_t ag_dmaseg;
     58 	int		ag_nseg;
     59 	u_int32_t	ag_entries;
     60 	u_int32_t      *ag_vdir;	/* virtual address of page dir */
     61 	bus_addr_t	ag_pdir;	/* bus address of page dir */
     62 	u_int32_t      *ag_virtual;	/* virtual address of gatt */
     63 	bus_addr_t	ag_physical;	/* bus address of gatt */
     64 	size_t		ag_size;
     65 };
     66 
     67 struct agp_amd_softc {
     68 	u_int32_t	initial_aperture; /* aperture size at startup */
     69 	struct agp_amd_gatt *gatt;
     70 	bus_space_handle_t ioh;
     71 	bus_space_tag_t iot;
     72 };
     73 
     74 static u_int32_t agp_amd_get_aperture(struct agp_softc *);
     75 static int agp_amd_set_aperture(struct agp_softc *, u_int32_t);
     76 static int agp_amd_bind_page(struct agp_softc *, off_t, bus_addr_t);
     77 static int agp_amd_unbind_page(struct agp_softc *, off_t);
     78 static void agp_amd_flush_tlb(struct agp_softc *);
     79 
     80 
     81 static struct agp_methods agp_amd_methods = {
     82 	agp_amd_get_aperture,
     83 	agp_amd_set_aperture,
     84 	agp_amd_bind_page,
     85 	agp_amd_unbind_page,
     86 	agp_amd_flush_tlb,
     87 	agp_generic_enable,
     88 	agp_generic_alloc_memory,
     89 	agp_generic_free_memory,
     90 	agp_generic_bind_memory,
     91 	agp_generic_unbind_memory,
     92 };
     93 
     94 
     95 static struct agp_amd_gatt *
     96 agp_amd_alloc_gatt(struct agp_softc *sc)
     97 {
     98 	u_int32_t apsize = AGP_GET_APERTURE(sc);
     99 	u_int32_t entries = apsize >> AGP_PAGE_SHIFT;
    100 	struct agp_amd_gatt *gatt;
    101 	int i, npages;
    102 	void *vdir;
    103 
    104 	gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_WAITOK);
    105 
    106 	if (agp_alloc_dmamem(sc->as_dmat,
    107 	    AGP_PAGE_SIZE + entries * sizeof(u_int32_t), 0,
    108 	    &gatt->ag_dmamap, &vdir, &gatt->ag_pdir,
    109 	    &gatt->ag_dmaseg, 1, &gatt->ag_nseg) != 0) {
    110 		printf("failed to allocate GATT\n");
    111 		free(gatt, M_AGP);
    112 		return NULL;
    113 	}
    114 
    115 	gatt->ag_vdir = (u_int32_t *)vdir;
    116 	gatt->ag_entries = entries;
    117 	gatt->ag_virtual = (u_int32_t *)((char *)vdir + AGP_PAGE_SIZE);
    118 	gatt->ag_physical = gatt->ag_pdir + AGP_PAGE_SIZE;
    119 	gatt->ag_size = AGP_PAGE_SIZE + entries * sizeof(u_int32_t);
    120 
    121 	memset(gatt->ag_vdir, 0, AGP_PAGE_SIZE);
    122 	memset(gatt->ag_virtual, 0, entries * sizeof(u_int32_t));
    123 
    124 	/*
    125 	 * Map the pages of the GATT into the page directory.
    126 	 */
    127 	npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1)
    128 		  >> AGP_PAGE_SHIFT);
    129 
    130 	for (i = 0; i < npages; i++)
    131 		gatt->ag_vdir[i] = (gatt->ag_physical + i * AGP_PAGE_SIZE) | 1;
    132 
    133 	/*
    134 	 * Make sure the chipset can see everything.
    135 	 */
    136 	agp_flush_cache();
    137 
    138 	return gatt;
    139 }
    140 
    141 #if 0
    142 static void
    143 agp_amd_free_gatt(struct agp_softc *sc, struct agp_amd_gatt *gatt)
    144 {
    145 	agp_free_dmamem(sc->as_dmat, gatt->ag_size,
    146 	    gatt->ag_dmamap, (void *)gatt->ag_virtual, &gatt->ag_dmaseg,
    147 	    gatt->ag_nseg);
    148 	free(gatt, M_AGP);
    149 }
    150 #endif
    151 
    152 int
    153 agp_amd_match(const struct pci_attach_args *pa)
    154 {
    155 
    156 	switch (PCI_PRODUCT(pa->pa_id)) {
    157 	case PCI_PRODUCT_AMD_SC751_SC:
    158 	case PCI_PRODUCT_AMD_SC761_SC:
    159 	case PCI_PRODUCT_AMD_SC762_NB:
    160 		return 1;
    161 	}
    162 
    163 	return 0;
    164 }
    165 
    166 int
    167 agp_amd_attach(device_t parent, device_t self, void *aux)
    168 {
    169 	struct agp_softc *sc = device_private(self);
    170 	struct agp_amd_softc *asc;
    171 	struct pci_attach_args *pa = aux;
    172 	struct agp_amd_gatt *gatt;
    173 	pcireg_t reg;
    174 	int error;
    175 
    176 	asc = malloc(sizeof *asc, M_AGP, M_WAITOK|M_ZERO);
    177 
    178 	error = pci_mapreg_map(pa, AGP_AMD751_REGISTERS, PCI_MAPREG_TYPE_MEM, 0,
    179 	    &asc->iot, &asc->ioh, NULL, NULL);
    180 	if (error != 0) {
    181 		aprint_error(": can't map AGP registers\n");
    182 		agp_generic_detach(sc);
    183 		free(asc, M_AGP);
    184 		return error;
    185 	}
    186 
    187 	if (agp_map_aperture(pa, sc, AGP_APBASE) != 0) {
    188 		aprint_error(": can't map aperture\n");
    189 		agp_generic_detach(sc);
    190 		free(asc, M_AGP);
    191 		return ENXIO;
    192 	}
    193 	pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
    194 	    NULL);
    195 	sc->as_methods = &agp_amd_methods;
    196 	sc->as_chipc = asc;
    197 	asc->initial_aperture = AGP_GET_APERTURE(sc);
    198 
    199 	for (;;) {
    200 		gatt = agp_amd_alloc_gatt(sc);
    201 		if (gatt)
    202 			break;
    203 
    204 		/*
    205 		 * Probably contigmalloc failure. Try reducing the
    206 		 * aperture so that the gatt size reduces.
    207 		 */
    208 		if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
    209 			aprint_error(": can't set aperture\n");
    210 			return ENOMEM;
    211 		}
    212 	}
    213 	asc->gatt = gatt;
    214 
    215 	/* Install the gatt. */
    216 	WRITE4(AGP_AMD751_ATTBASE, gatt->ag_physical);
    217 
    218 	/* Enable synchronisation between host and agp. */
    219 	reg = pci_conf_read(pa->pa_pc, pa->pa_tag, AGP_AMD751_MODECTRL);
    220 	reg &= ~0x00ff00ff;
    221 	reg |= (AGP_AMD751_MODECTRL_SYNEN) | (AGP_AMD751_MODECTRL2_GPDCE << 16);
    222 	pci_conf_write(pa->pa_pc, pa->pa_tag, AGP_AMD751_MODECTRL, reg);
    223 	/* Enable the TLB and flush */
    224 	WRITE2(AGP_AMD751_STATUS,
    225 	       READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE);
    226 	AGP_FLUSH_TLB(sc);
    227 
    228 	return 0;
    229 }
    230 
    231 #if 0
    232 static int
    233 agp_amd_detach(struct agp_softc *sc)
    234 {
    235 	pcireg_t reg;
    236 	struct agp_amd_softc *asc = sc->as_chipc;
    237 
    238 	/* Disable the TLB.. */
    239 	WRITE2(AGP_AMD751_STATUS,
    240 	       READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE);
    241 
    242 	/* Disable host-agp sync */
    243 	reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_MODECTRL);
    244 	reg &= 0xffffff00;
    245 	pci_conf_write(sc->as_pc, sc->as_tag, AGP_AMD751_MODECTRL, reg);
    246 
    247 	/* Clear the GATT base */
    248 	WRITE4(AGP_AMD751_ATTBASE, 0);
    249 
    250 	/* Put the aperture back the way it started. */
    251 	AGP_SET_APERTURE(sc, asc->initial_aperture);
    252 
    253 	agp_amd_free_gatt(sc, asc->gatt);
    254 
    255 	/* XXXfvdl no pci_mapreg_unmap */
    256 
    257 	return 0;
    258 }
    259 #endif
    260 
    261 static u_int32_t
    262 agp_amd_get_aperture(struct agp_softc *sc)
    263 {
    264 	int vas;
    265 
    266 	vas = (pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL) & 0x06);
    267 	vas >>= 1;
    268 	/*
    269 	 * The aperture size is equal to 32M<<vas.
    270 	 */
    271 	return (32*1024*1024) << vas;
    272 }
    273 
    274 static int
    275 agp_amd_set_aperture(struct agp_softc *sc, u_int32_t aperture)
    276 {
    277 	int vas;
    278 	pcireg_t reg;
    279 
    280 	/*
    281 	 * Check for a power of two and make sure its within the
    282 	 * programmable range.
    283 	 */
    284 	if (aperture & (aperture - 1)
    285 	    || aperture < 32*1024*1024
    286 	    || aperture > 2U*1024*1024*1024)
    287 		return EINVAL;
    288 
    289 	vas = ffs(aperture / 32*1024*1024) - 1;
    290 
    291 	reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL);
    292 	reg = (reg & ~0x06) | (vas << 1);
    293 	pci_conf_write(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL, reg);
    294 
    295 	return 0;
    296 }
    297 
    298 static int
    299 agp_amd_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical)
    300 {
    301 	struct agp_amd_softc *asc = sc->as_chipc;
    302 
    303 	if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
    304 		return EINVAL;
    305 
    306 	asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1;
    307 	return 0;
    308 }
    309 
    310 static int
    311 agp_amd_unbind_page(struct agp_softc *sc, off_t offset)
    312 {
    313 	struct agp_amd_softc *asc = sc->as_chipc;
    314 
    315 	if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
    316 		return EINVAL;
    317 
    318 	asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
    319 	return 0;
    320 }
    321 
    322 static void
    323 agp_amd_flush_tlb(struct agp_softc *sc)
    324 {
    325 	struct agp_amd_softc *asc = sc->as_chipc;
    326 
    327 	/* Set the cache invalidate bit and wait for the chipset to clear */
    328 	WRITE4(AGP_AMD751_TLBCTRL, 1);
    329 	do {
    330 		DELAY(1);
    331 	} while (READ4(AGP_AMD751_TLBCTRL));
    332 }
    333