agp_amd.c revision 1.3.2.2 1 1.3.2.2 nathanw /* $NetBSD: agp_amd.c,v 1.3.2.2 2001/09/21 22:35:52 nathanw Exp $ */
2 1.3.2.2 nathanw
3 1.3.2.2 nathanw /*-
4 1.3.2.2 nathanw * Copyright (c) 2000 Doug Rabson
5 1.3.2.2 nathanw * All rights reserved.
6 1.3.2.2 nathanw *
7 1.3.2.2 nathanw * Redistribution and use in source and binary forms, with or without
8 1.3.2.2 nathanw * modification, are permitted provided that the following conditions
9 1.3.2.2 nathanw * are met:
10 1.3.2.2 nathanw * 1. Redistributions of source code must retain the above copyright
11 1.3.2.2 nathanw * notice, this list of conditions and the following disclaimer.
12 1.3.2.2 nathanw * 2. Redistributions in binary form must reproduce the above copyright
13 1.3.2.2 nathanw * notice, this list of conditions and the following disclaimer in the
14 1.3.2.2 nathanw * documentation and/or other materials provided with the distribution.
15 1.3.2.2 nathanw *
16 1.3.2.2 nathanw * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
17 1.3.2.2 nathanw * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
18 1.3.2.2 nathanw * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
19 1.3.2.2 nathanw * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
20 1.3.2.2 nathanw * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
21 1.3.2.2 nathanw * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
22 1.3.2.2 nathanw * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
23 1.3.2.2 nathanw * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
24 1.3.2.2 nathanw * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
25 1.3.2.2 nathanw * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
26 1.3.2.2 nathanw * SUCH DAMAGE.
27 1.3.2.2 nathanw *
28 1.3.2.2 nathanw * $FreeBSD: src/sys/pci/agp_amd.c,v 1.6 2001/07/05 21:28:46 jhb Exp $
29 1.3.2.2 nathanw */
30 1.3.2.2 nathanw
31 1.3.2.2 nathanw #include <sys/param.h>
32 1.3.2.2 nathanw #include <sys/systm.h>
33 1.3.2.2 nathanw #include <sys/malloc.h>
34 1.3.2.2 nathanw #include <sys/kernel.h>
35 1.3.2.2 nathanw #include <sys/lock.h>
36 1.3.2.2 nathanw #include <sys/proc.h>
37 1.3.2.2 nathanw #include <sys/conf.h>
38 1.3.2.2 nathanw #include <sys/device.h>
39 1.3.2.2 nathanw #include <sys/agpio.h>
40 1.3.2.2 nathanw
41 1.3.2.2 nathanw #include <uvm/uvm_extern.h>
42 1.3.2.2 nathanw
43 1.3.2.2 nathanw #include <dev/pci/pcivar.h>
44 1.3.2.2 nathanw #include <dev/pci/pcireg.h>
45 1.3.2.2 nathanw #include <dev/pci/agpvar.h>
46 1.3.2.2 nathanw #include <dev/pci/agpreg.h>
47 1.3.2.2 nathanw
48 1.3.2.2 nathanw #include <dev/pci/pcidevs.h>
49 1.3.2.2 nathanw
50 1.3.2.2 nathanw #define READ2(off) bus_space_read_2(asc->iot, asc->ioh, off)
51 1.3.2.2 nathanw #define READ4(off) bus_space_read_4(asc->iot, asc->ioh, off)
52 1.3.2.2 nathanw #define WRITE2(off,v) bus_space_write_2(asc->iot, asc->ioh, off, v)
53 1.3.2.2 nathanw #define WRITE4(off,v) bus_space_write_4(asc->iot, asc->ioh, off, v)
54 1.3.2.2 nathanw
55 1.3.2.2 nathanw struct agp_amd_gatt {
56 1.3.2.2 nathanw bus_dmamap_t ag_dmamap;
57 1.3.2.2 nathanw bus_dma_segment_t ag_dmaseg;
58 1.3.2.2 nathanw int ag_nseg;
59 1.3.2.2 nathanw u_int32_t ag_entries;
60 1.3.2.2 nathanw u_int32_t *ag_vdir; /* virtual address of page dir */
61 1.3.2.2 nathanw bus_addr_t ag_pdir; /* bus address of page dir */
62 1.3.2.2 nathanw u_int32_t *ag_virtual; /* virtual address of gatt */
63 1.3.2.2 nathanw bus_addr_t ag_physical; /* bus address of gatt */
64 1.3.2.2 nathanw size_t ag_size;
65 1.3.2.2 nathanw };
66 1.3.2.2 nathanw
67 1.3.2.2 nathanw struct agp_amd_softc {
68 1.3.2.2 nathanw u_int32_t initial_aperture; /* aperture size at startup */
69 1.3.2.2 nathanw struct agp_amd_gatt *gatt;
70 1.3.2.2 nathanw bus_space_handle_t ioh;
71 1.3.2.2 nathanw bus_space_tag_t iot;
72 1.3.2.2 nathanw };
73 1.3.2.2 nathanw
74 1.3.2.2 nathanw static u_int32_t agp_amd_get_aperture(struct agp_softc *);
75 1.3.2.2 nathanw static int agp_amd_set_aperture(struct agp_softc *, u_int32_t);
76 1.3.2.2 nathanw static int agp_amd_bind_page(struct agp_softc *, off_t, bus_addr_t);
77 1.3.2.2 nathanw static int agp_amd_unbind_page(struct agp_softc *, off_t);
78 1.3.2.2 nathanw static void agp_amd_flush_tlb(struct agp_softc *);
79 1.3.2.2 nathanw
80 1.3.2.2 nathanw
81 1.3.2.2 nathanw struct agp_methods agp_amd_methods = {
82 1.3.2.2 nathanw agp_amd_get_aperture,
83 1.3.2.2 nathanw agp_amd_set_aperture,
84 1.3.2.2 nathanw agp_amd_bind_page,
85 1.3.2.2 nathanw agp_amd_unbind_page,
86 1.3.2.2 nathanw agp_amd_flush_tlb,
87 1.3.2.2 nathanw agp_generic_enable,
88 1.3.2.2 nathanw agp_generic_alloc_memory,
89 1.3.2.2 nathanw agp_generic_free_memory,
90 1.3.2.2 nathanw agp_generic_bind_memory,
91 1.3.2.2 nathanw agp_generic_unbind_memory,
92 1.3.2.2 nathanw };
93 1.3.2.2 nathanw
94 1.3.2.2 nathanw
95 1.3.2.2 nathanw static struct agp_amd_gatt *
96 1.3.2.2 nathanw agp_amd_alloc_gatt(struct agp_softc *sc)
97 1.3.2.2 nathanw {
98 1.3.2.2 nathanw u_int32_t apsize = AGP_GET_APERTURE(sc);
99 1.3.2.2 nathanw u_int32_t entries = apsize >> AGP_PAGE_SHIFT;
100 1.3.2.2 nathanw struct agp_amd_gatt *gatt;
101 1.3.2.2 nathanw int i, npages;
102 1.3.2.2 nathanw
103 1.3.2.2 nathanw gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT);
104 1.3.2.2 nathanw if (!gatt)
105 1.3.2.2 nathanw return 0;
106 1.3.2.2 nathanw
107 1.3.2.2 nathanw if (agp_alloc_dmamem(sc->as_dmat,
108 1.3.2.2 nathanw AGP_PAGE_SIZE + entries * sizeof(u_int32_t), 0,
109 1.3.2.2 nathanw &gatt->ag_dmamap, (caddr_t *)&gatt->ag_vdir, &gatt->ag_pdir,
110 1.3.2.2 nathanw &gatt->ag_dmaseg, 1, &gatt->ag_nseg) != 0) {
111 1.3.2.2 nathanw printf("failed to allocate GATT\n");
112 1.3.2.2 nathanw return NULL;
113 1.3.2.2 nathanw }
114 1.3.2.2 nathanw
115 1.3.2.2 nathanw gatt->ag_entries = entries;
116 1.3.2.2 nathanw gatt->ag_virtual = gatt->ag_vdir + AGP_PAGE_SIZE;
117 1.3.2.2 nathanw gatt->ag_physical = gatt->ag_pdir + AGP_PAGE_SIZE;
118 1.3.2.2 nathanw gatt->ag_size = AGP_PAGE_SIZE + entries * sizeof(u_int32_t);
119 1.3.2.2 nathanw
120 1.3.2.2 nathanw memset(gatt->ag_vdir, 0, AGP_PAGE_SIZE);
121 1.3.2.2 nathanw memset(gatt->ag_virtual, 0, entries * sizeof(u_int32_t));
122 1.3.2.2 nathanw
123 1.3.2.2 nathanw /*
124 1.3.2.2 nathanw * Map the pages of the GATT into the page directory.
125 1.3.2.2 nathanw */
126 1.3.2.2 nathanw npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1)
127 1.3.2.2 nathanw >> AGP_PAGE_SHIFT);
128 1.3.2.2 nathanw
129 1.3.2.2 nathanw for (i = 0; i < npages; i++)
130 1.3.2.2 nathanw gatt->ag_vdir[i] = (gatt->ag_physical + i * AGP_PAGE_SIZE) | 1;
131 1.3.2.2 nathanw
132 1.3.2.2 nathanw /*
133 1.3.2.2 nathanw * Make sure the chipset can see everything.
134 1.3.2.2 nathanw */
135 1.3.2.2 nathanw agp_flush_cache();
136 1.3.2.2 nathanw
137 1.3.2.2 nathanw return gatt;
138 1.3.2.2 nathanw }
139 1.3.2.2 nathanw
140 1.3.2.2 nathanw #if 0
141 1.3.2.2 nathanw static void
142 1.3.2.2 nathanw agp_amd_free_gatt(struct agp_softc *sc, struct agp_amd_gatt *gatt)
143 1.3.2.2 nathanw {
144 1.3.2.2 nathanw agp_free_dmamem(sc->as_dmat, gatt->ag_size,
145 1.3.2.2 nathanw gatt->ag_dmamap, (caddr_t)gatt->ag_virtual, &gatt->ag_dmaseg,
146 1.3.2.2 nathanw gatt->ag_nseg);
147 1.3.2.2 nathanw free(gatt, M_AGP);
148 1.3.2.2 nathanw }
149 1.3.2.2 nathanw #endif
150 1.3.2.2 nathanw
151 1.3.2.2 nathanw int
152 1.3.2.2 nathanw agp_amd_match(const struct pci_attach_args *pa)
153 1.3.2.2 nathanw {
154 1.3.2.2 nathanw
155 1.3.2.2 nathanw switch (PCI_PRODUCT(pa->pa_id)) {
156 1.3.2.2 nathanw case PCI_PRODUCT_AMD_SC751_SC:
157 1.3.2.2 nathanw return 1;
158 1.3.2.2 nathanw }
159 1.3.2.2 nathanw
160 1.3.2.2 nathanw return 0;
161 1.3.2.2 nathanw }
162 1.3.2.2 nathanw
163 1.3.2.2 nathanw int
164 1.3.2.2 nathanw agp_amd_attach(struct device *parent, struct device *self, void *aux)
165 1.3.2.2 nathanw {
166 1.3.2.2 nathanw struct agp_softc *sc = (void *)self;
167 1.3.2.2 nathanw struct agp_amd_softc *asc;
168 1.3.2.2 nathanw struct pci_attach_args *pa = aux;
169 1.3.2.2 nathanw struct agp_amd_gatt *gatt;
170 1.3.2.2 nathanw pcireg_t reg;
171 1.3.2.2 nathanw int error;
172 1.3.2.2 nathanw
173 1.3.2.2 nathanw asc = malloc(sizeof *asc, M_AGP, M_NOWAIT);
174 1.3.2.2 nathanw if (asc == NULL) {
175 1.3.2.2 nathanw printf(": can't allocate softc\n");
176 1.3.2.2 nathanw /* agp_generic_detach(sc) */
177 1.3.2.2 nathanw return ENOMEM;
178 1.3.2.2 nathanw }
179 1.3.2.2 nathanw memset(asc, 0, sizeof *asc);
180 1.3.2.2 nathanw
181 1.3.2.2 nathanw error = pci_mapreg_map(pa, AGP_AMD751_REGISTERS, PCI_MAPREG_TYPE_MEM, 0,
182 1.3.2.2 nathanw &asc->iot, &asc->ioh, NULL, NULL);
183 1.3.2.2 nathanw if (error != 0) {
184 1.3.2.2 nathanw printf(": can't map AGP registers\n");
185 1.3.2.2 nathanw agp_generic_detach(sc);
186 1.3.2.2 nathanw return error;
187 1.3.2.2 nathanw }
188 1.3.2.2 nathanw
189 1.3.2.2 nathanw if (agp_map_aperture(pa, sc) != 0) {
190 1.3.2.2 nathanw printf(": can't map aperture\n");
191 1.3.2.2 nathanw agp_generic_detach(sc);
192 1.3.2.2 nathanw free(asc, M_AGP);
193 1.3.2.2 nathanw return ENXIO;
194 1.3.2.2 nathanw }
195 1.3.2.2 nathanw pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
196 1.3.2.2 nathanw NULL);
197 1.3.2.2 nathanw sc->as_methods = &agp_amd_methods;
198 1.3.2.2 nathanw sc->as_chipc = asc;
199 1.3.2.2 nathanw asc->initial_aperture = AGP_GET_APERTURE(sc);
200 1.3.2.2 nathanw
201 1.3.2.2 nathanw for (;;) {
202 1.3.2.2 nathanw gatt = agp_amd_alloc_gatt(sc);
203 1.3.2.2 nathanw if (gatt)
204 1.3.2.2 nathanw break;
205 1.3.2.2 nathanw
206 1.3.2.2 nathanw /*
207 1.3.2.2 nathanw * Probably contigmalloc failure. Try reducing the
208 1.3.2.2 nathanw * aperture so that the gatt size reduces.
209 1.3.2.2 nathanw */
210 1.3.2.2 nathanw if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
211 1.3.2.2 nathanw printf(": can't set aperture\n");
212 1.3.2.2 nathanw return ENOMEM;
213 1.3.2.2 nathanw }
214 1.3.2.2 nathanw }
215 1.3.2.2 nathanw asc->gatt = gatt;
216 1.3.2.2 nathanw
217 1.3.2.2 nathanw /* Install the gatt. */
218 1.3.2.2 nathanw WRITE4(AGP_AMD751_ATTBASE, gatt->ag_physical);
219 1.3.2.2 nathanw
220 1.3.2.2 nathanw /* Enable synchronisation between host and agp. */
221 1.3.2.2 nathanw reg = pci_conf_read(pa->pa_pc, pa->pa_tag, AGP_AMD751_MODECTRL);
222 1.3.2.2 nathanw reg &= ~0x00ff00ff;
223 1.3.2.2 nathanw reg |= (AGP_AMD751_MODECTRL_SYNEN) | (AGP_AMD751_MODECTRL2_GPDCE << 16);
224 1.3.2.2 nathanw pci_conf_write(pa->pa_pc, pa->pa_tag, AGP_AMD751_MODECTRL, reg);
225 1.3.2.2 nathanw /* Enable the TLB and flush */
226 1.3.2.2 nathanw WRITE2(AGP_AMD751_STATUS,
227 1.3.2.2 nathanw READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE);
228 1.3.2.2 nathanw AGP_FLUSH_TLB(sc);
229 1.3.2.2 nathanw
230 1.3.2.2 nathanw return 0;
231 1.3.2.2 nathanw }
232 1.3.2.2 nathanw
233 1.3.2.2 nathanw #if 0
234 1.3.2.2 nathanw static int
235 1.3.2.2 nathanw agp_amd_detach(struct agp_softc *sc)
236 1.3.2.2 nathanw {
237 1.3.2.2 nathanw pcireg_t reg;
238 1.3.2.2 nathanw struct agp_amd_softc *asc = sc->as_chipc;
239 1.3.2.2 nathanw
240 1.3.2.2 nathanw /* Disable the TLB.. */
241 1.3.2.2 nathanw WRITE2(AGP_AMD751_STATUS,
242 1.3.2.2 nathanw READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE);
243 1.3.2.2 nathanw
244 1.3.2.2 nathanw /* Disable host-agp sync */
245 1.3.2.2 nathanw reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_MODECTRL);
246 1.3.2.2 nathanw reg &= 0xffffff00;
247 1.3.2.2 nathanw pci_conf_write(sc->as_pc, sc->as_tag, AGP_AMD751_MODECTRL, reg);
248 1.3.2.2 nathanw
249 1.3.2.2 nathanw /* Clear the GATT base */
250 1.3.2.2 nathanw WRITE4(AGP_AMD751_ATTBASE, 0);
251 1.3.2.2 nathanw
252 1.3.2.2 nathanw /* Put the aperture back the way it started. */
253 1.3.2.2 nathanw AGP_SET_APERTURE(sc, asc->initial_aperture);
254 1.3.2.2 nathanw
255 1.3.2.2 nathanw agp_amd_free_gatt(sc, asc->gatt);
256 1.3.2.2 nathanw
257 1.3.2.2 nathanw /* XXXfvdl no pci_mapreg_unmap */
258 1.3.2.2 nathanw
259 1.3.2.2 nathanw return 0;
260 1.3.2.2 nathanw }
261 1.3.2.2 nathanw #endif
262 1.3.2.2 nathanw
263 1.3.2.2 nathanw static u_int32_t
264 1.3.2.2 nathanw agp_amd_get_aperture(struct agp_softc *sc)
265 1.3.2.2 nathanw {
266 1.3.2.2 nathanw int vas;
267 1.3.2.2 nathanw
268 1.3.2.2 nathanw vas = (pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL) & 0x06);
269 1.3.2.2 nathanw vas >>= 1;
270 1.3.2.2 nathanw /*
271 1.3.2.2 nathanw * The aperture size is equal to 32M<<vas.
272 1.3.2.2 nathanw */
273 1.3.2.2 nathanw return (32*1024*1024) << vas;
274 1.3.2.2 nathanw }
275 1.3.2.2 nathanw
276 1.3.2.2 nathanw static int
277 1.3.2.2 nathanw agp_amd_set_aperture(struct agp_softc *sc, u_int32_t aperture)
278 1.3.2.2 nathanw {
279 1.3.2.2 nathanw int vas;
280 1.3.2.2 nathanw pcireg_t reg;
281 1.3.2.2 nathanw
282 1.3.2.2 nathanw /*
283 1.3.2.2 nathanw * Check for a power of two and make sure its within the
284 1.3.2.2 nathanw * programmable range.
285 1.3.2.2 nathanw */
286 1.3.2.2 nathanw if (aperture & (aperture - 1)
287 1.3.2.2 nathanw || aperture < 32*1024*1024
288 1.3.2.2 nathanw || aperture > 2U*1024*1024*1024)
289 1.3.2.2 nathanw return EINVAL;
290 1.3.2.2 nathanw
291 1.3.2.2 nathanw vas = ffs(aperture / 32*1024*1024) - 1;
292 1.3.2.2 nathanw
293 1.3.2.2 nathanw reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL);
294 1.3.2.2 nathanw reg = (reg & ~0x06) | (vas << 1);
295 1.3.2.2 nathanw pci_conf_write(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL, reg);
296 1.3.2.2 nathanw
297 1.3.2.2 nathanw return 0;
298 1.3.2.2 nathanw }
299 1.3.2.2 nathanw
300 1.3.2.2 nathanw static int
301 1.3.2.2 nathanw agp_amd_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical)
302 1.3.2.2 nathanw {
303 1.3.2.2 nathanw struct agp_amd_softc *asc = sc->as_chipc;
304 1.3.2.2 nathanw
305 1.3.2.2 nathanw if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
306 1.3.2.2 nathanw return EINVAL;
307 1.3.2.2 nathanw
308 1.3.2.2 nathanw asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1;
309 1.3.2.2 nathanw return 0;
310 1.3.2.2 nathanw }
311 1.3.2.2 nathanw
312 1.3.2.2 nathanw static int
313 1.3.2.2 nathanw agp_amd_unbind_page(struct agp_softc *sc, off_t offset)
314 1.3.2.2 nathanw {
315 1.3.2.2 nathanw struct agp_amd_softc *asc = sc->as_chipc;
316 1.3.2.2 nathanw
317 1.3.2.2 nathanw if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
318 1.3.2.2 nathanw return EINVAL;
319 1.3.2.2 nathanw
320 1.3.2.2 nathanw asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
321 1.3.2.2 nathanw return 0;
322 1.3.2.2 nathanw }
323 1.3.2.2 nathanw
324 1.3.2.2 nathanw static void
325 1.3.2.2 nathanw agp_amd_flush_tlb(struct agp_softc *sc)
326 1.3.2.2 nathanw {
327 1.3.2.2 nathanw struct agp_amd_softc *asc = sc->as_chipc;
328 1.3.2.2 nathanw
329 1.3.2.2 nathanw /* Set the cache invalidate bit and wait for the chipset to clear */
330 1.3.2.2 nathanw WRITE4(AGP_AMD751_TLBCTRL, 1);
331 1.3.2.2 nathanw do {
332 1.3.2.2 nathanw DELAY(1);
333 1.3.2.2 nathanw } while (READ4(AGP_AMD751_TLBCTRL));
334 1.3.2.2 nathanw }
335