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ahcisata_pci.c revision 1.1.12.1
      1  1.1.12.1      he /*	$NetBSD: ahcisata_pci.c,v 1.1.12.1 2007/08/04 18:20:51 he Exp $	*/
      2       1.1  bouyer 
      3       1.1  bouyer /*
      4       1.1  bouyer  * Copyright (c) 2006 Manuel Bouyer.
      5       1.1  bouyer  *
      6       1.1  bouyer  * Redistribution and use in source and binary forms, with or without
      7       1.1  bouyer  * modification, are permitted provided that the following conditions
      8       1.1  bouyer  * are met:
      9       1.1  bouyer  * 1. Redistributions of source code must retain the above copyright
     10       1.1  bouyer  *    notice, this list of conditions and the following disclaimer.
     11       1.1  bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     12       1.1  bouyer  *    notice, this list of conditions and the following disclaimer in the
     13       1.1  bouyer  *    documentation and/or other materials provided with the distribution.
     14       1.1  bouyer  * 3. All advertising materials mentioning features or use of this software
     15       1.1  bouyer  *    must display the following acknowledgement:
     16       1.1  bouyer  *	This product includes software developed by Manuel Bouyer.
     17       1.1  bouyer  * 4. The name of the author may not be used to endorse or promote products
     18       1.1  bouyer  *    derived from this software without specific prior written permission.
     19       1.1  bouyer  *
     20       1.1  bouyer  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21       1.1  bouyer  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22       1.1  bouyer  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23       1.1  bouyer  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24       1.1  bouyer  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25       1.1  bouyer  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26       1.1  bouyer  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27       1.1  bouyer  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28       1.1  bouyer  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29       1.1  bouyer  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30       1.1  bouyer  *
     31       1.1  bouyer  */
     32       1.1  bouyer 
     33       1.1  bouyer #include <sys/cdefs.h>
     34  1.1.12.1      he __KERNEL_RCSID(0, "$NetBSD: ahcisata_pci.c,v 1.1.12.1 2007/08/04 18:20:51 he Exp $");
     35       1.1  bouyer 
     36       1.1  bouyer #include <sys/types.h>
     37       1.1  bouyer #include <sys/malloc.h>
     38       1.1  bouyer #include <sys/param.h>
     39       1.1  bouyer #include <sys/kernel.h>
     40       1.1  bouyer #include <sys/systm.h>
     41       1.1  bouyer #include <sys/disklabel.h>
     42  1.1.12.1      he #include <sys/pnp.h>
     43       1.1  bouyer 
     44       1.1  bouyer #include <uvm/uvm_extern.h>
     45       1.1  bouyer 
     46       1.1  bouyer #include <dev/pci/pcivar.h>
     47       1.1  bouyer #include <dev/pci/pcidevs.h>
     48       1.1  bouyer #include <dev/pci/pciidereg.h>
     49       1.1  bouyer #include <dev/pci/pciidevar.h>
     50       1.1  bouyer #include <dev/ic/ahcisatavar.h>
     51       1.1  bouyer 
     52  1.1.12.1      he struct ahci_pci_softc {
     53  1.1.12.1      he 	struct ahci_softc ah_sc; /* must come first, struct device */
     54  1.1.12.1      he 	pci_chipset_tag_t sc_pc;
     55  1.1.12.1      he 	pcitag_t sc_pcitag;
     56  1.1.12.1      he 	struct pci_conf_state sc_pciconf;
     57  1.1.12.1      he };
     58  1.1.12.1      he 
     59  1.1.12.1      he 
     60       1.1  bouyer static int  ahci_pci_match(struct device *, struct cfdata *, void *);
     61       1.1  bouyer static void ahci_pci_attach(struct device *, struct device *, void *);
     62       1.1  bouyer 
     63  1.1.12.1      he static pnp_status_t ahci_pci_power(device_t, pnp_request_t, void *);
     64  1.1.12.1      he 
     65  1.1.12.1      he 
     66  1.1.12.1      he CFATTACH_DECL(ahcisata_pci, sizeof(struct ahci_pci_softc),
     67       1.1  bouyer     ahci_pci_match, ahci_pci_attach, NULL, NULL);
     68       1.1  bouyer 
     69       1.1  bouyer static int
     70       1.1  bouyer ahci_pci_match(struct device *parent, struct cfdata *match,
     71       1.1  bouyer     void *aux)
     72       1.1  bouyer {
     73       1.1  bouyer 	struct pci_attach_args *pa = aux;
     74       1.1  bouyer 	bus_space_tag_t regt;
     75       1.1  bouyer 	bus_space_handle_t regh;
     76       1.1  bouyer 	bus_size_t size;
     77       1.1  bouyer 	int ret = 0;
     78       1.1  bouyer 
     79       1.1  bouyer 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE &&
     80       1.1  bouyer 	    PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA &&
     81       1.1  bouyer 	    PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI) {
     82       1.1  bouyer 		/* check if the chip is in ahci mode */
     83       1.1  bouyer 		if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
     84       1.1  bouyer 		    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
     85       1.1  bouyer 		    &regt, &regh, NULL, &size) != 0)
     86       1.1  bouyer 			return (0);
     87       1.1  bouyer 		if (bus_space_read_4(regt, regh, AHCI_GHC) & AHCI_GHC_AE)
     88       1.1  bouyer 			ret = 3;
     89       1.1  bouyer 		bus_space_unmap(regt, regh, size);
     90       1.1  bouyer 		return (3);
     91       1.1  bouyer 	}
     92       1.1  bouyer 
     93       1.1  bouyer 	return (ret);
     94       1.1  bouyer }
     95       1.1  bouyer 
     96       1.1  bouyer static void
     97       1.1  bouyer ahci_pci_attach(struct device *parent, struct device *self, void *aux)
     98       1.1  bouyer {
     99       1.1  bouyer 	struct pci_attach_args *pa = aux;
    100  1.1.12.1      he 	struct ahci_pci_softc *psc = (struct ahci_pci_softc *)self;
    101  1.1.12.1      he 	struct ahci_softc *sc = &psc->ah_sc;
    102       1.1  bouyer 	bus_size_t size;
    103       1.1  bouyer 	char devinfo[256];
    104       1.1  bouyer 	const char *intrstr;
    105       1.1  bouyer 	pci_intr_handle_t intrhandle;
    106       1.1  bouyer 	void *ih;
    107       1.1  bouyer 
    108       1.1  bouyer 	if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
    109       1.1  bouyer 	    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
    110       1.1  bouyer 	    &sc->sc_ahcit, &sc->sc_ahcih, NULL, &size) != 0) {
    111       1.1  bouyer 		aprint_error("%s: can't map ahci registers\n", AHCINAME(sc));
    112       1.1  bouyer 		return;
    113       1.1  bouyer 	}
    114  1.1.12.1      he 	psc->sc_pc = pa->pa_pc;
    115  1.1.12.1      he 	psc->sc_pcitag = pa->pa_tag;
    116  1.1.12.1      he 
    117       1.1  bouyer 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
    118       1.1  bouyer 	aprint_naive(": AHCI disk controller\n");
    119       1.1  bouyer 	aprint_normal(": %s\n", devinfo);
    120       1.1  bouyer 
    121       1.1  bouyer 	if (pci_intr_map(pa, &intrhandle) != 0) {
    122       1.1  bouyer 		aprint_error("%s: couldn't map interrupt\n", AHCINAME(sc));
    123       1.1  bouyer 		return;
    124       1.1  bouyer 	}
    125       1.1  bouyer 	intrstr = pci_intr_string(pa->pa_pc, intrhandle);
    126       1.1  bouyer 	ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO, ahci_intr, sc);
    127       1.1  bouyer 	if (ih == NULL) {
    128       1.1  bouyer 		aprint_error("%s: couldn't establish interrupt", AHCINAME(sc));
    129       1.1  bouyer 		return;
    130       1.1  bouyer 	}
    131       1.1  bouyer 	aprint_normal("%s: interrupting at %s\n", AHCINAME(sc),
    132       1.1  bouyer 	    intrstr ? intrstr : "unknown interrupt");
    133       1.1  bouyer 	sc->sc_dmat = pa->pa_dmat;
    134       1.1  bouyer 	ahci_attach(sc);
    135  1.1.12.1      he 
    136  1.1.12.1      he 	/* register device power management */
    137  1.1.12.1      he 	pnp_register(self, ahci_pci_power);
    138  1.1.12.1      he }
    139  1.1.12.1      he 
    140  1.1.12.1      he static pnp_status_t
    141  1.1.12.1      he ahci_pci_power(device_t dv, pnp_request_t req, void *opaque)
    142  1.1.12.1      he {
    143  1.1.12.1      he 	struct ahci_pci_softc *psc = (struct ahci_pci_softc *)dv;
    144  1.1.12.1      he 	struct ahci_softc *sc = &psc->ah_sc;
    145  1.1.12.1      he 	pnp_status_t status;
    146  1.1.12.1      he 	pnp_state_t *state;
    147  1.1.12.1      he 	pnp_capabilities_t *caps;
    148  1.1.12.1      he 	pci_chipset_tag_t pc;
    149  1.1.12.1      he 	pcireg_t val;
    150  1.1.12.1      he 	pcitag_t tag;
    151  1.1.12.1      he 	int off, s;
    152  1.1.12.1      he 
    153  1.1.12.1      he 	status = PNP_STATUS_UNSUPPORTED;
    154  1.1.12.1      he 	pc = psc->sc_pc;
    155  1.1.12.1      he 	tag = psc->sc_pcitag;
    156  1.1.12.1      he 
    157  1.1.12.1      he 	switch (req) {
    158  1.1.12.1      he 	case PNP_REQUEST_GET_CAPABILITIES:
    159  1.1.12.1      he 		caps = opaque;
    160  1.1.12.1      he 
    161  1.1.12.1      he 		if (!pci_get_capability(pc, tag, PCI_CAP_PWRMGMT, &off, &val))
    162  1.1.12.1      he 			return PNP_STATUS_UNSUPPORTED;
    163  1.1.12.1      he 		caps->state = pci_pnp_capabilities(val);
    164  1.1.12.1      he 		status = PNP_STATUS_SUCCESS;
    165  1.1.12.1      he 		break;
    166  1.1.12.1      he 	case PNP_REQUEST_SET_STATE:
    167  1.1.12.1      he 		state = opaque;
    168  1.1.12.1      he 		switch (*state) {
    169  1.1.12.1      he 		case PNP_STATE_D0:
    170  1.1.12.1      he 			val = PCI_PMCSR_STATE_D0;
    171  1.1.12.1      he 			break;
    172  1.1.12.1      he 		case PNP_STATE_D3:
    173  1.1.12.1      he 			val = PCI_PMCSR_STATE_D3;
    174  1.1.12.1      he 			s = splbio();
    175  1.1.12.1      he 			pci_conf_capture(pc, tag, &psc->sc_pciconf);
    176  1.1.12.1      he 			splx(s);
    177  1.1.12.1      he 			break;
    178  1.1.12.1      he 		default:
    179  1.1.12.1      he 			return PNP_STATUS_UNSUPPORTED;
    180  1.1.12.1      he 		}
    181  1.1.12.1      he 
    182  1.1.12.1      he 		if (pci_set_powerstate(pc, tag, val) == 0) {
    183  1.1.12.1      he 			status = PNP_STATUS_SUCCESS;
    184  1.1.12.1      he 			if (*state != PNP_STATE_D0)
    185  1.1.12.1      he 				break;
    186  1.1.12.1      he 
    187  1.1.12.1      he 			s = splbio();
    188  1.1.12.1      he 			pci_conf_restore(pc, tag, &psc->sc_pciconf);
    189  1.1.12.1      he 
    190  1.1.12.1      he 			ahci_reset(sc);
    191  1.1.12.1      he 			ahci_setup_ports(sc);
    192  1.1.12.1      he 			ahci_reprobe_drives(sc);
    193  1.1.12.1      he 			ahci_enable_intrs(sc);
    194  1.1.12.1      he 
    195  1.1.12.1      he 			splx(s);
    196  1.1.12.1      he 		}
    197  1.1.12.1      he 	case PNP_REQUEST_GET_STATE:
    198  1.1.12.1      he 		state = opaque;
    199  1.1.12.1      he 		if (pci_get_powerstate(pc, tag, &val) != 0)
    200  1.1.12.1      he 			return PNP_STATUS_UNSUPPORTED;
    201  1.1.12.1      he 
    202  1.1.12.1      he 		*state = pci_pnp_powerstate(val);
    203  1.1.12.1      he 		status = PNP_STATUS_SUCCESS;
    204  1.1.12.1      he 		break;
    205  1.1.12.1      he 	default:
    206  1.1.12.1      he 		status = PNP_STATUS_UNSUPPORTED;
    207  1.1.12.1      he 		break;
    208  1.1.12.1      he 	}
    209  1.1.12.1      he 	return status;
    210       1.1  bouyer }
    211