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ahcisata_pci.c revision 1.1.14.2
      1  1.1.14.2    matt /*	ahcisata_pci.c,v 1.1.14.1 2008/01/09 01:53:32 matt Exp	*/
      2       1.1  bouyer 
      3       1.1  bouyer /*
      4       1.1  bouyer  * Copyright (c) 2006 Manuel Bouyer.
      5       1.1  bouyer  *
      6       1.1  bouyer  * Redistribution and use in source and binary forms, with or without
      7       1.1  bouyer  * modification, are permitted provided that the following conditions
      8       1.1  bouyer  * are met:
      9       1.1  bouyer  * 1. Redistributions of source code must retain the above copyright
     10       1.1  bouyer  *    notice, this list of conditions and the following disclaimer.
     11       1.1  bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     12       1.1  bouyer  *    notice, this list of conditions and the following disclaimer in the
     13       1.1  bouyer  *    documentation and/or other materials provided with the distribution.
     14       1.1  bouyer  * 3. All advertising materials mentioning features or use of this software
     15       1.1  bouyer  *    must display the following acknowledgement:
     16       1.1  bouyer  *	This product includes software developed by Manuel Bouyer.
     17       1.1  bouyer  * 4. The name of the author may not be used to endorse or promote products
     18       1.1  bouyer  *    derived from this software without specific prior written permission.
     19       1.1  bouyer  *
     20       1.1  bouyer  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21       1.1  bouyer  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22       1.1  bouyer  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23       1.1  bouyer  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24       1.1  bouyer  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25       1.1  bouyer  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26       1.1  bouyer  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27       1.1  bouyer  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28       1.1  bouyer  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29       1.1  bouyer  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30       1.1  bouyer  *
     31       1.1  bouyer  */
     32       1.1  bouyer 
     33       1.1  bouyer #include <sys/cdefs.h>
     34  1.1.14.2    matt __KERNEL_RCSID(0, "ahcisata_pci.c,v 1.1.14.1 2008/01/09 01:53:32 matt Exp");
     35       1.1  bouyer 
     36       1.1  bouyer #include <sys/types.h>
     37       1.1  bouyer #include <sys/malloc.h>
     38       1.1  bouyer #include <sys/param.h>
     39       1.1  bouyer #include <sys/kernel.h>
     40       1.1  bouyer #include <sys/systm.h>
     41       1.1  bouyer #include <sys/disklabel.h>
     42  1.1.14.1    matt #include <sys/pmf.h>
     43       1.1  bouyer 
     44       1.1  bouyer #include <uvm/uvm_extern.h>
     45       1.1  bouyer 
     46       1.1  bouyer #include <dev/pci/pcivar.h>
     47       1.1  bouyer #include <dev/pci/pcidevs.h>
     48       1.1  bouyer #include <dev/pci/pciidereg.h>
     49       1.1  bouyer #include <dev/pci/pciidevar.h>
     50       1.1  bouyer #include <dev/ic/ahcisatavar.h>
     51       1.1  bouyer 
     52  1.1.14.1    matt struct ahci_pci_softc {
     53  1.1.14.2    matt 	struct ahci_softc ah_sc;
     54  1.1.14.1    matt 	pci_chipset_tag_t sc_pc;
     55  1.1.14.1    matt 	pcitag_t sc_pcitag;
     56  1.1.14.1    matt };
     57  1.1.14.1    matt 
     58  1.1.14.1    matt 
     59  1.1.14.2    matt static int  ahci_pci_match(device_t, cfdata_t, void *);
     60  1.1.14.2    matt static void ahci_pci_attach(device_t, device_t, void *);
     61  1.1.14.2    matt static bool ahci_pci_resume(device_t PMF_FN_PROTO);
     62  1.1.14.1    matt 
     63       1.1  bouyer 
     64  1.1.14.2    matt CFATTACH_DECL_NEW(ahcisata_pci, sizeof(struct ahci_pci_softc),
     65       1.1  bouyer     ahci_pci_match, ahci_pci_attach, NULL, NULL);
     66       1.1  bouyer 
     67       1.1  bouyer static int
     68  1.1.14.2    matt ahci_pci_match(device_t parent, cfdata_t match, void *aux)
     69       1.1  bouyer {
     70       1.1  bouyer 	struct pci_attach_args *pa = aux;
     71       1.1  bouyer 	bus_space_tag_t regt;
     72       1.1  bouyer 	bus_space_handle_t regh;
     73       1.1  bouyer 	bus_size_t size;
     74       1.1  bouyer 	int ret = 0;
     75       1.1  bouyer 
     76       1.1  bouyer 	if (PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE &&
     77  1.1.14.2    matt 	    ((PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA &&
     78  1.1.14.2    matt 	     PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI) ||
     79  1.1.14.2    matt 	     PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_RAID)) {
     80       1.1  bouyer 		/* check if the chip is in ahci mode */
     81       1.1  bouyer 		if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
     82       1.1  bouyer 		    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
     83       1.1  bouyer 		    &regt, &regh, NULL, &size) != 0)
     84  1.1.14.2    matt 			return 0;
     85  1.1.14.2    matt 		if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA
     86  1.1.14.2    matt 		    && PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI)
     87  1.1.14.2    matt 			ret = 3;
     88  1.1.14.2    matt 		else if (bus_space_read_4(regt, regh, AHCI_GHC) & AHCI_GHC_AE)
     89       1.1  bouyer 			ret = 3;
     90       1.1  bouyer 		bus_space_unmap(regt, regh, size);
     91  1.1.14.2    matt 		return ret;
     92       1.1  bouyer 	}
     93       1.1  bouyer 
     94  1.1.14.2    matt 	return ret;
     95       1.1  bouyer }
     96       1.1  bouyer 
     97       1.1  bouyer static void
     98  1.1.14.2    matt ahci_pci_attach(device_t parent, device_t self, void *aux)
     99       1.1  bouyer {
    100       1.1  bouyer 	struct pci_attach_args *pa = aux;
    101  1.1.14.2    matt 	struct ahci_pci_softc *psc = device_private(self);
    102  1.1.14.1    matt 	struct ahci_softc *sc = &psc->ah_sc;
    103       1.1  bouyer 	bus_size_t size;
    104       1.1  bouyer 	char devinfo[256];
    105       1.1  bouyer 	const char *intrstr;
    106       1.1  bouyer 	pci_intr_handle_t intrhandle;
    107       1.1  bouyer 	void *ih;
    108       1.1  bouyer 
    109  1.1.14.2    matt 	sc->sc_atac.atac_dev = self;
    110  1.1.14.2    matt 
    111       1.1  bouyer 	if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
    112       1.1  bouyer 	    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
    113       1.1  bouyer 	    &sc->sc_ahcit, &sc->sc_ahcih, NULL, &size) != 0) {
    114  1.1.14.2    matt 		aprint_error_dev(self, "can't map ahci registers\n");
    115       1.1  bouyer 		return;
    116       1.1  bouyer 	}
    117  1.1.14.1    matt 	psc->sc_pc = pa->pa_pc;
    118  1.1.14.1    matt 	psc->sc_pcitag = pa->pa_tag;
    119  1.1.14.1    matt 
    120       1.1  bouyer 	pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
    121       1.1  bouyer 	aprint_naive(": AHCI disk controller\n");
    122       1.1  bouyer 	aprint_normal(": %s\n", devinfo);
    123       1.1  bouyer 
    124       1.1  bouyer 	if (pci_intr_map(pa, &intrhandle) != 0) {
    125       1.1  bouyer 		aprint_error("%s: couldn't map interrupt\n", AHCINAME(sc));
    126       1.1  bouyer 		return;
    127       1.1  bouyer 	}
    128       1.1  bouyer 	intrstr = pci_intr_string(pa->pa_pc, intrhandle);
    129       1.1  bouyer 	ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO, ahci_intr, sc);
    130       1.1  bouyer 	if (ih == NULL) {
    131       1.1  bouyer 		aprint_error("%s: couldn't establish interrupt", AHCINAME(sc));
    132       1.1  bouyer 		return;
    133       1.1  bouyer 	}
    134       1.1  bouyer 	aprint_normal("%s: interrupting at %s\n", AHCINAME(sc),
    135       1.1  bouyer 	    intrstr ? intrstr : "unknown interrupt");
    136       1.1  bouyer 	sc->sc_dmat = pa->pa_dmat;
    137  1.1.14.2    matt 
    138  1.1.14.2    matt 	if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_RAID) {
    139  1.1.14.2    matt 		AHCIDEBUG_PRINT(("%s: RAID mode\n", AHCINAME(sc)), DEBUG_PROBE);
    140  1.1.14.2    matt 		sc->sc_atac_capflags = ATAC_CAP_RAID;
    141  1.1.14.2    matt 	} else {
    142  1.1.14.2    matt 		AHCIDEBUG_PRINT(("%s: SATA mode\n", AHCINAME(sc)), DEBUG_PROBE);
    143  1.1.14.2    matt 	}
    144  1.1.14.2    matt 
    145       1.1  bouyer 	ahci_attach(sc);
    146  1.1.14.1    matt 
    147  1.1.14.1    matt 	if (!pmf_device_register(self, NULL, ahci_pci_resume))
    148  1.1.14.1    matt 		aprint_error_dev(self, "couldn't establish power handler\n");
    149  1.1.14.1    matt }
    150  1.1.14.1    matt 
    151  1.1.14.1    matt static bool
    152  1.1.14.2    matt ahci_pci_resume(device_t dv PMF_FN_ARGS)
    153  1.1.14.1    matt {
    154  1.1.14.1    matt 	struct ahci_pci_softc *psc = device_private(dv);
    155  1.1.14.1    matt 	struct ahci_softc *sc = &psc->ah_sc;
    156  1.1.14.1    matt 	int s;
    157  1.1.14.1    matt 
    158  1.1.14.1    matt 	s = splbio();
    159  1.1.14.1    matt 	ahci_reset(sc);
    160  1.1.14.1    matt 	ahci_setup_ports(sc);
    161  1.1.14.1    matt 	ahci_reprobe_drives(sc);
    162  1.1.14.1    matt 	ahci_enable_intrs(sc);
    163  1.1.14.1    matt 	splx(s);
    164  1.1.14.1    matt 
    165  1.1.14.1    matt 	return true;
    166       1.1  bouyer }
    167