ahcisata_pci.c revision 1.19 1 1.19 dyoung /* $NetBSD: ahcisata_pci.c,v 1.19 2010/02/24 22:37:59 dyoung Exp $ */
2 1.1 bouyer
3 1.1 bouyer /*
4 1.1 bouyer * Copyright (c) 2006 Manuel Bouyer.
5 1.1 bouyer *
6 1.1 bouyer * Redistribution and use in source and binary forms, with or without
7 1.1 bouyer * modification, are permitted provided that the following conditions
8 1.1 bouyer * are met:
9 1.1 bouyer * 1. Redistributions of source code must retain the above copyright
10 1.1 bouyer * notice, this list of conditions and the following disclaimer.
11 1.1 bouyer * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 bouyer * notice, this list of conditions and the following disclaimer in the
13 1.1 bouyer * documentation and/or other materials provided with the distribution.
14 1.1 bouyer *
15 1.1 bouyer * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
16 1.1 bouyer * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
17 1.1 bouyer * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
18 1.1 bouyer * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
19 1.1 bouyer * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
20 1.1 bouyer * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
21 1.1 bouyer * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
22 1.1 bouyer * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
23 1.1 bouyer * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
24 1.1 bouyer * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
25 1.1 bouyer *
26 1.1 bouyer */
27 1.1 bouyer
28 1.1 bouyer #include <sys/cdefs.h>
29 1.19 dyoung __KERNEL_RCSID(0, "$NetBSD: ahcisata_pci.c,v 1.19 2010/02/24 22:37:59 dyoung Exp $");
30 1.1 bouyer
31 1.1 bouyer #include <sys/types.h>
32 1.1 bouyer #include <sys/malloc.h>
33 1.1 bouyer #include <sys/param.h>
34 1.1 bouyer #include <sys/kernel.h>
35 1.1 bouyer #include <sys/systm.h>
36 1.1 bouyer #include <sys/disklabel.h>
37 1.2 jmcneill #include <sys/pmf.h>
38 1.1 bouyer
39 1.1 bouyer #include <uvm/uvm_extern.h>
40 1.1 bouyer
41 1.1 bouyer #include <dev/pci/pcivar.h>
42 1.1 bouyer #include <dev/pci/pcidevs.h>
43 1.1 bouyer #include <dev/pci/pciidereg.h>
44 1.1 bouyer #include <dev/pci/pciidevar.h>
45 1.1 bouyer #include <dev/ic/ahcisatavar.h>
46 1.1 bouyer
47 1.12 dillo #define AHCI_PCI_QUIRK_FORCE 1 /* force attach */
48 1.12 dillo
49 1.12 dillo static const struct pci_quirkdata ahci_pci_quirks[] = {
50 1.12 dillo { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA,
51 1.12 dillo AHCI_PCI_QUIRK_FORCE },
52 1.14 dholland { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA2,
53 1.14 dholland AHCI_PCI_QUIRK_FORCE },
54 1.14 dholland { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA3,
55 1.14 dholland AHCI_PCI_QUIRK_FORCE },
56 1.14 dholland { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA4,
57 1.14 dholland AHCI_PCI_QUIRK_FORCE },
58 1.12 dillo { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA,
59 1.12 dillo AHCI_PCI_QUIRK_FORCE },
60 1.13 tron { PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_1,
61 1.13 tron AHCI_PCI_QUIRK_FORCE },
62 1.15 cegger { PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SE6121,
63 1.15 cegger AHCI_PCI_QUIRK_FORCE },
64 1.12 dillo };
65 1.12 dillo
66 1.2 jmcneill struct ahci_pci_softc {
67 1.9 cube struct ahci_softc ah_sc;
68 1.2 jmcneill pci_chipset_tag_t sc_pc;
69 1.2 jmcneill pcitag_t sc_pcitag;
70 1.2 jmcneill };
71 1.2 jmcneill
72 1.2 jmcneill
73 1.9 cube static int ahci_pci_match(device_t, cfdata_t, void *);
74 1.9 cube static void ahci_pci_attach(device_t, device_t, void *);
75 1.12 dillo const struct pci_quirkdata *ahci_pci_lookup_quirkdata(pci_vendor_id_t,
76 1.12 dillo pci_product_id_t);
77 1.19 dyoung static bool ahci_pci_resume(device_t, const pmf_qual_t *);
78 1.2 jmcneill
79 1.1 bouyer
80 1.9 cube CFATTACH_DECL_NEW(ahcisata_pci, sizeof(struct ahci_pci_softc),
81 1.1 bouyer ahci_pci_match, ahci_pci_attach, NULL, NULL);
82 1.1 bouyer
83 1.1 bouyer static int
84 1.9 cube ahci_pci_match(device_t parent, cfdata_t match, void *aux)
85 1.1 bouyer {
86 1.1 bouyer struct pci_attach_args *pa = aux;
87 1.1 bouyer bus_space_tag_t regt;
88 1.1 bouyer bus_space_handle_t regh;
89 1.1 bouyer bus_size_t size;
90 1.1 bouyer int ret = 0;
91 1.12 dillo const struct pci_quirkdata *quirks;
92 1.12 dillo
93 1.12 dillo quirks = ahci_pci_lookup_quirkdata(PCI_VENDOR(pa->pa_id),
94 1.12 dillo PCI_PRODUCT(pa->pa_id));
95 1.1 bouyer
96 1.12 dillo /* if wrong class and not forced by quirks, don't match */
97 1.12 dillo if ((PCI_CLASS(pa->pa_class) != PCI_CLASS_MASS_STORAGE ||
98 1.12 dillo ((PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_MASS_STORAGE_SATA ||
99 1.12 dillo PCI_INTERFACE(pa->pa_class) != PCI_INTERFACE_SATA_AHCI) &&
100 1.12 dillo PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_MASS_STORAGE_RAID)) &&
101 1.12 dillo (quirks == NULL || (quirks->quirks & AHCI_PCI_QUIRK_FORCE) == 0))
102 1.12 dillo return 0;
103 1.12 dillo
104 1.12 dillo if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
105 1.12 dillo PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
106 1.12 dillo ®t, ®h, NULL, &size) != 0)
107 1.12 dillo return 0;
108 1.12 dillo
109 1.12 dillo if ((PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA &&
110 1.3 xtraeme PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI) ||
111 1.12 dillo (quirks && quirks->quirks & AHCI_PCI_QUIRK_FORCE) ||
112 1.12 dillo (bus_space_read_4(regt, regh, AHCI_GHC) & AHCI_GHC_AE))
113 1.12 dillo ret = 3;
114 1.1 bouyer
115 1.12 dillo bus_space_unmap(regt, regh, size);
116 1.5 jnemeth return ret;
117 1.1 bouyer }
118 1.1 bouyer
119 1.1 bouyer static void
120 1.9 cube ahci_pci_attach(device_t parent, device_t self, void *aux)
121 1.1 bouyer {
122 1.1 bouyer struct pci_attach_args *pa = aux;
123 1.9 cube struct ahci_pci_softc *psc = device_private(self);
124 1.2 jmcneill struct ahci_softc *sc = &psc->ah_sc;
125 1.1 bouyer bus_size_t size;
126 1.1 bouyer char devinfo[256];
127 1.1 bouyer const char *intrstr;
128 1.1 bouyer pci_intr_handle_t intrhandle;
129 1.1 bouyer void *ih;
130 1.1 bouyer
131 1.11 cube sc->sc_atac.atac_dev = self;
132 1.10 cube
133 1.1 bouyer if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
134 1.1 bouyer PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
135 1.1 bouyer &sc->sc_ahcit, &sc->sc_ahcih, NULL, &size) != 0) {
136 1.9 cube aprint_error_dev(self, "can't map ahci registers\n");
137 1.1 bouyer return;
138 1.1 bouyer }
139 1.2 jmcneill psc->sc_pc = pa->pa_pc;
140 1.2 jmcneill psc->sc_pcitag = pa->pa_tag;
141 1.2 jmcneill
142 1.1 bouyer pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
143 1.1 bouyer aprint_naive(": AHCI disk controller\n");
144 1.1 bouyer aprint_normal(": %s\n", devinfo);
145 1.1 bouyer
146 1.1 bouyer if (pci_intr_map(pa, &intrhandle) != 0) {
147 1.1 bouyer aprint_error("%s: couldn't map interrupt\n", AHCINAME(sc));
148 1.1 bouyer return;
149 1.1 bouyer }
150 1.1 bouyer intrstr = pci_intr_string(pa->pa_pc, intrhandle);
151 1.1 bouyer ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO, ahci_intr, sc);
152 1.1 bouyer if (ih == NULL) {
153 1.1 bouyer aprint_error("%s: couldn't establish interrupt", AHCINAME(sc));
154 1.1 bouyer return;
155 1.1 bouyer }
156 1.1 bouyer aprint_normal("%s: interrupting at %s\n", AHCINAME(sc),
157 1.1 bouyer intrstr ? intrstr : "unknown interrupt");
158 1.1 bouyer sc->sc_dmat = pa->pa_dmat;
159 1.3 xtraeme
160 1.6 mlelstv if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_RAID) {
161 1.7 mlelstv AHCIDEBUG_PRINT(("%s: RAID mode\n", AHCINAME(sc)), DEBUG_PROBE);
162 1.3 xtraeme sc->sc_atac_capflags = ATAC_CAP_RAID;
163 1.6 mlelstv } else {
164 1.7 mlelstv AHCIDEBUG_PRINT(("%s: SATA mode\n", AHCINAME(sc)), DEBUG_PROBE);
165 1.6 mlelstv }
166 1.3 xtraeme
167 1.1 bouyer ahci_attach(sc);
168 1.2 jmcneill
169 1.2 jmcneill if (!pmf_device_register(self, NULL, ahci_pci_resume))
170 1.2 jmcneill aprint_error_dev(self, "couldn't establish power handler\n");
171 1.2 jmcneill }
172 1.2 jmcneill
173 1.2 jmcneill static bool
174 1.19 dyoung ahci_pci_resume(device_t dv, const pmf_qual_t *qual)
175 1.2 jmcneill {
176 1.2 jmcneill struct ahci_pci_softc *psc = device_private(dv);
177 1.2 jmcneill struct ahci_softc *sc = &psc->ah_sc;
178 1.2 jmcneill int s;
179 1.2 jmcneill
180 1.2 jmcneill s = splbio();
181 1.2 jmcneill ahci_reset(sc);
182 1.2 jmcneill ahci_setup_ports(sc);
183 1.2 jmcneill ahci_reprobe_drives(sc);
184 1.2 jmcneill ahci_enable_intrs(sc);
185 1.2 jmcneill splx(s);
186 1.2 jmcneill
187 1.2 jmcneill return true;
188 1.1 bouyer }
189 1.12 dillo
190 1.12 dillo const struct pci_quirkdata *
191 1.12 dillo ahci_pci_lookup_quirkdata(pci_vendor_id_t vendor, pci_product_id_t product)
192 1.12 dillo {
193 1.12 dillo int i;
194 1.12 dillo
195 1.16 pgoyette for (i = 0; i < __arraycount(ahci_pci_quirks); i++)
196 1.12 dillo if (vendor == ahci_pci_quirks[i].vendor &&
197 1.12 dillo product == ahci_pci_quirks[i].product)
198 1.12 dillo return (&ahci_pci_quirks[i]);
199 1.12 dillo return (NULL);
200 1.12 dillo }
201