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ahcisata_pci.c revision 1.30
      1  1.30    bouyer /*	$NetBSD: ahcisata_pci.c,v 1.30 2012/08/20 12:48:47 bouyer Exp $	*/
      2   1.1    bouyer 
      3   1.1    bouyer /*
      4   1.1    bouyer  * Copyright (c) 2006 Manuel Bouyer.
      5   1.1    bouyer  *
      6   1.1    bouyer  * Redistribution and use in source and binary forms, with or without
      7   1.1    bouyer  * modification, are permitted provided that the following conditions
      8   1.1    bouyer  * are met:
      9   1.1    bouyer  * 1. Redistributions of source code must retain the above copyright
     10   1.1    bouyer  *    notice, this list of conditions and the following disclaimer.
     11   1.1    bouyer  * 2. Redistributions in binary form must reproduce the above copyright
     12   1.1    bouyer  *    notice, this list of conditions and the following disclaimer in the
     13   1.1    bouyer  *    documentation and/or other materials provided with the distribution.
     14   1.1    bouyer  *
     15   1.1    bouyer  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     16   1.1    bouyer  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     17   1.1    bouyer  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     18   1.1    bouyer  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     19   1.1    bouyer  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     20   1.1    bouyer  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     21   1.1    bouyer  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     22   1.1    bouyer  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     23   1.1    bouyer  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     24   1.1    bouyer  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     25   1.1    bouyer  *
     26   1.1    bouyer  */
     27   1.1    bouyer 
     28   1.1    bouyer #include <sys/cdefs.h>
     29  1.30    bouyer __KERNEL_RCSID(0, "$NetBSD: ahcisata_pci.c,v 1.30 2012/08/20 12:48:47 bouyer Exp $");
     30   1.1    bouyer 
     31   1.1    bouyer #include <sys/types.h>
     32   1.1    bouyer #include <sys/malloc.h>
     33   1.1    bouyer #include <sys/param.h>
     34   1.1    bouyer #include <sys/kernel.h>
     35   1.1    bouyer #include <sys/systm.h>
     36   1.1    bouyer #include <sys/disklabel.h>
     37   1.2  jmcneill #include <sys/pmf.h>
     38   1.1    bouyer 
     39   1.1    bouyer #include <dev/pci/pcivar.h>
     40   1.1    bouyer #include <dev/pci/pcidevs.h>
     41   1.1    bouyer #include <dev/pci/pciidereg.h>
     42   1.1    bouyer #include <dev/pci/pciidevar.h>
     43   1.1    bouyer #include <dev/ic/ahcisatavar.h>
     44   1.1    bouyer 
     45  1.20  jakllsch struct ahci_pci_quirk {
     46  1.20  jakllsch 	pci_vendor_id_t  vendor;	/* Vendor ID */
     47  1.20  jakllsch 	pci_product_id_t product;	/* Product ID */
     48  1.30    bouyer 	int              quirks;	/* quirks; same as sc_ahci_quirks */
     49  1.20  jakllsch };
     50  1.20  jakllsch 
     51  1.20  jakllsch static const struct ahci_pci_quirk ahci_pci_quirks[] = {
     52  1.12     dillo 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA,
     53  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
     54  1.14  dholland 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA2,
     55  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
     56  1.14  dholland 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA3,
     57  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
     58  1.14  dholland 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_SATA4,
     59  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
     60  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_1,
     61  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
     62  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_2,
     63  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
     64  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_3,
     65  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
     66  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP65_AHCI_4,
     67  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
     68  1.12     dillo 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA,
     69  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
     70  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA2,
     71  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
     72  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA3,
     73  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
     74  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_SATA4,
     75  1.28    bouyer 	     AHCI_QUIRK_BADPMP },
     76  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_1,
     77  1.28    bouyer 	     AHCI_QUIRK_BADPMP },
     78  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_2,
     79  1.28    bouyer 	     AHCI_QUIRK_BADPMP },
     80  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_3,
     81  1.28    bouyer 	     AHCI_QUIRK_BADPMP },
     82  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_4,
     83  1.28    bouyer 	     AHCI_QUIRK_BADPMP },
     84  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_5,
     85  1.28    bouyer 	     AHCI_QUIRK_BADPMP },
     86  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_6,
     87  1.28    bouyer 	     AHCI_QUIRK_BADPMP },
     88  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_7,
     89  1.28    bouyer 	     AHCI_QUIRK_BADPMP },
     90  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP67_AHCI_8,
     91  1.28    bouyer 	     AHCI_QUIRK_BADPMP },
     92  1.13      tron 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_1,
     93  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
     94  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_2,
     95  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
     96  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_3,
     97  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
     98  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_4,
     99  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    100  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_5,
    101  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    102  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_6,
    103  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    104  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_7,
    105  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    106  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_8,
    107  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    108  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_9,
    109  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    110  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_10,
    111  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    112  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_11,
    113  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    114  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP73_AHCI_12,
    115  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    116  1.22  jmcneill 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_1,
    117  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    118  1.22  jmcneill 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_2,
    119  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    120  1.22  jmcneill 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_3,
    121  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    122  1.22  jmcneill 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_4,
    123  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    124  1.22  jmcneill 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_5,
    125  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    126  1.22  jmcneill 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_6,
    127  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    128  1.22  jmcneill 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_7,
    129  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    130  1.22  jmcneill 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_8,
    131  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    132  1.22  jmcneill 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_9,
    133  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    134  1.22  jmcneill 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_10,
    135  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    136  1.22  jmcneill 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_11,
    137  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    138  1.22  jmcneill 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP77_AHCI_12,
    139  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    140  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_1,
    141  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    142  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_2,
    143  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    144  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_3,
    145  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    146  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_4,
    147  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    148  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_5,
    149  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    150  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_6,
    151  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    152  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_7,
    153  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    154  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_8,
    155  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    156  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_9,
    157  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    158  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_10,
    159  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    160  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_11,
    161  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    162  1.28    bouyer 	{ PCI_VENDOR_NVIDIA, PCI_PRODUCT_NVIDIA_MCP79_AHCI_12,
    163  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    164  1.25      matt 	{ PCI_VENDOR_ALI, PCI_PRODUCT_ALI_M5288,
    165  1.25      matt 	    AHCI_PCI_QUIRK_FORCE },
    166  1.15    cegger 	{ PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SE6121,
    167  1.28    bouyer 	    AHCI_PCI_QUIRK_FORCE | AHCI_QUIRK_BADPMP },
    168  1.28    bouyer 	{ PCI_VENDOR_MARVELL, PCI_PRODUCT_MARVELL_88SE6145,
    169  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    170  1.26  jakllsch 	{ PCI_VENDOR_MARVELL2, PCI_PRODUCT_MARVELL2_88SE9128,
    171  1.26  jakllsch 	    AHCI_PCI_QUIRK_FORCE },
    172  1.21  jakllsch 	/* ATI SB600 AHCI 64-bit DMA only works on some boards/BIOSes */
    173  1.21  jakllsch 	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB600_SATA_1,
    174  1.28    bouyer 	    AHCI_PCI_QUIRK_BAD64 | AHCI_QUIRK_BADPMPRESET },
    175  1.28    bouyer 	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_AHCI,
    176  1.28    bouyer 	    AHCI_QUIRK_BADPMPRESET },
    177  1.28    bouyer 	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_RAID,
    178  1.28    bouyer 	    AHCI_QUIRK_BADPMPRESET },
    179  1.28    bouyer 	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_RAID5,
    180  1.28    bouyer 	    AHCI_QUIRK_BADPMPRESET },
    181  1.28    bouyer 	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_FC,
    182  1.28    bouyer 	    AHCI_QUIRK_BADPMPRESET },
    183  1.28    bouyer 	{ PCI_VENDOR_ATI, PCI_PRODUCT_ATI_SB700_SATA_AHCI2,
    184  1.28    bouyer 	    AHCI_QUIRK_BADPMPRESET },
    185  1.28    bouyer 	{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8237R_SATA,
    186  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    187  1.28    bouyer 	{ PCI_VENDOR_VIATECH, PCI_PRODUCT_VIATECH_VT8251_SATA,
    188  1.28    bouyer 	    AHCI_QUIRK_BADPMP },
    189  1.12     dillo };
    190  1.12     dillo 
    191   1.2  jmcneill struct ahci_pci_softc {
    192   1.9      cube 	struct ahci_softc ah_sc;
    193   1.2  jmcneill 	pci_chipset_tag_t sc_pc;
    194   1.2  jmcneill 	pcitag_t sc_pcitag;
    195  1.20  jakllsch 	void * sc_ih;
    196   1.2  jmcneill };
    197   1.2  jmcneill 
    198  1.28    bouyer static int  ahci_pci_has_quirk(pci_vendor_id_t, pci_product_id_t);
    199   1.9      cube static int  ahci_pci_match(device_t, cfdata_t, void *);
    200   1.9      cube static void ahci_pci_attach(device_t, device_t, void *);
    201  1.20  jakllsch static int  ahci_pci_detach(device_t, int);
    202  1.19    dyoung static bool ahci_pci_resume(device_t, const pmf_qual_t *);
    203   1.2  jmcneill 
    204   1.1    bouyer 
    205   1.9      cube CFATTACH_DECL_NEW(ahcisata_pci, sizeof(struct ahci_pci_softc),
    206  1.20  jakllsch     ahci_pci_match, ahci_pci_attach, ahci_pci_detach, NULL);
    207  1.20  jakllsch 
    208  1.28    bouyer static int
    209  1.28    bouyer ahci_pci_has_quirk(pci_vendor_id_t vendor, pci_product_id_t product)
    210  1.20  jakllsch {
    211  1.20  jakllsch 	int i;
    212  1.20  jakllsch 
    213  1.20  jakllsch 	for (i = 0; i < __arraycount(ahci_pci_quirks); i++)
    214  1.20  jakllsch 		if (vendor == ahci_pci_quirks[i].vendor &&
    215  1.20  jakllsch 		    product == ahci_pci_quirks[i].product)
    216  1.28    bouyer 			return ahci_pci_quirks[i].quirks;
    217  1.28    bouyer 	return 0;
    218  1.20  jakllsch }
    219   1.1    bouyer 
    220   1.1    bouyer static int
    221   1.9      cube ahci_pci_match(device_t parent, cfdata_t match, void *aux)
    222   1.1    bouyer {
    223   1.1    bouyer 	struct pci_attach_args *pa = aux;
    224   1.1    bouyer 	bus_space_tag_t regt;
    225   1.1    bouyer 	bus_space_handle_t regh;
    226   1.1    bouyer 	bus_size_t size;
    227   1.1    bouyer 	int ret = 0;
    228  1.20  jakllsch 	bool force;
    229  1.12     dillo 
    230  1.28    bouyer 	force = ((ahci_pci_has_quirk( PCI_VENDOR(pa->pa_id),
    231  1.28    bouyer 	    PCI_PRODUCT(pa->pa_id)) & AHCI_PCI_QUIRK_FORCE) != 0);
    232   1.1    bouyer 
    233  1.12     dillo 	/* if wrong class and not forced by quirks, don't match */
    234  1.12     dillo 	if ((PCI_CLASS(pa->pa_class) != PCI_CLASS_MASS_STORAGE ||
    235  1.12     dillo 	    ((PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_MASS_STORAGE_SATA ||
    236  1.12     dillo 	     PCI_INTERFACE(pa->pa_class) != PCI_INTERFACE_SATA_AHCI) &&
    237  1.12     dillo 	     PCI_SUBCLASS(pa->pa_class) != PCI_SUBCLASS_MASS_STORAGE_RAID)) &&
    238  1.20  jakllsch 	    (force == false))
    239  1.12     dillo 		return 0;
    240  1.12     dillo 
    241  1.12     dillo 	if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
    242  1.12     dillo 	    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
    243  1.12     dillo 	    &regt, &regh, NULL, &size) != 0)
    244  1.12     dillo 		return 0;
    245  1.12     dillo 
    246  1.12     dillo 	if ((PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA &&
    247   1.3   xtraeme 	     PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI) ||
    248  1.20  jakllsch 	    (bus_space_read_4(regt, regh, AHCI_GHC) & AHCI_GHC_AE) ||
    249  1.20  jakllsch 	    (force == true))
    250  1.12     dillo 		ret = 3;
    251   1.1    bouyer 
    252  1.12     dillo 	bus_space_unmap(regt, regh, size);
    253   1.5   jnemeth 	return ret;
    254   1.1    bouyer }
    255   1.1    bouyer 
    256   1.1    bouyer static void
    257   1.9      cube ahci_pci_attach(device_t parent, device_t self, void *aux)
    258   1.1    bouyer {
    259   1.1    bouyer 	struct pci_attach_args *pa = aux;
    260   1.9      cube 	struct ahci_pci_softc *psc = device_private(self);
    261   1.2  jmcneill 	struct ahci_softc *sc = &psc->ah_sc;
    262   1.1    bouyer 	const char *intrstr;
    263  1.21  jakllsch 	bool ahci_cap_64bit;
    264  1.21  jakllsch 	bool ahci_bad_64bit;
    265   1.1    bouyer 	pci_intr_handle_t intrhandle;
    266   1.1    bouyer 
    267  1.11      cube 	sc->sc_atac.atac_dev = self;
    268  1.10      cube 
    269   1.1    bouyer 	if (pci_mapreg_map(pa, AHCI_PCI_ABAR,
    270   1.1    bouyer 	    PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0,
    271  1.20  jakllsch 	    &sc->sc_ahcit, &sc->sc_ahcih, NULL, &sc->sc_ahcis) != 0) {
    272   1.9      cube 		aprint_error_dev(self, "can't map ahci registers\n");
    273   1.1    bouyer 		return;
    274   1.1    bouyer 	}
    275   1.2  jmcneill 	psc->sc_pc = pa->pa_pc;
    276   1.2  jmcneill 	psc->sc_pcitag = pa->pa_tag;
    277   1.2  jmcneill 
    278  1.27  drochner 	pci_aprint_devinfo(pa, "AHCI disk controller");
    279   1.1    bouyer 
    280   1.1    bouyer 	if (pci_intr_map(pa, &intrhandle) != 0) {
    281  1.20  jakllsch 		aprint_error_dev(self, "couldn't map interrupt\n");
    282   1.1    bouyer 		return;
    283   1.1    bouyer 	}
    284   1.1    bouyer 	intrstr = pci_intr_string(pa->pa_pc, intrhandle);
    285  1.20  jakllsch 	psc->sc_ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO, ahci_intr, sc);
    286  1.20  jakllsch 	if (psc->sc_ih == NULL) {
    287  1.20  jakllsch 		aprint_error_dev(self, "couldn't establish interrupt\n");
    288   1.1    bouyer 		return;
    289   1.1    bouyer 	}
    290  1.20  jakllsch 	aprint_normal_dev(self, "interrupting at %s\n",
    291   1.1    bouyer 	    intrstr ? intrstr : "unknown interrupt");
    292  1.21  jakllsch 
    293   1.1    bouyer 	sc->sc_dmat = pa->pa_dmat;
    294   1.3   xtraeme 
    295  1.30    bouyer 	sc->sc_ahci_quirks = ahci_pci_has_quirk(PCI_VENDOR(pa->pa_id),
    296  1.28    bouyer 					    PCI_PRODUCT(pa->pa_id));
    297  1.28    bouyer 
    298  1.21  jakllsch 	ahci_cap_64bit = (AHCI_READ(sc, AHCI_CAP) & AHCI_CAP_64BIT) != 0;
    299  1.30    bouyer 	ahci_bad_64bit = ((sc->sc_ahci_quirks & AHCI_PCI_QUIRK_BAD64) != 0);
    300  1.21  jakllsch 
    301  1.21  jakllsch 	if (pci_dma64_available(pa) && ahci_cap_64bit) {
    302  1.21  jakllsch 		if (!ahci_bad_64bit)
    303  1.21  jakllsch 			sc->sc_dmat = pa->pa_dmat64;
    304  1.21  jakllsch 		aprint_verbose_dev(self, "64-bit DMA%s\n",
    305  1.21  jakllsch 		    (sc->sc_dmat == pa->pa_dmat) ? " unavailable" : "");
    306  1.21  jakllsch 	}
    307  1.21  jakllsch 
    308   1.6   mlelstv 	if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_RAID) {
    309   1.7   mlelstv 		AHCIDEBUG_PRINT(("%s: RAID mode\n", AHCINAME(sc)), DEBUG_PROBE);
    310   1.3   xtraeme 		sc->sc_atac_capflags = ATAC_CAP_RAID;
    311   1.6   mlelstv 	} else {
    312   1.7   mlelstv 		AHCIDEBUG_PRINT(("%s: SATA mode\n", AHCINAME(sc)), DEBUG_PROBE);
    313   1.6   mlelstv 	}
    314   1.3   xtraeme 
    315   1.1    bouyer 	ahci_attach(sc);
    316   1.2  jmcneill 
    317   1.2  jmcneill 	if (!pmf_device_register(self, NULL, ahci_pci_resume))
    318   1.2  jmcneill 		aprint_error_dev(self, "couldn't establish power handler\n");
    319   1.2  jmcneill }
    320   1.2  jmcneill 
    321  1.20  jakllsch static int
    322  1.20  jakllsch ahci_pci_detach(device_t dv, int flags)
    323  1.20  jakllsch {
    324  1.20  jakllsch 	struct ahci_pci_softc *psc;
    325  1.20  jakllsch 	struct ahci_softc *sc;
    326  1.20  jakllsch 	int rv;
    327  1.20  jakllsch 
    328  1.20  jakllsch 	psc = device_private(dv);
    329  1.20  jakllsch 	sc = &psc->ah_sc;
    330  1.20  jakllsch 
    331  1.20  jakllsch 	if ((rv = ahci_detach(sc, flags)))
    332  1.20  jakllsch 		return rv;
    333  1.20  jakllsch 
    334  1.24    dyoung 	pmf_device_deregister(dv);
    335  1.24    dyoung 
    336  1.20  jakllsch 	if (psc->sc_ih != NULL)
    337  1.20  jakllsch 		pci_intr_disestablish(psc->sc_pc, psc->sc_ih);
    338  1.20  jakllsch 
    339  1.20  jakllsch 	bus_space_unmap(sc->sc_ahcit, sc->sc_ahcih, sc->sc_ahcis);
    340  1.20  jakllsch 
    341  1.20  jakllsch 	return 0;
    342  1.20  jakllsch }
    343  1.20  jakllsch 
    344   1.2  jmcneill static bool
    345  1.19    dyoung ahci_pci_resume(device_t dv, const pmf_qual_t *qual)
    346   1.2  jmcneill {
    347   1.2  jmcneill 	struct ahci_pci_softc *psc = device_private(dv);
    348   1.2  jmcneill 	struct ahci_softc *sc = &psc->ah_sc;
    349   1.2  jmcneill 	int s;
    350   1.2  jmcneill 
    351   1.2  jmcneill 	s = splbio();
    352  1.20  jakllsch 	ahci_resume(sc);
    353   1.2  jmcneill 	splx(s);
    354   1.2  jmcneill 
    355   1.2  jmcneill 	return true;
    356   1.1    bouyer }
    357