ahcisata_pci.c revision 1.11
1 /* $NetBSD: ahcisata_pci.c,v 1.11 2008/03/20 16:15:57 cube Exp $ */ 2 3 /* 4 * Copyright (c) 2006 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 * 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: ahcisata_pci.c,v 1.11 2008/03/20 16:15:57 cube Exp $"); 35 36 #include <sys/types.h> 37 #include <sys/malloc.h> 38 #include <sys/param.h> 39 #include <sys/kernel.h> 40 #include <sys/systm.h> 41 #include <sys/disklabel.h> 42 #include <sys/pmf.h> 43 44 #include <uvm/uvm_extern.h> 45 46 #include <dev/pci/pcivar.h> 47 #include <dev/pci/pcidevs.h> 48 #include <dev/pci/pciidereg.h> 49 #include <dev/pci/pciidevar.h> 50 #include <dev/ic/ahcisatavar.h> 51 52 struct ahci_pci_softc { 53 struct ahci_softc ah_sc; 54 pci_chipset_tag_t sc_pc; 55 pcitag_t sc_pcitag; 56 }; 57 58 59 static int ahci_pci_match(device_t, cfdata_t, void *); 60 static void ahci_pci_attach(device_t, device_t, void *); 61 static bool ahci_pci_resume(device_t PMF_FN_PROTO); 62 63 64 CFATTACH_DECL_NEW(ahcisata_pci, sizeof(struct ahci_pci_softc), 65 ahci_pci_match, ahci_pci_attach, NULL, NULL); 66 67 static int 68 ahci_pci_match(device_t parent, cfdata_t match, void *aux) 69 { 70 struct pci_attach_args *pa = aux; 71 bus_space_tag_t regt; 72 bus_space_handle_t regh; 73 bus_size_t size; 74 int ret = 0; 75 76 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_MASS_STORAGE && 77 ((PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA && 78 PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI) || 79 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_RAID)) { 80 /* check if the chip is in ahci mode */ 81 if (pci_mapreg_map(pa, AHCI_PCI_ABAR, 82 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, 83 ®t, ®h, NULL, &size) != 0) 84 return 0; 85 if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_SATA 86 && PCI_INTERFACE(pa->pa_class) == PCI_INTERFACE_SATA_AHCI) 87 ret = 3; 88 else if (bus_space_read_4(regt, regh, AHCI_GHC) & AHCI_GHC_AE) 89 ret = 3; 90 bus_space_unmap(regt, regh, size); 91 return ret; 92 } 93 94 return ret; 95 } 96 97 static void 98 ahci_pci_attach(device_t parent, device_t self, void *aux) 99 { 100 struct pci_attach_args *pa = aux; 101 struct ahci_pci_softc *psc = device_private(self); 102 struct ahci_softc *sc = &psc->ah_sc; 103 bus_size_t size; 104 char devinfo[256]; 105 const char *intrstr; 106 pci_intr_handle_t intrhandle; 107 void *ih; 108 109 sc->sc_atac.atac_dev = self; 110 111 if (pci_mapreg_map(pa, AHCI_PCI_ABAR, 112 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 0, 113 &sc->sc_ahcit, &sc->sc_ahcih, NULL, &size) != 0) { 114 aprint_error_dev(self, "can't map ahci registers\n"); 115 return; 116 } 117 psc->sc_pc = pa->pa_pc; 118 psc->sc_pcitag = pa->pa_tag; 119 120 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 121 aprint_naive(": AHCI disk controller\n"); 122 aprint_normal(": %s\n", devinfo); 123 124 if (pci_intr_map(pa, &intrhandle) != 0) { 125 aprint_error("%s: couldn't map interrupt\n", AHCINAME(sc)); 126 return; 127 } 128 intrstr = pci_intr_string(pa->pa_pc, intrhandle); 129 ih = pci_intr_establish(pa->pa_pc, intrhandle, IPL_BIO, ahci_intr, sc); 130 if (ih == NULL) { 131 aprint_error("%s: couldn't establish interrupt", AHCINAME(sc)); 132 return; 133 } 134 aprint_normal("%s: interrupting at %s\n", AHCINAME(sc), 135 intrstr ? intrstr : "unknown interrupt"); 136 sc->sc_dmat = pa->pa_dmat; 137 138 if (PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_MASS_STORAGE_RAID) { 139 AHCIDEBUG_PRINT(("%s: RAID mode\n", AHCINAME(sc)), DEBUG_PROBE); 140 sc->sc_atac_capflags = ATAC_CAP_RAID; 141 } else { 142 AHCIDEBUG_PRINT(("%s: SATA mode\n", AHCINAME(sc)), DEBUG_PROBE); 143 } 144 145 ahci_attach(sc); 146 147 if (!pmf_device_register(self, NULL, ahci_pci_resume)) 148 aprint_error_dev(self, "couldn't establish power handler\n"); 149 } 150 151 static bool 152 ahci_pci_resume(device_t dv PMF_FN_ARGS) 153 { 154 struct ahci_pci_softc *psc = device_private(dv); 155 struct ahci_softc *sc = &psc->ah_sc; 156 int s; 157 158 s = splbio(); 159 ahci_reset(sc); 160 ahci_setup_ports(sc); 161 ahci_reprobe_drives(sc); 162 ahci_enable_intrs(sc); 163 splx(s); 164 165 return true; 166 } 167
Indexes created Tue Sep 30 20:09:53 GMT 2025