btvmeii.c revision 1.15
1 /* $NetBSD: btvmeii.c,v 1.15 2009/03/14 15:36:19 dsl Exp $ */ 2 3 /* 4 * Copyright (c) 1999 5 * Matthias Drochner. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions, and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 17 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 18 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 19 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 20 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 21 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 22 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 23 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 24 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 25 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 26 * SUCH DAMAGE. 27 */ 28 29 /* 30 * Driver for the Bit3/SBS PCI-VME adapter Model 2706. 31 * Uses the common Tundra Universe code. 32 */ 33 34 #include <sys/cdefs.h> 35 __KERNEL_RCSID(0, "$NetBSD: btvmeii.c,v 1.15 2009/03/14 15:36:19 dsl Exp $"); 36 37 #include <sys/param.h> 38 #include <sys/systm.h> 39 #include <sys/kernel.h> 40 #include <sys/device.h> 41 42 #include <dev/pci/pcireg.h> 43 #include <dev/pci/pcivar.h> 44 #include <dev/pci/pcidevs.h> 45 46 #include <sys/bus.h> 47 #include <sys/malloc.h> 48 #include <sys/extent.h> 49 50 #include <dev/pci/ppbreg.h> 51 52 #include <dev/vme/vmereg.h> 53 #include <dev/vme/vmevar.h> 54 55 #include <dev/pci/universe_pci_var.h> 56 57 static int b3_2706_match(struct device *, struct cfdata *, void *); 58 static void b3_2706_attach(struct device *, struct device *, void *); 59 60 /* exported via tag structs */ 61 int b3_2706_map_vme(void *, vme_addr_t, vme_size_t, 62 vme_am_t, vme_datasize_t, vme_swap_t, 63 bus_space_tag_t *, bus_space_handle_t *, vme_mapresc_t*); 64 void b3_2706_unmap_vme(void *, vme_mapresc_t); 65 66 int b3_2706_vme_probe(void *, vme_addr_t, vme_size_t, vme_am_t, 67 vme_datasize_t, 68 int (*)(void *, bus_space_tag_t, bus_space_handle_t), 69 void *); 70 71 int b3_2706_map_vmeint(void *, int, int, vme_intr_handle_t *); 72 void *b3_2706_establish_vmeint(void *, vme_intr_handle_t, int, 73 int (*)(void *), void *); 74 void b3_2706_disestablish_vmeint(void *, void *); 75 void b3_2706_vmeint(void *, int, int); 76 77 int b3_2706_dmamap_create(void *, vme_size_t, 78 vme_am_t, vme_datasize_t, vme_swap_t, 79 int, vme_size_t, vme_addr_t, 80 int, bus_dmamap_t *); 81 void b3_2706_dmamap_destroy(void *, bus_dmamap_t); 82 83 int b3_2706_dmamem_alloc(void *, vme_size_t, 84 vme_am_t, vme_datasize_t, vme_swap_t, 85 bus_dma_segment_t *, int, int *, int); 86 void b3_2706_dmamem_free(void *, bus_dma_segment_t *, int); 87 88 struct b3_2706_vmemaprescs { 89 int wnd; 90 unsigned long pcibase, maplen; 91 bus_space_handle_t handle; 92 u_int32_t len; 93 }; 94 95 struct b3_2706_vmeintrhand { 96 TAILQ_ENTRY(b3_2706_vmeintrhand) ih_next; 97 int (*ih_fun)(void*); 98 void *ih_arg; 99 int ih_level; 100 int ih_vector; 101 int ih_prior; 102 u_long ih_count; 103 }; 104 105 struct b3_2706_softc { 106 struct device sc_dev; 107 struct univ_pci_data univdata; 108 bus_space_tag_t swapt, vmet; 109 bus_space_handle_t swaph; 110 bus_addr_t vmepbase; 111 112 int windowused[8]; 113 struct b3_2706_vmemaprescs vmemaprescs[8]; 114 struct extent *vmeext; 115 char vmemap[EXTENT_FIXED_STORAGE_SIZE(8)]; 116 117 struct vme_chipset_tag sc_vct; 118 119 /* list of VME interrupt handlers */ 120 TAILQ_HEAD(, b3_2706_vmeintrhand) intrhdls; 121 int strayintrs; 122 }; 123 124 CFATTACH_DECL(btvmeii, sizeof(struct b3_2706_softc), 125 b3_2706_match, b3_2706_attach, NULL, NULL); 126 127 /* 128 * The adapter consists of a DEC PCI-PCI-bridge with two 129 * PCI devices behind it: A Tundra Universe as device 4 and 130 * some FPGA with glue logics as device 8. 131 * As long as the autoconf code doesn't provide more support 132 * for dependant devices, we have to duplicate a part of the 133 * "ppb" functions here. 134 */ 135 136 static int 137 b3_2706_match(struct device *parent, struct cfdata *match, void *aux) 138 { 139 struct pci_attach_args *pa = aux; 140 pci_chipset_tag_t pc = pa->pa_pc; 141 int secbus; 142 pcitag_t tag; 143 pcireg_t id; 144 145 if ((PCI_VENDOR(pa->pa_id) != PCI_VENDOR_DEC) 146 || (PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_DEC_21152)) 147 return (0); 148 149 secbus = PPB_BUSINFO_SECONDARY(pci_conf_read(pc, pa->pa_tag, 150 PPB_REG_BUSINFO)); 151 if (secbus == 0) { 152 printf("b3_2706_match: ppb not configured\n"); 153 return (0); 154 } 155 156 tag = pci_make_tag(pc, secbus, 4, 0); 157 id = pci_conf_read(pc, tag, PCI_ID_REG); 158 159 if ((PCI_VENDOR(id) != PCI_VENDOR_NEWBRIDGE) 160 || (PCI_PRODUCT(id) != PCI_PRODUCT_NEWBRIDGE_CA91CX42)) { 161 #ifdef DEBUG 162 printf("b3_2706_match: no tundra\n"); 163 #endif 164 return (0); 165 } 166 167 tag = pci_make_tag(pc, secbus, 8, 0); 168 id = pci_conf_read(pc, tag, PCI_ID_REG); 169 170 if ((PCI_VENDOR(id) != PCI_VENDOR_BIT3) 171 || (PCI_PRODUCT(id) != PCI_PRODUCT_BIT3_PCIVME2706)) { 172 #ifdef DEBUG 173 printf("b3_2706_match: no bit3 chip\n"); 174 #endif 175 return (0); 176 } 177 178 return (5); /* beat "ppb" */ 179 } 180 181 static void 182 b3_2706_attach(parent, self, aux) 183 struct device *parent, *self; 184 void *aux; 185 { 186 struct b3_2706_softc *sc = (struct b3_2706_softc *)self; 187 struct pci_attach_args *pa = aux; 188 pci_chipset_tag_t pc = pa->pa_pc; 189 struct pci_attach_args aa; 190 int secbus; 191 pcireg_t intr; 192 pcitag_t tag; 193 bus_addr_t swappbase; 194 int i; 195 196 struct vmebus_attach_args vaa; 197 198 aprint_naive(": VME bus adapter\n"); 199 aprint_normal("\n"); 200 201 secbus = PPB_BUSINFO_SECONDARY(pci_conf_read(pc, pa->pa_tag, 202 PPB_REG_BUSINFO)); 203 204 memcpy(&aa, pa, sizeof(struct pci_attach_args)); 205 aa.pa_device = 4; 206 aa.pa_function = 0; 207 aa.pa_tag = pci_make_tag(pc, secbus, 4, 0); 208 aa.pa_intrswiz += 4; 209 intr = pci_conf_read(pc, aa.pa_tag, PCI_INTERRUPT_REG); 210 /* 211 * swizzle it based on the number of 212 * busses we're behind and our device 213 * number. 214 */ 215 aa.pa_intrpin = ((1 + aa.pa_intrswiz - 1) % 4) + 1; 216 aa.pa_intrline = PCI_INTERRUPT_LINE(intr); 217 218 if (univ_pci_attach(&sc->univdata, &aa, device_xname(self), 219 b3_2706_vmeint, sc)) { 220 aprint_error_dev(self, "error initializing universe chip\n"); 221 return; 222 } 223 224 /* 225 * don't waste KVM - the byteswap register is aliased in 226 * a 512k window, we need it only once 227 */ 228 tag = pci_make_tag(pc, secbus, 8, 0); 229 sc->swapt = pa->pa_memt; 230 if (pci_mapreg_info(pc, tag, 0x10, 231 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 232 &swappbase, 0, 0) || 233 bus_space_map(sc->swapt, swappbase, 4, 0, &sc->swaph)) { 234 aprint_error_dev(self, "can't map byteswap register\n"); 235 return; 236 } 237 /* 238 * Set up cycle specific byteswap mode. 239 * XXX Readback yields "all-ones" for me, and it doesn't seem 240 * to matter what I write into the register - the data don't 241 * get swapped. Adapter fault or documentation bug? 242 */ 243 bus_space_write_4(sc->swapt, sc->swaph, 0, 0x00000490); 244 245 /* VME space is mapped as needed */ 246 sc->vmet = pa->pa_memt; 247 if (pci_mapreg_info(pc, tag, 0x14, 248 PCI_MAPREG_TYPE_MEM | PCI_MAPREG_MEM_TYPE_32BIT, 249 &sc->vmepbase, 0, 0)) { 250 aprint_error_dev(self, "VME range not assigned\n"); 251 return; 252 } 253 #ifdef BIT3DEBUG 254 aprint_debug_dev(self, "VME window @%lx\n", 255 (long)sc->vmepbase); 256 #endif 257 258 for (i = 0; i < 8; i++) { 259 sc->windowused[i] = 0; 260 } 261 sc->vmeext = extent_create("pcivme", sc->vmepbase, 262 sc->vmepbase + 32*1024*1024 - 1, M_DEVBUF, 263 sc->vmemap, sizeof(sc->vmemap), 264 EX_NOCOALESCE); 265 266 sc->sc_vct.cookie = self; 267 sc->sc_vct.vct_probe = b3_2706_vme_probe; 268 sc->sc_vct.vct_map = b3_2706_map_vme; 269 sc->sc_vct.vct_unmap = b3_2706_unmap_vme; 270 sc->sc_vct.vct_int_map = b3_2706_map_vmeint; 271 sc->sc_vct.vct_int_establish = b3_2706_establish_vmeint; 272 sc->sc_vct.vct_int_disestablish = b3_2706_disestablish_vmeint; 273 sc->sc_vct.vct_dmamap_create = b3_2706_dmamap_create; 274 sc->sc_vct.vct_dmamap_destroy = b3_2706_dmamap_destroy; 275 sc->sc_vct.vct_dmamem_alloc = b3_2706_dmamem_alloc; 276 sc->sc_vct.vct_dmamem_free = b3_2706_dmamem_free; 277 278 vaa.va_vct = &(sc->sc_vct); 279 vaa.va_bdt = pa->pa_dmat; /* XXX */ 280 vaa.va_slaveconfig = 0; /* XXX CSR window? */ 281 282 config_found(self, &vaa, 0); 283 } 284 285 #define sc ((struct b3_2706_softc*)vsc) 286 287 int 288 b3_2706_map_vme(void *vsc, vme_addr_t vmeaddr, vme_size_t len, vme_am_t am, vme_datasize_t datasizes, vme_swap_t swap, bus_space_tag_t *tag, bus_space_handle_t *handle, vme_mapresc_t *resc) 289 { 290 int idx, i, wnd, res; 291 unsigned long boundary, maplen, pcibase; 292 vme_addr_t vmebase, vmeend; 293 static int windoworder[8] = {1, 2, 3, 5, 6, 7, 0, 4}; 294 295 /* prefer windows with fine granularity for small mappings */ 296 wnd = -1; 297 if (len <= 32*1024) 298 idx = 6; 299 else 300 idx = 0; 301 for (i = 0; i < 8; i++) { 302 if (!sc->windowused[windoworder[idx]]) { 303 wnd = windoworder[idx]; 304 sc->windowused[wnd] = 1; 305 break; 306 } 307 idx = (idx + 1) % 8; 308 } 309 if (wnd == -1) 310 return (ENOSPC); 311 312 boundary = (wnd & 3) ? 64*1024 : 4*1024; 313 314 /* first mapped address */ 315 vmebase = vmeaddr & ~(boundary - 1); 316 /* base of last mapped page */ 317 vmeend = (vmeaddr + len - 1) & ~(boundary - 1); 318 /* bytes in outgoing window required */ 319 maplen = vmeend - vmebase + boundary; 320 321 if (extent_alloc(sc->vmeext, maplen, boundary, 0, EX_FAST, &pcibase)) { 322 sc->windowused[wnd] = 0; 323 return (ENOMEM); 324 } 325 326 res = univ_pci_mapvme(&sc->univdata, wnd, vmebase, maplen, 327 am, datasizes, pcibase); 328 if (res) { 329 extent_free(sc->vmeext, pcibase, maplen, 0); 330 sc->windowused[wnd] = 0; 331 return (res); 332 } 333 334 res = bus_space_map(sc->vmet, pcibase + (vmeaddr - vmebase), len, 335 0, handle); 336 if (res) { 337 univ_pci_unmapvme(&sc->univdata, wnd); 338 extent_free(sc->vmeext, pcibase, maplen, 0); 339 sc->windowused[wnd] = 0; 340 return (res); 341 } 342 343 *tag = sc->vmet; 344 345 /* 346 * save all data needed for later unmapping 347 */ 348 sc->vmemaprescs[wnd].wnd = wnd; 349 sc->vmemaprescs[wnd].pcibase = pcibase; 350 sc->vmemaprescs[wnd].maplen = maplen; 351 sc->vmemaprescs[wnd].handle = *handle; 352 sc->vmemaprescs[wnd].len = len; 353 *resc = &sc->vmemaprescs[wnd]; 354 return (0); 355 } 356 357 void 358 b3_2706_unmap_vme(void *vsc, vme_mapresc_t resc) 359 { 360 struct b3_2706_vmemaprescs *r = resc; 361 362 bus_space_unmap(sc->vmet, r->handle, r->len); 363 extent_free(sc->vmeext, r->pcibase, r->maplen, 0); 364 365 if (!sc->windowused[r->wnd]) 366 panic("b3_2706_unmap_vme: bad window"); 367 univ_pci_unmapvme(&sc->univdata, r->wnd); 368 sc->windowused[r->wnd] = 0; 369 } 370 371 int 372 b3_2706_vme_probe(vsc, addr, len, am, datasize, callback, cbarg) 373 void *vsc; 374 vme_addr_t addr; 375 vme_size_t len; 376 vme_am_t am; 377 vme_datasize_t datasize; 378 int (*callback)(void *, bus_space_tag_t, bus_space_handle_t); 379 void *cbarg; 380 { 381 bus_space_tag_t tag; 382 bus_space_handle_t handle; 383 vme_mapresc_t resc; 384 int res, i; 385 volatile u_int32_t dummy; 386 387 res = b3_2706_map_vme(vsc, addr, len, am, datasize, 0, 388 &tag, &handle, &resc); 389 if (res) 390 return (res); 391 392 if (univ_pci_vmebuserr(&sc->univdata, 1)) 393 printf("b3_2706_vme_badaddr: TA bit not clean - reset\n"); 394 395 if (callback) 396 res = (*callback)(cbarg, tag, handle); 397 else { 398 for (i = 0; i < len;) { 399 switch (datasize) { 400 case VME_D8: 401 dummy = bus_space_read_1(tag, handle, i); 402 i++; 403 break; 404 case VME_D16: 405 dummy = bus_space_read_2(tag, handle, i); 406 i += 2; 407 break; 408 case VME_D32: 409 dummy = bus_space_read_4(tag, handle, i); 410 i += 4; 411 break; 412 default: 413 panic("b3_2706_vme_probe: invalid datasize %x", 414 datasize); 415 } 416 } 417 } 418 419 if (univ_pci_vmebuserr(&sc->univdata, 0)) { 420 #ifdef BIT3DEBUG 421 printf("b3_2706_vme_badaddr: caught TA\n"); 422 #endif 423 univ_pci_vmebuserr(&sc->univdata, 1); 424 res = EIO; 425 } 426 427 b3_2706_unmap_vme(vsc, resc); 428 return (res); 429 } 430 431 int 432 b3_2706_map_vmeint(vsc, level, vector, handlep) 433 void *vsc; 434 int level, vector; 435 vme_intr_handle_t *handlep; 436 { 437 438 *handlep = (void *)(long)((level << 8) | vector); /* XXX */ 439 return (0); 440 } 441 442 void * 443 b3_2706_establish_vmeint(vsc, handle, prior, func, arg) 444 void *vsc; 445 vme_intr_handle_t handle; 446 int prior; 447 int (*func)(void *); 448 void *arg; 449 { 450 struct b3_2706_vmeintrhand *ih; 451 long lv; 452 int s; 453 454 /* no point in sleeping unless someone can free memory. */ 455 ih = malloc(sizeof *ih, M_DEVBUF, cold ? M_NOWAIT : M_WAITOK); 456 if (ih == NULL) 457 panic("b3_2706_map_vmeint: can't malloc handler info"); 458 459 lv = (long)handle; /* XXX */ 460 461 ih->ih_fun = func; 462 ih->ih_arg = arg; 463 ih->ih_level = lv >> 8; 464 ih->ih_vector = lv & 0xff; 465 ih->ih_prior = prior; 466 ih->ih_count = 0; 467 468 s = splhigh(); 469 TAILQ_INSERT_TAIL(&(sc->intrhdls), ih, ih_next); 470 splx(s); 471 472 return (ih); 473 } 474 475 void 476 b3_2706_disestablish_vmeint(void *vsc, void *cookie) 477 { 478 struct b3_2706_vmeintrhand *ih = cookie; 479 int s; 480 481 if (!ih) { 482 printf("b3_2706_unmap_vmeint: NULL arg\n"); 483 return; 484 } 485 486 s = splhigh(); 487 TAILQ_REMOVE(&(sc->intrhdls), ih, ih_next); 488 splx(s); 489 490 free(ih, M_DEVBUF); 491 } 492 493 void 494 b3_2706_vmeint(vsc, level, vector) 495 void *vsc; 496 int level, vector; 497 { 498 struct b3_2706_vmeintrhand *ih; 499 int found; 500 501 #ifdef BIT3DEBUG 502 printf("b3_2706_vmeint: VME IRQ %d, vec %x\n", level, vector); 503 #endif 504 found = 0; 505 506 for (ih = sc->intrhdls.tqh_first; ih; 507 ih = ih->ih_next.tqe_next) { 508 if ((ih->ih_level == level) && 509 ((ih->ih_vector == -1) || 510 (ih->ih_vector == vector))) { 511 int s, res; 512 /* 513 * We should raise the interrupt level 514 * to ih->ih_prior here. How to do this 515 * machine-independently? 516 * To be safe, raise to the maximum. 517 */ 518 s = splhigh(); 519 found |= (res = (*(ih->ih_fun))(ih->ih_arg)); 520 splx(s); 521 if (res) 522 ih->ih_count++; 523 if (res == 1) 524 break; 525 } 526 } 527 if (!found) 528 sc->strayintrs++; 529 } 530 531 int 532 b3_2706_dmamap_create(vsc, len, am, datasize, swap, 533 nsegs, segsz, bound, 534 flags, mapp) 535 void *vsc; 536 vme_size_t len; 537 vme_am_t am; 538 vme_datasize_t datasize; 539 vme_swap_t swap; 540 int nsegs; 541 vme_size_t segsz; 542 vme_addr_t bound; 543 int flags; 544 bus_dmamap_t *mapp; 545 { 546 return (EINVAL); 547 } 548 549 void 550 b3_2706_dmamap_destroy(void *vsc, bus_dmamap_t map) 551 { 552 } 553 554 int 555 b3_2706_dmamem_alloc(void *vsc, vme_size_t len, vme_am_t am, vme_datasize_t datasizes, vme_swap_t swap, bus_dma_segment_t *segs, int nsegs, int *rsegs, int flags) 556 { 557 return (EINVAL); 558 } 559 560 void 561 b3_2706_dmamem_free(void *vsc, bus_dma_segment_t *segs, int nsegs) 562 { 563 } 564 565 #undef sc 566
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