1 /* $NetBSD: if_atw_pci.c,v 1.29 2022/09/25 17:52:25 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; Charles M. Hannum; and David Young. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 21 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 22 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 23 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 24 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 25 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 26 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 27 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 28 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 29 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 30 * POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 /* 34 * PCI bus front-end for the ADMtek ADM8211 802.11 MAC/BBP chip. 35 * 36 * Derived from the ``Tulip'' PCI bus front-end. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: if_atw_pci.c,v 1.29 2022/09/25 17:52:25 thorpej Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/mbuf.h> 45 #include <sys/kernel.h> 46 #include <sys/socket.h> 47 #include <sys/ioctl.h> 48 #include <sys/errno.h> 49 #include <sys/device.h> 50 51 #include <machine/endian.h> 52 53 #include <net/if.h> 54 #include <net/if_dl.h> 55 #include <net/if_media.h> 56 #include <net/if_ether.h> 57 58 #include <net80211/ieee80211_netbsd.h> 59 #include <net80211/ieee80211_radiotap.h> 60 #include <net80211/ieee80211_var.h> 61 62 #include <sys/bus.h> 63 #include <sys/intr.h> 64 65 #include <dev/ic/atwreg.h> 66 #include <dev/ic/rf3000reg.h> 67 #include <dev/ic/si4136reg.h> 68 #include <dev/ic/atwvar.h> 69 70 #include <dev/pci/pcivar.h> 71 #include <dev/pci/pcireg.h> 72 #include <dev/pci/pcidevs.h> 73 74 /* 75 * PCI configuration space registers used by the ADM8211. 76 */ 77 #define ATW_PCI_IOBA PCI_BAR(0) /* i/o mapped base */ 78 #define ATW_PCI_MMBA PCI_BAR(1) /* memory mapped base */ 79 80 struct atw_pci_softc { 81 struct atw_softc psc_atw; /* real ADM8211 softc */ 82 83 pci_intr_handle_t psc_ih; /* interrupt handle */ 84 void *psc_intrcookie; 85 86 pci_chipset_tag_t psc_pc; /* our PCI chipset */ 87 pcitag_t psc_pcitag; /* our PCI tag */ 88 }; 89 90 static int atw_pci_match(device_t, cfdata_t, void *); 91 static void atw_pci_attach(device_t, device_t, void *); 92 static bool atw_pci_suspend(device_t, const pmf_qual_t *); 93 static bool atw_pci_resume(device_t, const pmf_qual_t *); 94 95 CFATTACH_DECL_NEW(atw_pci, sizeof(struct atw_pci_softc), 96 atw_pci_match, atw_pci_attach, NULL, NULL); 97 98 static const struct atw_pci_product { 99 u_int32_t app_vendor; /* PCI vendor ID */ 100 u_int32_t app_product; /* PCI product ID */ 101 const char *app_product_name; 102 } atw_pci_products[] = { 103 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211, 104 "ADMtek ADM8211 802.11 MAC/BBP" }, 105 106 { 0, 0, NULL }, 107 }; 108 109 static const struct atw_pci_product * 110 atw_pci_lookup(const struct pci_attach_args *pa) 111 { 112 const struct atw_pci_product *app; 113 114 for (app = atw_pci_products; 115 app->app_product_name != NULL; 116 app++) { 117 if (PCI_VENDOR(pa->pa_id) == app->app_vendor && 118 PCI_PRODUCT(pa->pa_id) == app->app_product) 119 return (app); 120 } 121 return (NULL); 122 } 123 124 static int 125 atw_pci_match(device_t parent, cfdata_t match, void *aux) 126 { 127 struct pci_attach_args *pa = aux; 128 129 if (atw_pci_lookup(pa) != NULL) 130 return (1); 131 132 return (0); 133 } 134 135 static bool 136 atw_pci_resume(device_t self, const pmf_qual_t *qual) 137 { 138 struct atw_pci_softc *psc = device_private(self); 139 struct atw_softc *sc = &psc->psc_atw; 140 141 /* XXX re-establishing interrupt shouldn't be needed */ 142 psc->psc_intrcookie = pci_intr_establish_xname(psc->psc_pc, psc->psc_ih, 143 IPL_NET, atw_intr, sc, device_xname(self)); 144 if (psc->psc_intrcookie == NULL) { 145 aprint_error_dev(sc->sc_dev, "unable to establish interrupt\n"); 146 return false; 147 } 148 149 return true; 150 } 151 152 static bool 153 atw_pci_suspend(device_t self, const pmf_qual_t *qual) 154 { 155 struct atw_pci_softc *psc = device_private(self); 156 157 /* Unhook the interrupt handler. */ 158 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 159 psc->psc_intrcookie = NULL; 160 161 return atw_suspend(self, qual); 162 } 163 164 static void 165 atw_pci_attach(device_t parent, device_t self, void *aux) 166 { 167 struct atw_pci_softc *psc = device_private(self); 168 struct atw_softc *sc = &psc->psc_atw; 169 struct pci_attach_args *pa = aux; 170 pci_chipset_tag_t pc = pa->pa_pc; 171 const char *intrstr = NULL; 172 bus_space_tag_t iot, memt; 173 bus_space_handle_t ioh, memh; 174 int ioh_valid, memh_valid; 175 const struct atw_pci_product *app; 176 int error; 177 char intrbuf[PCI_INTRSTR_LEN]; 178 179 sc->sc_dev = self; 180 181 psc->psc_pc = pa->pa_pc; 182 psc->psc_pcitag = pa->pa_tag; 183 184 app = atw_pci_lookup(pa); 185 if (app == NULL) { 186 printf("\n"); 187 panic("atw_pci_attach: impossible"); 188 } 189 190 aprint_naive("\n"); 191 /* 192 * Get revision info, and set some chip-specific variables. 193 */ 194 sc->sc_rev = PCI_REVISION(pa->pa_class); 195 aprint_normal(": %s, revision %d.%d\n", app->app_product_name, 196 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 197 198 /* power up chip */ 199 if ((error = pci_activate(pa->pa_pc, pa->pa_tag, self, 200 NULL)) && error != EOPNOTSUPP) { 201 aprint_error_dev(self, "cannot activate %d\n", error); 202 return; 203 } 204 205 /* 206 * Map the device. 207 */ 208 ioh_valid = (pci_mapreg_map(pa, ATW_PCI_IOBA, 209 PCI_MAPREG_TYPE_IO, 0, 210 &iot, &ioh, NULL, NULL) == 0); 211 memh_valid = (pci_mapreg_map(pa, ATW_PCI_MMBA, 212 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 213 &memt, &memh, NULL, NULL) == 0); 214 215 if (memh_valid) { 216 sc->sc_st = memt; 217 sc->sc_sh = memh; 218 } else if (ioh_valid) { 219 sc->sc_st = iot; 220 sc->sc_sh = ioh; 221 } else { 222 aprint_error_dev(self, "unable to map device registers\n"); 223 return; 224 } 225 226 sc->sc_dmat = pa->pa_dmat; 227 228 /* 229 * Make sure bus mastering is enabled. 230 */ 231 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 232 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 233 PCI_COMMAND_MASTER_ENABLE); 234 235 /* 236 * Get the cacheline size. 237 */ 238 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 239 PCI_BHLC_REG)); 240 241 /* 242 * Get PCI data moving command info. 243 */ 244 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) /* read line */ 245 sc->sc_flags |= ATWF_MRL; 246 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) /* read multiple */ 247 sc->sc_flags |= ATWF_MRM; 248 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) /* write invalidate */ 249 sc->sc_flags |= ATWF_MWI; 250 251 /* 252 * Map and establish our interrupt. 253 */ 254 if (pci_intr_map(pa, &psc->psc_ih)) { 255 aprint_error_dev(self, "unable to map interrupt\n"); 256 return; 257 } 258 intrstr = pci_intr_string(pc, psc->psc_ih, intrbuf, sizeof(intrbuf)); 259 psc->psc_intrcookie = pci_intr_establish_xname(pc, psc->psc_ih, IPL_NET, 260 atw_intr, sc, device_xname(self)); 261 if (psc->psc_intrcookie == NULL) { 262 aprint_error_dev(self, "unable to establish interrupt"); 263 if (intrstr != NULL) 264 aprint_error(" at %s", intrstr); 265 aprint_error("\n"); 266 return; 267 } 268 269 aprint_normal_dev(self, "interrupting at %s\n", intrstr); 270 271 /* 272 * Bus-independent attach. 273 */ 274 atw_attach(sc); 275 276 if (pmf_device_register1(sc->sc_dev, atw_pci_suspend, atw_pci_resume, 277 atw_shutdown)) 278 pmf_class_network_register(sc->sc_dev, &sc->sc_if); 279 else 280 aprint_error_dev(self, "couldn't establish power handler\n"); 281 282 /* 283 * Power down the socket. 284 */ 285 pmf_device_suspend(sc->sc_dev, &sc->sc_qual); 286 } 287
Indexes created Wed Sep 24 05:09:52 GMT 2025