if_atw_pci.c revision 1.7.2.7 1 1.7.2.7 skrll /* $NetBSD: if_atw_pci.c,v 1.7.2.7 2005/03/04 16:45:17 skrll Exp $ */
2 1.7.2.2 skrll
3 1.7.2.2 skrll /*-
4 1.7.2.2 skrll * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc.
5 1.7.2.2 skrll * All rights reserved.
6 1.7.2.2 skrll *
7 1.7.2.2 skrll * This code is derived from software contributed to The NetBSD Foundation
8 1.7.2.2 skrll * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
9 1.7.2.2 skrll * NASA Ames Research Center; Charles M. Hannum; and David Young.
10 1.7.2.2 skrll *
11 1.7.2.2 skrll * Redistribution and use in source and binary forms, with or without
12 1.7.2.2 skrll * modification, are permitted provided that the following conditions
13 1.7.2.2 skrll * are met:
14 1.7.2.2 skrll * 1. Redistributions of source code must retain the above copyright
15 1.7.2.2 skrll * notice, this list of conditions and the following disclaimer.
16 1.7.2.2 skrll * 2. Redistributions in binary form must reproduce the above copyright
17 1.7.2.2 skrll * notice, this list of conditions and the following disclaimer in the
18 1.7.2.2 skrll * documentation and/or other materials provided with the distribution.
19 1.7.2.2 skrll * 3. All advertising materials mentioning features or use of this software
20 1.7.2.2 skrll * must display the following acknowledgement:
21 1.7.2.2 skrll * This product includes software developed by the NetBSD
22 1.7.2.2 skrll * Foundation, Inc. and its contributors.
23 1.7.2.2 skrll * 4. Neither the name of The NetBSD Foundation nor the names of its
24 1.7.2.2 skrll * contributors may be used to endorse or promote products derived
25 1.7.2.2 skrll * from this software without specific prior written permission.
26 1.7.2.2 skrll *
27 1.7.2.2 skrll * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
28 1.7.2.2 skrll * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
29 1.7.2.2 skrll * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
30 1.7.2.2 skrll * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
31 1.7.2.2 skrll * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
32 1.7.2.2 skrll * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
33 1.7.2.2 skrll * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
34 1.7.2.2 skrll * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
35 1.7.2.2 skrll * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
36 1.7.2.2 skrll * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
37 1.7.2.2 skrll * POSSIBILITY OF SUCH DAMAGE.
38 1.7.2.2 skrll */
39 1.7.2.2 skrll
40 1.7.2.2 skrll /*
41 1.7.2.2 skrll * PCI bus front-end for the ADMtek ADM8211 802.11 MAC/BBP chip.
42 1.7.2.2 skrll *
43 1.7.2.2 skrll * Derived from the ``Tulip'' PCI bus front-end.
44 1.7.2.2 skrll */
45 1.7.2.2 skrll
46 1.7.2.2 skrll #include <sys/cdefs.h>
47 1.7.2.7 skrll __KERNEL_RCSID(0, "$NetBSD: if_atw_pci.c,v 1.7.2.7 2005/03/04 16:45:17 skrll Exp $");
48 1.7.2.2 skrll
49 1.7.2.2 skrll #include <sys/param.h>
50 1.7.2.7 skrll #include <sys/systm.h>
51 1.7.2.7 skrll #include <sys/mbuf.h>
52 1.7.2.2 skrll #include <sys/malloc.h>
53 1.7.2.2 skrll #include <sys/kernel.h>
54 1.7.2.2 skrll #include <sys/socket.h>
55 1.7.2.2 skrll #include <sys/ioctl.h>
56 1.7.2.2 skrll #include <sys/errno.h>
57 1.7.2.2 skrll #include <sys/device.h>
58 1.7.2.2 skrll
59 1.7.2.2 skrll #include <machine/endian.h>
60 1.7.2.7 skrll
61 1.7.2.2 skrll #include <net/if.h>
62 1.7.2.2 skrll #include <net/if_dl.h>
63 1.7.2.2 skrll #include <net/if_media.h>
64 1.7.2.2 skrll #include <net/if_ether.h>
65 1.7.2.2 skrll
66 1.7.2.2 skrll #include <net80211/ieee80211_compat.h>
67 1.7.2.2 skrll #include <net80211/ieee80211_radiotap.h>
68 1.7.2.2 skrll #include <net80211/ieee80211_var.h>
69 1.7.2.2 skrll
70 1.7.2.2 skrll #include <machine/bus.h>
71 1.7.2.2 skrll #include <machine/intr.h>
72 1.7.2.2 skrll
73 1.7.2.2 skrll #include <dev/ic/atwreg.h>
74 1.7.2.2 skrll #include <dev/ic/rf3000reg.h>
75 1.7.2.2 skrll #include <dev/ic/si4136reg.h>
76 1.7.2.2 skrll #include <dev/ic/atwvar.h>
77 1.7.2.2 skrll
78 1.7.2.2 skrll #include <dev/pci/pcivar.h>
79 1.7.2.2 skrll #include <dev/pci/pcireg.h>
80 1.7.2.2 skrll #include <dev/pci/pcidevs.h>
81 1.7.2.2 skrll
82 1.7.2.2 skrll /*
83 1.7.2.2 skrll * PCI configuration space registers used by the ADM8211.
84 1.7.2.2 skrll */
85 1.7.2.2 skrll #define ATW_PCI_IOBA 0x10 /* i/o mapped base */
86 1.7.2.2 skrll #define ATW_PCI_MMBA 0x14 /* memory mapped base */
87 1.7.2.2 skrll
88 1.7.2.2 skrll struct atw_pci_softc {
89 1.7.2.2 skrll struct atw_softc psc_atw; /* real ADM8211 softc */
90 1.7.2.2 skrll
91 1.7.2.2 skrll pci_intr_handle_t psc_ih; /* interrupt handle */
92 1.7.2.2 skrll void *psc_intrcookie;
93 1.7.2.2 skrll
94 1.7.2.2 skrll pci_chipset_tag_t psc_pc; /* our PCI chipset */
95 1.7.2.2 skrll pcitag_t psc_pcitag; /* our PCI tag */
96 1.7.2.2 skrll };
97 1.7.2.2 skrll
98 1.7.2.4 skrll static int atw_pci_match(struct device *, struct cfdata *, void *);
99 1.7.2.4 skrll static void atw_pci_attach(struct device *, struct device *, void *);
100 1.7.2.2 skrll
101 1.7.2.2 skrll CFATTACH_DECL(atw_pci, sizeof(struct atw_pci_softc),
102 1.7.2.2 skrll atw_pci_match, atw_pci_attach, NULL, NULL);
103 1.7.2.2 skrll
104 1.7.2.4 skrll static const struct atw_pci_product {
105 1.7.2.2 skrll u_int32_t app_vendor; /* PCI vendor ID */
106 1.7.2.2 skrll u_int32_t app_product; /* PCI product ID */
107 1.7.2.2 skrll const char *app_product_name;
108 1.7.2.2 skrll } atw_pci_products[] = {
109 1.7.2.2 skrll { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211,
110 1.7.2.2 skrll "ADMtek ADM8211 802.11 MAC/BBP" },
111 1.7.2.2 skrll
112 1.7.2.2 skrll { 0, 0, NULL },
113 1.7.2.2 skrll };
114 1.7.2.2 skrll
115 1.7.2.4 skrll static const struct atw_pci_product *
116 1.7.2.2 skrll atw_pci_lookup(const struct pci_attach_args *pa)
117 1.7.2.2 skrll {
118 1.7.2.2 skrll const struct atw_pci_product *app;
119 1.7.2.2 skrll
120 1.7.2.2 skrll for (app = atw_pci_products;
121 1.7.2.2 skrll app->app_product_name != NULL;
122 1.7.2.2 skrll app++) {
123 1.7.2.2 skrll if (PCI_VENDOR(pa->pa_id) == app->app_vendor &&
124 1.7.2.2 skrll PCI_PRODUCT(pa->pa_id) == app->app_product)
125 1.7.2.2 skrll return (app);
126 1.7.2.2 skrll }
127 1.7.2.2 skrll return (NULL);
128 1.7.2.2 skrll }
129 1.7.2.2 skrll
130 1.7.2.4 skrll static int
131 1.7.2.2 skrll atw_pci_match(struct device *parent, struct cfdata *match, void *aux)
132 1.7.2.2 skrll {
133 1.7.2.2 skrll struct pci_attach_args *pa = aux;
134 1.7.2.2 skrll
135 1.7.2.2 skrll if (atw_pci_lookup(pa) != NULL)
136 1.7.2.2 skrll return (1);
137 1.7.2.2 skrll
138 1.7.2.2 skrll return (0);
139 1.7.2.2 skrll }
140 1.7.2.2 skrll
141 1.7.2.2 skrll static int
142 1.7.2.2 skrll atw_pci_enable(struct atw_softc *sc)
143 1.7.2.2 skrll {
144 1.7.2.2 skrll struct atw_pci_softc *psc = (void *)sc;
145 1.7.2.2 skrll
146 1.7.2.2 skrll /* Establish the interrupt. */
147 1.7.2.2 skrll psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih,
148 1.7.2.2 skrll IPL_NET, atw_intr, sc);
149 1.7.2.2 skrll if (psc->psc_intrcookie == NULL) {
150 1.7.2.2 skrll printf("%s: unable to establish interrupt\n",
151 1.7.2.2 skrll sc->sc_dev.dv_xname);
152 1.7.2.2 skrll return (1);
153 1.7.2.2 skrll }
154 1.7.2.2 skrll
155 1.7.2.2 skrll return (0);
156 1.7.2.2 skrll }
157 1.7.2.2 skrll
158 1.7.2.2 skrll static void
159 1.7.2.2 skrll atw_pci_disable(struct atw_softc *sc)
160 1.7.2.2 skrll {
161 1.7.2.2 skrll struct atw_pci_softc *psc = (void *)sc;
162 1.7.2.2 skrll
163 1.7.2.2 skrll /* Unhook the interrupt handler. */
164 1.7.2.2 skrll pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie);
165 1.7.2.2 skrll psc->psc_intrcookie = NULL;
166 1.7.2.2 skrll }
167 1.7.2.2 skrll
168 1.7.2.4 skrll static void
169 1.7.2.2 skrll atw_pci_attach(struct device *parent, struct device *self, void *aux)
170 1.7.2.2 skrll {
171 1.7.2.2 skrll struct atw_pci_softc *psc = (void *) self;
172 1.7.2.2 skrll struct atw_softc *sc = &psc->psc_atw;
173 1.7.2.2 skrll struct pci_attach_args *pa = aux;
174 1.7.2.2 skrll pci_chipset_tag_t pc = pa->pa_pc;
175 1.7.2.2 skrll const char *intrstr = NULL;
176 1.7.2.2 skrll bus_space_tag_t iot, memt;
177 1.7.2.2 skrll bus_space_handle_t ioh, memh;
178 1.7.2.2 skrll int ioh_valid, memh_valid;
179 1.7.2.2 skrll const struct atw_pci_product *app;
180 1.7.2.2 skrll pcireg_t reg;
181 1.7.2.3 skrll int pmreg;
182 1.7.2.2 skrll
183 1.7.2.2 skrll psc->psc_pc = pa->pa_pc;
184 1.7.2.2 skrll psc->psc_pcitag = pa->pa_tag;
185 1.7.2.2 skrll
186 1.7.2.2 skrll app = atw_pci_lookup(pa);
187 1.7.2.2 skrll if (app == NULL) {
188 1.7.2.2 skrll printf("\n");
189 1.7.2.2 skrll panic("atw_pci_attach: impossible");
190 1.7.2.2 skrll }
191 1.7.2.2 skrll
192 1.7.2.2 skrll /*
193 1.7.2.2 skrll * No power management hooks.
194 1.7.2.2 skrll * XXX Maybe we should add some!
195 1.7.2.2 skrll */
196 1.7.2.2 skrll sc->sc_flags |= ATWF_ENABLED;
197 1.7.2.2 skrll
198 1.7.2.2 skrll /*
199 1.7.2.2 skrll * Get revision info, and set some chip-specific variables.
200 1.7.2.2 skrll */
201 1.7.2.3 skrll sc->sc_rev = PCI_REVISION(pa->pa_class);
202 1.7.2.3 skrll printf(": %s, revision %d.%d\n", app->app_product_name,
203 1.7.2.3 skrll (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf);
204 1.7.2.2 skrll
205 1.7.2.2 skrll /*
206 1.7.2.2 skrll * Check to see if the device is in power-save mode, and
207 1.7.2.2 skrll * being it out if necessary.
208 1.7.2.2 skrll *
209 1.7.2.2 skrll * XXX This code comes almost verbatim from if_tlp_pci.c. I do
210 1.7.2.2 skrll * not understand it. Tulip clears the "sleep mode" bit in the
211 1.7.2.2 skrll * CFDA register, first. There is an equivalent (?) register at the
212 1.7.2.2 skrll * same place in the ADM8211, but the docs do not assign its bits
213 1.7.2.2 skrll * any meanings. -dcy
214 1.7.2.2 skrll */
215 1.7.2.2 skrll if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
216 1.7.2.2 skrll reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR);
217 1.7.2.2 skrll switch (reg & PCI_PMCSR_STATE_MASK) {
218 1.7.2.2 skrll case PCI_PMCSR_STATE_D1:
219 1.7.2.2 skrll case PCI_PMCSR_STATE_D2:
220 1.7.2.2 skrll printf(": waking up from power state D%d\n%s",
221 1.7.2.2 skrll reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname);
222 1.7.2.2 skrll pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR,
223 1.7.2.2 skrll (reg & ~PCI_PMCSR_STATE_MASK) |
224 1.7.2.2 skrll PCI_PMCSR_STATE_D0);
225 1.7.2.2 skrll break;
226 1.7.2.2 skrll case PCI_PMCSR_STATE_D3:
227 1.7.2.2 skrll /*
228 1.7.2.2 skrll * The card has lost all configuration data in
229 1.7.2.2 skrll * this state, so punt.
230 1.7.2.2 skrll */
231 1.7.2.2 skrll printf(": unable to wake up from power state D3, "
232 1.7.2.2 skrll "reboot required.\n");
233 1.7.2.2 skrll pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR,
234 1.7.2.2 skrll (reg & ~PCI_PMCSR_STATE_MASK) |
235 1.7.2.2 skrll PCI_PMCSR_STATE_D0);
236 1.7.2.2 skrll return;
237 1.7.2.2 skrll }
238 1.7.2.2 skrll }
239 1.7.2.2 skrll
240 1.7.2.2 skrll /*
241 1.7.2.2 skrll * Map the device.
242 1.7.2.2 skrll */
243 1.7.2.2 skrll ioh_valid = (pci_mapreg_map(pa, ATW_PCI_IOBA,
244 1.7.2.2 skrll PCI_MAPREG_TYPE_IO, 0,
245 1.7.2.2 skrll &iot, &ioh, NULL, NULL) == 0);
246 1.7.2.2 skrll memh_valid = (pci_mapreg_map(pa, ATW_PCI_MMBA,
247 1.7.2.2 skrll PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
248 1.7.2.2 skrll &memt, &memh, NULL, NULL) == 0);
249 1.7.2.2 skrll
250 1.7.2.2 skrll if (memh_valid) {
251 1.7.2.2 skrll sc->sc_st = memt;
252 1.7.2.2 skrll sc->sc_sh = memh;
253 1.7.2.2 skrll } else if (ioh_valid) {
254 1.7.2.2 skrll sc->sc_st = iot;
255 1.7.2.2 skrll sc->sc_sh = ioh;
256 1.7.2.2 skrll } else {
257 1.7.2.2 skrll printf(": unable to map device registers\n");
258 1.7.2.2 skrll return;
259 1.7.2.2 skrll }
260 1.7.2.2 skrll
261 1.7.2.2 skrll sc->sc_dmat = pa->pa_dmat;
262 1.7.2.2 skrll
263 1.7.2.2 skrll /*
264 1.7.2.2 skrll * Make sure bus mastering is enabled.
265 1.7.2.2 skrll */
266 1.7.2.2 skrll pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG,
267 1.7.2.2 skrll pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) |
268 1.7.2.2 skrll PCI_COMMAND_MASTER_ENABLE);
269 1.7.2.2 skrll
270 1.7.2.2 skrll /*
271 1.7.2.2 skrll * Get the cacheline size.
272 1.7.2.2 skrll */
273 1.7.2.2 skrll sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag,
274 1.7.2.2 skrll PCI_BHLC_REG));
275 1.7.2.2 skrll
276 1.7.2.2 skrll /*
277 1.7.2.2 skrll * Get PCI data moving command info.
278 1.7.2.2 skrll */
279 1.7.2.2 skrll if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) /* read line */
280 1.7.2.2 skrll sc->sc_flags |= ATWF_MRL;
281 1.7.2.2 skrll if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) /* read multiple */
282 1.7.2.2 skrll sc->sc_flags |= ATWF_MRM;
283 1.7.2.2 skrll if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) /* write invalidate */
284 1.7.2.2 skrll sc->sc_flags |= ATWF_MWI;
285 1.7.2.2 skrll
286 1.7.2.2 skrll /*
287 1.7.2.2 skrll * Map and establish our interrupt.
288 1.7.2.2 skrll */
289 1.7.2.2 skrll if (pci_intr_map(pa, &psc->psc_ih)) {
290 1.7.2.2 skrll printf("%s: unable to map interrupt\n",
291 1.7.2.2 skrll sc->sc_dev.dv_xname);
292 1.7.2.2 skrll return;
293 1.7.2.2 skrll }
294 1.7.2.7 skrll intrstr = pci_intr_string(pc, psc->psc_ih);
295 1.7.2.2 skrll psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET,
296 1.7.2.2 skrll atw_intr, sc);
297 1.7.2.2 skrll if (psc->psc_intrcookie == NULL) {
298 1.7.2.2 skrll printf("%s: unable to establish interrupt",
299 1.7.2.2 skrll sc->sc_dev.dv_xname);
300 1.7.2.2 skrll if (intrstr != NULL)
301 1.7.2.2 skrll printf(" at %s", intrstr);
302 1.7.2.2 skrll printf("\n");
303 1.7.2.2 skrll return;
304 1.7.2.2 skrll }
305 1.7.2.2 skrll
306 1.7.2.2 skrll printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
307 1.7.2.2 skrll
308 1.7.2.2 skrll sc->sc_enable = atw_pci_enable;
309 1.7.2.2 skrll sc->sc_disable = atw_pci_disable;
310 1.7.2.2 skrll
311 1.7.2.2 skrll /*
312 1.7.2.2 skrll * Finish off the attach.
313 1.7.2.2 skrll */
314 1.7.2.2 skrll atw_attach(sc);
315 1.7.2.2 skrll }
316