if_atw_pci.c revision 1.4
1 /* $NetBSD: if_atw_pci.c,v 1.4 2004/01/29 10:06:19 dyoung Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; Charles M. Hannum; and David Young. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the ADMtek ADM8211 802.11 MAC/BBP chip. 42 * 43 * Derived from the ``Tulip'' PCI bus front-end. 44 */ 45 46 #include <sys/cdefs.h> 47 __KERNEL_RCSID(0, "$NetBSD: if_atw_pci.c,v 1.4 2004/01/29 10:06:19 dyoung Exp $"); 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <machine/endian.h> 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_ether.h> 65 66 #include <net80211/ieee80211_compat.h> 67 #include <net80211/ieee80211_radiotap.h> 68 #include <net80211/ieee80211_var.h> 69 70 #include <machine/bus.h> 71 #include <machine/intr.h> 72 73 #include <dev/ic/atwreg.h> 74 #include <dev/ic/atwvar.h> 75 76 #include <dev/pci/pcivar.h> 77 #include <dev/pci/pcireg.h> 78 #include <dev/pci/pcidevs.h> 79 80 /* 81 * PCI configuration space registers used by the ADM8211. 82 */ 83 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */ 84 #define ATW_PCI_MMBA 0x14 /* memory mapped base */ 85 86 struct atw_pci_softc { 87 struct atw_softc psc_atw; /* real ADM8211 softc */ 88 89 pci_intr_handle_t psc_ih; /* interrupt handle */ 90 void *psc_intrcookie; 91 92 pci_chipset_tag_t psc_pc; /* our PCI chipset */ 93 pcitag_t psc_pcitag; /* our PCI tag */ 94 }; 95 96 int atw_pci_match __P((struct device *, struct cfdata *, void *)); 97 void atw_pci_attach __P((struct device *, struct device *, void *)); 98 99 CFATTACH_DECL(atw_pci, sizeof(struct atw_pci_softc), 100 atw_pci_match, atw_pci_attach, NULL, NULL); 101 102 const struct atw_pci_product { 103 u_int32_t app_vendor; /* PCI vendor ID */ 104 u_int32_t app_product; /* PCI product ID */ 105 const char *app_product_name; 106 } atw_pci_products[] = { 107 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211, 108 "ADMtek ADM8211 802.11 MAC/BBP" }, 109 110 { 0, 0, NULL }, 111 }; 112 113 const struct atw_pci_product *atw_pci_lookup 114 __P((const struct pci_attach_args *)); 115 116 const struct atw_pci_product * 117 atw_pci_lookup(pa) 118 const struct pci_attach_args *pa; 119 { 120 const struct atw_pci_product *app; 121 122 for (app = atw_pci_products; 123 app->app_product_name != NULL; 124 app++) { 125 if (PCI_VENDOR(pa->pa_id) == app->app_vendor && 126 PCI_PRODUCT(pa->pa_id) == app->app_product) 127 return (app); 128 } 129 return (NULL); 130 } 131 132 int 133 atw_pci_match(parent, match, aux) 134 struct device *parent; 135 struct cfdata *match; 136 void *aux; 137 { 138 struct pci_attach_args *pa = aux; 139 140 if (atw_pci_lookup(pa) != NULL) 141 return (1); 142 143 return (0); 144 } 145 146 static int 147 atw_pci_enable(struct atw_softc *sc) 148 { 149 struct atw_pci_softc *psc = (void *)sc; 150 151 /* Establish the interrupt. */ 152 psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih, 153 IPL_NET, atw_intr, sc); 154 if (psc->psc_intrcookie == NULL) { 155 printf("%s: unable to establish interrupt\n", 156 sc->sc_dev.dv_xname); 157 return (1); 158 } 159 160 return (0); 161 } 162 163 static void 164 atw_pci_disable(struct atw_softc *sc) 165 { 166 struct atw_pci_softc *psc = (void *)sc; 167 168 /* Unhook the interrupt handler. */ 169 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 170 psc->psc_intrcookie = NULL; 171 } 172 173 void 174 atw_pci_attach(parent, self, aux) 175 struct device *parent, *self; 176 void *aux; 177 { 178 struct atw_pci_softc *psc = (void *) self; 179 struct atw_softc *sc = &psc->psc_atw; 180 struct pci_attach_args *pa = aux; 181 pci_chipset_tag_t pc = pa->pa_pc; 182 const char *intrstr = NULL; 183 bus_space_tag_t iot, memt; 184 bus_space_handle_t ioh, memh; 185 int ioh_valid, memh_valid; 186 const struct atw_pci_product *app; 187 pcireg_t reg; 188 int pmreg, rev; 189 190 psc->psc_pc = pa->pa_pc; 191 psc->psc_pcitag = pa->pa_tag; 192 193 app = atw_pci_lookup(pa); 194 if (app == NULL) { 195 printf("\n"); 196 panic("atw_pci_attach: impossible"); 197 } 198 199 /* 200 * No power management hooks. 201 * XXX Maybe we should add some! 202 */ 203 sc->sc_flags |= ATWF_ENABLED; 204 205 /* 206 * Get revision info, and set some chip-specific variables. 207 */ 208 rev = PCI_REVISION(pa->pa_class); 209 printf(": %s, pass %d.%d\n", app->app_product_name, 210 (rev >> 4) & 0xf, rev & 0xf); 211 212 /* 213 * Check to see if the device is in power-save mode, and 214 * being it out if necessary. 215 * 216 * XXX This code comes almost verbatim from if_tlp_pci.c. I do 217 * not understand it. Tulip clears the "sleep mode" bit in the 218 * CFDA register, first. There is an equivalent (?) register at the 219 * same place in the ADM8211, but the docs do not assign its bits 220 * any meanings. -dcy 221 */ 222 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 223 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 224 switch (reg & PCI_PMCSR_STATE_MASK) { 225 case PCI_PMCSR_STATE_D1: 226 case PCI_PMCSR_STATE_D2: 227 printf(": waking up from power state D%d\n%s", 228 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 229 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 230 (reg & ~PCI_PMCSR_STATE_MASK) | 231 PCI_PMCSR_STATE_D0); 232 break; 233 case PCI_PMCSR_STATE_D3: 234 /* 235 * The card has lost all configuration data in 236 * this state, so punt. 237 */ 238 printf(": unable to wake up from power state D3, " 239 "reboot required.\n"); 240 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 241 (reg & ~PCI_PMCSR_STATE_MASK) | 242 PCI_PMCSR_STATE_D0); 243 return; 244 } 245 } 246 247 /* 248 * Map the device. 249 */ 250 ioh_valid = (pci_mapreg_map(pa, ATW_PCI_IOBA, 251 PCI_MAPREG_TYPE_IO, 0, 252 &iot, &ioh, NULL, NULL) == 0); 253 memh_valid = (pci_mapreg_map(pa, ATW_PCI_MMBA, 254 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 255 &memt, &memh, NULL, NULL) == 0); 256 257 if (memh_valid) { 258 sc->sc_st = memt; 259 sc->sc_sh = memh; 260 } else if (ioh_valid) { 261 sc->sc_st = iot; 262 sc->sc_sh = ioh; 263 } else { 264 printf(": unable to map device registers\n"); 265 return; 266 } 267 268 sc->sc_dmat = pa->pa_dmat; 269 270 /* 271 * Make sure bus mastering is enabled. 272 */ 273 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 274 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 275 PCI_COMMAND_MASTER_ENABLE); 276 277 /* 278 * Get the cacheline size. 279 */ 280 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 281 PCI_BHLC_REG)); 282 283 /* 284 * Get PCI data moving command info. 285 */ 286 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) /* read line */ 287 sc->sc_flags |= ATWF_MRL; 288 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) /* read multiple */ 289 sc->sc_flags |= ATWF_MRM; 290 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) /* write invalidate */ 291 sc->sc_flags |= ATWF_MWI; 292 293 /* 294 * Map and establish our interrupt. 295 */ 296 if (pci_intr_map(pa, &psc->psc_ih)) { 297 printf("%s: unable to map interrupt\n", 298 sc->sc_dev.dv_xname); 299 return; 300 } 301 intrstr = pci_intr_string(pc, psc->psc_ih); 302 psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET, 303 atw_intr, sc); 304 if (psc->psc_intrcookie == NULL) { 305 printf("%s: unable to establish interrupt", 306 sc->sc_dev.dv_xname); 307 if (intrstr != NULL) 308 printf(" at %s", intrstr); 309 printf("\n"); 310 return; 311 } 312 313 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 314 315 sc->sc_enable = atw_pci_enable; 316 sc->sc_disable = atw_pci_disable; 317 318 /* 319 * Finish off the attach. 320 */ 321 atw_attach(sc); 322 } 323
Indexes created Thu Oct 02 01:09:59 GMT 2025