if_atw_pci.c revision 1.8.4.1
1 /* $NetBSD: if_atw_pci.c,v 1.8.4.1 2005/04/29 11:29:05 kent Exp $ */ 2 3 /*- 4 * Copyright (c) 1998, 1999, 2000, 2002 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility, 9 * NASA Ames Research Center; Charles M. Hannum; and David Young. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. All advertising materials mentioning features or use of this software 20 * must display the following acknowledgement: 21 * This product includes software developed by the NetBSD 22 * Foundation, Inc. and its contributors. 23 * 4. Neither the name of The NetBSD Foundation nor the names of its 24 * contributors may be used to endorse or promote products derived 25 * from this software without specific prior written permission. 26 * 27 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 28 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 29 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 30 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 31 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 32 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 33 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 34 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 35 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 36 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 37 * POSSIBILITY OF SUCH DAMAGE. 38 */ 39 40 /* 41 * PCI bus front-end for the ADMtek ADM8211 802.11 MAC/BBP chip. 42 * 43 * Derived from the ``Tulip'' PCI bus front-end. 44 */ 45 46 #include <sys/cdefs.h> 47 __KERNEL_RCSID(0, "$NetBSD: if_atw_pci.c,v 1.8.4.1 2005/04/29 11:29:05 kent Exp $"); 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/mbuf.h> 52 #include <sys/malloc.h> 53 #include <sys/kernel.h> 54 #include <sys/socket.h> 55 #include <sys/ioctl.h> 56 #include <sys/errno.h> 57 #include <sys/device.h> 58 59 #include <machine/endian.h> 60 61 #include <net/if.h> 62 #include <net/if_dl.h> 63 #include <net/if_media.h> 64 #include <net/if_ether.h> 65 66 #include <net80211/ieee80211_compat.h> 67 #include <net80211/ieee80211_radiotap.h> 68 #include <net80211/ieee80211_var.h> 69 70 #include <machine/bus.h> 71 #include <machine/intr.h> 72 73 #include <dev/ic/atwreg.h> 74 #include <dev/ic/rf3000reg.h> 75 #include <dev/ic/si4136reg.h> 76 #include <dev/ic/atwvar.h> 77 78 #include <dev/pci/pcivar.h> 79 #include <dev/pci/pcireg.h> 80 #include <dev/pci/pcidevs.h> 81 82 /* 83 * PCI configuration space registers used by the ADM8211. 84 */ 85 #define ATW_PCI_IOBA 0x10 /* i/o mapped base */ 86 #define ATW_PCI_MMBA 0x14 /* memory mapped base */ 87 88 struct atw_pci_softc { 89 struct atw_softc psc_atw; /* real ADM8211 softc */ 90 91 pci_intr_handle_t psc_ih; /* interrupt handle */ 92 void *psc_intrcookie; 93 94 pci_chipset_tag_t psc_pc; /* our PCI chipset */ 95 pcitag_t psc_pcitag; /* our PCI tag */ 96 }; 97 98 static int atw_pci_match(struct device *, struct cfdata *, void *); 99 static void atw_pci_attach(struct device *, struct device *, void *); 100 101 CFATTACH_DECL(atw_pci, sizeof(struct atw_pci_softc), 102 atw_pci_match, atw_pci_attach, NULL, NULL); 103 104 static const struct atw_pci_product { 105 u_int32_t app_vendor; /* PCI vendor ID */ 106 u_int32_t app_product; /* PCI product ID */ 107 const char *app_product_name; 108 } atw_pci_products[] = { 109 { PCI_VENDOR_ADMTEK, PCI_PRODUCT_ADMTEK_ADM8211, 110 "ADMtek ADM8211 802.11 MAC/BBP" }, 111 112 { 0, 0, NULL }, 113 }; 114 115 static const struct atw_pci_product * 116 atw_pci_lookup(const struct pci_attach_args *pa) 117 { 118 const struct atw_pci_product *app; 119 120 for (app = atw_pci_products; 121 app->app_product_name != NULL; 122 app++) { 123 if (PCI_VENDOR(pa->pa_id) == app->app_vendor && 124 PCI_PRODUCT(pa->pa_id) == app->app_product) 125 return (app); 126 } 127 return (NULL); 128 } 129 130 static int 131 atw_pci_match(struct device *parent, struct cfdata *match, void *aux) 132 { 133 struct pci_attach_args *pa = aux; 134 135 if (atw_pci_lookup(pa) != NULL) 136 return (1); 137 138 return (0); 139 } 140 141 static int 142 atw_pci_enable(struct atw_softc *sc) 143 { 144 struct atw_pci_softc *psc = (void *)sc; 145 146 /* Establish the interrupt. */ 147 psc->psc_intrcookie = pci_intr_establish(psc->psc_pc, psc->psc_ih, 148 IPL_NET, atw_intr, sc); 149 if (psc->psc_intrcookie == NULL) { 150 printf("%s: unable to establish interrupt\n", 151 sc->sc_dev.dv_xname); 152 return (1); 153 } 154 155 return (0); 156 } 157 158 static void 159 atw_pci_disable(struct atw_softc *sc) 160 { 161 struct atw_pci_softc *psc = (void *)sc; 162 163 /* Unhook the interrupt handler. */ 164 pci_intr_disestablish(psc->psc_pc, psc->psc_intrcookie); 165 psc->psc_intrcookie = NULL; 166 } 167 168 static void 169 atw_pci_attach(struct device *parent, struct device *self, void *aux) 170 { 171 struct atw_pci_softc *psc = (void *) self; 172 struct atw_softc *sc = &psc->psc_atw; 173 struct pci_attach_args *pa = aux; 174 pci_chipset_tag_t pc = pa->pa_pc; 175 const char *intrstr = NULL; 176 bus_space_tag_t iot, memt; 177 bus_space_handle_t ioh, memh; 178 int ioh_valid, memh_valid; 179 const struct atw_pci_product *app; 180 pcireg_t reg; 181 int pmreg; 182 183 psc->psc_pc = pa->pa_pc; 184 psc->psc_pcitag = pa->pa_tag; 185 186 app = atw_pci_lookup(pa); 187 if (app == NULL) { 188 printf("\n"); 189 panic("atw_pci_attach: impossible"); 190 } 191 192 /* 193 * No power management hooks. 194 * XXX Maybe we should add some! 195 */ 196 sc->sc_flags |= ATWF_ENABLED; 197 198 /* 199 * Get revision info, and set some chip-specific variables. 200 */ 201 sc->sc_rev = PCI_REVISION(pa->pa_class); 202 printf(": %s, revision %d.%d\n", app->app_product_name, 203 (sc->sc_rev >> 4) & 0xf, sc->sc_rev & 0xf); 204 205 /* 206 * Check to see if the device is in power-save mode, and 207 * being it out if necessary. 208 * 209 * XXX This code comes almost verbatim from if_tlp_pci.c. I do 210 * not understand it. Tulip clears the "sleep mode" bit in the 211 * CFDA register, first. There is an equivalent (?) register at the 212 * same place in the ADM8211, but the docs do not assign its bits 213 * any meanings. -dcy 214 */ 215 if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) { 216 reg = pci_conf_read(pc, pa->pa_tag, pmreg + PCI_PMCSR); 217 switch (reg & PCI_PMCSR_STATE_MASK) { 218 case PCI_PMCSR_STATE_D1: 219 case PCI_PMCSR_STATE_D2: 220 printf(": waking up from power state D%d\n%s", 221 reg & PCI_PMCSR_STATE_MASK, sc->sc_dev.dv_xname); 222 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 223 (reg & ~PCI_PMCSR_STATE_MASK) | 224 PCI_PMCSR_STATE_D0); 225 break; 226 case PCI_PMCSR_STATE_D3: 227 /* 228 * The card has lost all configuration data in 229 * this state, so punt. 230 */ 231 printf(": unable to wake up from power state D3, " 232 "reboot required.\n"); 233 pci_conf_write(pc, pa->pa_tag, pmreg + PCI_PMCSR, 234 (reg & ~PCI_PMCSR_STATE_MASK) | 235 PCI_PMCSR_STATE_D0); 236 return; 237 } 238 } 239 240 /* 241 * Map the device. 242 */ 243 ioh_valid = (pci_mapreg_map(pa, ATW_PCI_IOBA, 244 PCI_MAPREG_TYPE_IO, 0, 245 &iot, &ioh, NULL, NULL) == 0); 246 memh_valid = (pci_mapreg_map(pa, ATW_PCI_MMBA, 247 PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 248 &memt, &memh, NULL, NULL) == 0); 249 250 if (memh_valid) { 251 sc->sc_st = memt; 252 sc->sc_sh = memh; 253 } else if (ioh_valid) { 254 sc->sc_st = iot; 255 sc->sc_sh = ioh; 256 } else { 257 printf(": unable to map device registers\n"); 258 return; 259 } 260 261 sc->sc_dmat = pa->pa_dmat; 262 263 /* 264 * Make sure bus mastering is enabled. 265 */ 266 pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, 267 pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG) | 268 PCI_COMMAND_MASTER_ENABLE); 269 270 /* 271 * Get the cacheline size. 272 */ 273 sc->sc_cacheline = PCI_CACHELINE(pci_conf_read(pc, pa->pa_tag, 274 PCI_BHLC_REG)); 275 276 /* 277 * Get PCI data moving command info. 278 */ 279 if (pa->pa_flags & PCI_FLAGS_MRL_OKAY) /* read line */ 280 sc->sc_flags |= ATWF_MRL; 281 if (pa->pa_flags & PCI_FLAGS_MRM_OKAY) /* read multiple */ 282 sc->sc_flags |= ATWF_MRM; 283 if (pa->pa_flags & PCI_FLAGS_MWI_OKAY) /* write invalidate */ 284 sc->sc_flags |= ATWF_MWI; 285 286 /* 287 * Map and establish our interrupt. 288 */ 289 if (pci_intr_map(pa, &psc->psc_ih)) { 290 printf("%s: unable to map interrupt\n", 291 sc->sc_dev.dv_xname); 292 return; 293 } 294 intrstr = pci_intr_string(pc, psc->psc_ih); 295 psc->psc_intrcookie = pci_intr_establish(pc, psc->psc_ih, IPL_NET, 296 atw_intr, sc); 297 if (psc->psc_intrcookie == NULL) { 298 printf("%s: unable to establish interrupt", 299 sc->sc_dev.dv_xname); 300 if (intrstr != NULL) 301 printf(" at %s", intrstr); 302 printf("\n"); 303 return; 304 } 305 306 printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr); 307 308 sc->sc_enable = atw_pci_enable; 309 sc->sc_disable = atw_pci_disable; 310 311 /* 312 * Finish off the attach. 313 */ 314 atw_attach(sc); 315 } 316
Indexes created Thu Oct 02 01:09:59 GMT 2025