if_iwi.c revision 1.1 1 1.1 skrll /* $Id: if_iwi.c,v 1.1 2005/01/11 18:24:26 skrll Exp $ */
2 1.1 skrll
3 1.1 skrll /*-
4 1.1 skrll * Copyright (c) 2004, 2005
5 1.1 skrll * Damien Bergamini <damien.bergamini (at) free.fr>. All rights reserved.
6 1.1 skrll *
7 1.1 skrll * Redistribution and use in source and binary forms, with or without
8 1.1 skrll * modification, are permitted provided that the following conditions
9 1.1 skrll * are met:
10 1.1 skrll * 1. Redistributions of source code must retain the above copyright
11 1.1 skrll * notice unmodified, this list of conditions, and the following
12 1.1 skrll * disclaimer.
13 1.1 skrll * 2. Redistributions in binary form must reproduce the above copyright
14 1.1 skrll * notice, this list of conditions and the following disclaimer in the
15 1.1 skrll * documentation and/or other materials provided with the distribution.
16 1.1 skrll *
17 1.1 skrll * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18 1.1 skrll * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19 1.1 skrll * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20 1.1 skrll * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21 1.1 skrll * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22 1.1 skrll * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23 1.1 skrll * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24 1.1 skrll * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25 1.1 skrll * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26 1.1 skrll * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27 1.1 skrll * SUCH DAMAGE.
28 1.1 skrll */
29 1.1 skrll
30 1.1 skrll #include <sys/cdefs.h>
31 1.1 skrll __KERNEL_RCSID(0, "$Id: if_iwi.c,v 1.1 2005/01/11 18:24:26 skrll Exp $");
32 1.1 skrll
33 1.1 skrll /*-
34 1.1 skrll * Intel(R) PRO/Wireless 2200BG/2915ABG driver
35 1.1 skrll * http://www.intel.com/network/connectivity/products/wireless/prowireless_mobile.htm
36 1.1 skrll */
37 1.1 skrll
38 1.1 skrll #include "bpfilter.h"
39 1.1 skrll
40 1.1 skrll #include <sys/param.h>
41 1.1 skrll #include <sys/sockio.h>
42 1.1 skrll #include <sys/sysctl.h>
43 1.1 skrll #include <sys/mbuf.h>
44 1.1 skrll #include <sys/kernel.h>
45 1.1 skrll #include <sys/socket.h>
46 1.1 skrll #include <sys/systm.h>
47 1.1 skrll #include <sys/malloc.h>
48 1.1 skrll #include <sys/conf.h>
49 1.1 skrll
50 1.1 skrll #include <machine/bus.h>
51 1.1 skrll #include <machine/endian.h>
52 1.1 skrll #include <machine/intr.h>
53 1.1 skrll
54 1.1 skrll #include <dev/pci/pcireg.h>
55 1.1 skrll #include <dev/pci/pcivar.h>
56 1.1 skrll #include <dev/pci/pcidevs.h>
57 1.1 skrll
58 1.1 skrll #if NBPFILTER > 0
59 1.1 skrll #include <net/bpf.h>
60 1.1 skrll #endif
61 1.1 skrll #include <net/if.h>
62 1.1 skrll #include <net/if_arp.h>
63 1.1 skrll #include <net/if_dl.h>
64 1.1 skrll #include <net/if_ether.h>
65 1.1 skrll #include <net/if_media.h>
66 1.1 skrll #include <net/if_types.h>
67 1.1 skrll
68 1.1 skrll #include <net80211/ieee80211_var.h>
69 1.1 skrll #include <net80211/ieee80211_radiotap.h>
70 1.1 skrll
71 1.1 skrll #include <netinet/in.h>
72 1.1 skrll #include <netinet/in_systm.h>
73 1.1 skrll #include <netinet/in_var.h>
74 1.1 skrll #include <netinet/ip.h>
75 1.1 skrll
76 1.1 skrll #include <crypto/arc4/arc4.h>
77 1.1 skrll
78 1.1 skrll #include <dev/pci/if_iwireg.h>
79 1.1 skrll #include <dev/pci/if_iwivar.h>
80 1.1 skrll
81 1.1 skrll static const struct ieee80211_rateset iwi_rateset_11a =
82 1.1 skrll { 8, { 12, 18, 24, 36, 48, 72, 96, 108 } };
83 1.1 skrll
84 1.1 skrll static const struct ieee80211_rateset iwi_rateset_11b =
85 1.1 skrll { 4, { 2, 4, 11, 22 } };
86 1.1 skrll
87 1.1 skrll static const struct ieee80211_rateset iwi_rateset_11g =
88 1.1 skrll { 12, { 2, 4, 11, 22, 12, 18, 24, 36, 48, 72, 96, 108 } };
89 1.1 skrll
90 1.1 skrll static int iwi_match(struct device *, struct cfdata *, void *);
91 1.1 skrll static void iwi_attach(struct device *, struct device *, void *);
92 1.1 skrll static int iwi_detach(struct device *, int);
93 1.1 skrll static int iwi_dma_alloc(struct iwi_softc *);
94 1.1 skrll static void iwi_release(struct iwi_softc *);
95 1.1 skrll static int iwi_media_change(struct ifnet *);
96 1.1 skrll static void iwi_media_status(struct ifnet *, struct ifmediareq *);
97 1.1 skrll static u_int16_t iwi_read_prom_word(struct iwi_softc *, u_int8_t);
98 1.1 skrll static int iwi_newstate(struct ieee80211com *, enum ieee80211_state, int);
99 1.1 skrll static void iwi_fix_channel(struct ieee80211com *, struct mbuf *);
100 1.1 skrll static void iwi_frame_intr(struct iwi_softc *, struct iwi_rx_buf *, int,
101 1.1 skrll struct iwi_frame *);
102 1.1 skrll static void iwi_notification_intr(struct iwi_softc *, struct iwi_rx_buf *,
103 1.1 skrll struct iwi_notif *);
104 1.1 skrll static void iwi_rx_intr(struct iwi_softc *);
105 1.1 skrll static void iwi_tx_intr(struct iwi_softc *);
106 1.1 skrll static int iwi_intr(void *);
107 1.1 skrll static int iwi_cmd(struct iwi_softc *, u_int8_t, void *, u_int8_t, int);
108 1.1 skrll static int iwi_tx_start(struct ifnet *, struct mbuf *, struct ieee80211_node *);
109 1.1 skrll static void iwi_start(struct ifnet *);
110 1.1 skrll static void iwi_watchdog(struct ifnet *);
111 1.1 skrll static int iwi_get_table0(struct iwi_softc *, u_int32_t *);
112 1.1 skrll static int iwi_get_radio(struct iwi_softc *, int *);
113 1.1 skrll static int iwi_ioctl(struct ifnet *, u_long, caddr_t);
114 1.1 skrll static void iwi_stop_master(struct iwi_softc *);
115 1.1 skrll static int iwi_reset(struct iwi_softc *);
116 1.1 skrll static int iwi_load_ucode(struct iwi_softc *, void *, int);
117 1.1 skrll static int iwi_load_firmware(struct iwi_softc *, void *, int);
118 1.1 skrll static int iwi_cache_firmware(struct iwi_softc *, void *);
119 1.1 skrll static void iwi_free_firmware(struct iwi_softc *);
120 1.1 skrll static int iwi_config(struct iwi_softc *);
121 1.1 skrll static int iwi_scan(struct iwi_softc *);
122 1.1 skrll static int iwi_auth_and_assoc(struct iwi_softc *);
123 1.1 skrll static int iwi_init(struct ifnet *);
124 1.1 skrll static void iwi_stop(struct ifnet *, int);
125 1.1 skrll
126 1.1 skrll static __inline u_int8_t MEM_READ_1(struct iwi_softc *sc, u_int32_t addr)
127 1.1 skrll {
128 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_INDIRECT_ADDR, addr);
129 1.1 skrll return CSR_READ_1(sc, IWI_CSR_INDIRECT_DATA);
130 1.1 skrll }
131 1.1 skrll
132 1.1 skrll static __inline u_int32_t MEM_READ_4(struct iwi_softc *sc, u_int32_t addr)
133 1.1 skrll {
134 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_INDIRECT_ADDR, addr);
135 1.1 skrll return CSR_READ_4(sc, IWI_CSR_INDIRECT_DATA);
136 1.1 skrll }
137 1.1 skrll
138 1.1 skrll #define IWI_DEBUG
139 1.1 skrll
140 1.1 skrll #ifdef IWI_DEBUG
141 1.1 skrll #define DPRINTF(x) if (iwi_debug > 0) printf x
142 1.1 skrll #define DPRINTFN(n, x) if (iwi_debug >= (n)) printf x
143 1.1 skrll int iwi_debug = 2;
144 1.1 skrll #else
145 1.1 skrll #define DPRINTF(x)
146 1.1 skrll #define DPRINTFN(n, x)
147 1.1 skrll #endif
148 1.1 skrll
149 1.1 skrll CFATTACH_DECL(iwi, sizeof (struct iwi_softc), iwi_match, iwi_attach,
150 1.1 skrll iwi_detach, NULL);
151 1.1 skrll
152 1.1 skrll #define PCI_PRODUCT_INTEL_PRO_WL_2200BG 0x4220
153 1.1 skrll #define PCI_PRODUCT_INTEL_PRO_WL_2915ABG 0x4223
154 1.1 skrll
155 1.1 skrll static int
156 1.1 skrll iwi_match(struct device *parent, struct cfdata *match, void *aux)
157 1.1 skrll {
158 1.1 skrll struct pci_attach_args *pa = aux;
159 1.1 skrll
160 1.1 skrll if (PCI_VENDOR(pa->pa_id) != PCI_VENDOR_INTEL)
161 1.1 skrll return 0;
162 1.1 skrll
163 1.1 skrll if (PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_PRO_WL_2200BG ||
164 1.1 skrll PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_INTEL_PRO_WL_2915ABG)
165 1.1 skrll return 1;
166 1.1 skrll
167 1.1 skrll return 0;
168 1.1 skrll }
169 1.1 skrll
170 1.1 skrll /* Base Address Register */
171 1.1 skrll #define IWI_PCI_BAR0 0x10
172 1.1 skrll
173 1.1 skrll static void
174 1.1 skrll iwi_attach(struct device *parent, struct device *self, void *aux)
175 1.1 skrll {
176 1.1 skrll struct iwi_softc *sc = (struct iwi_softc *)self;
177 1.1 skrll struct ieee80211com *ic = &sc->sc_ic;
178 1.1 skrll struct ifnet *ifp = &ic->ic_if;
179 1.1 skrll struct pci_attach_args *pa = aux;
180 1.1 skrll const char *intrstr;
181 1.1 skrll char devinfo[256];
182 1.1 skrll bus_space_tag_t memt;
183 1.1 skrll bus_space_handle_t memh;
184 1.1 skrll bus_addr_t base;
185 1.1 skrll pci_intr_handle_t ih;
186 1.1 skrll pcireg_t data;
187 1.1 skrll u_int16_t val;
188 1.1 skrll int error, revision, i;
189 1.1 skrll
190 1.1 skrll sc->sc_pct = pa->pa_pc;
191 1.1 skrll sc->sc_pcitag = pa->pa_tag;
192 1.1 skrll
193 1.1 skrll pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof devinfo);
194 1.1 skrll revision = PCI_REVISION(pa->pa_class);
195 1.1 skrll aprint_normal(": %s (rev. 0x%02x)\n", devinfo, revision);
196 1.1 skrll
197 1.1 skrll /* clear device specific PCI configuration register 0x41 */
198 1.1 skrll data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, 0x40);
199 1.1 skrll data &= ~0x0000ff00;
200 1.1 skrll pci_conf_write(sc->sc_pct, sc->sc_pcitag, 0x40, data);
201 1.1 skrll
202 1.1 skrll /* enable bus-mastering */
203 1.1 skrll data = pci_conf_read(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG);
204 1.1 skrll data |= PCI_COMMAND_MASTER_ENABLE;
205 1.1 skrll pci_conf_write(sc->sc_pct, sc->sc_pcitag, PCI_COMMAND_STATUS_REG, data);
206 1.1 skrll
207 1.1 skrll /* map the register window */
208 1.1 skrll error = pci_mapreg_map(pa, IWI_PCI_BAR0, PCI_MAPREG_TYPE_MEM |
209 1.1 skrll PCI_MAPREG_MEM_TYPE_32BIT, 0, &memt, &memh, &base, &sc->sc_sz);
210 1.1 skrll if (error != 0) {
211 1.1 skrll aprint_error("%s: could not map memory space\n",
212 1.1 skrll sc->sc_dev.dv_xname);
213 1.1 skrll return;
214 1.1 skrll }
215 1.1 skrll
216 1.1 skrll sc->sc_st = memt;
217 1.1 skrll sc->sc_sh = memh;
218 1.1 skrll sc->sc_dmat = pa->pa_dmat;
219 1.1 skrll
220 1.1 skrll /* disable interrupts */
221 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, 0);
222 1.1 skrll
223 1.1 skrll if (pci_intr_map(pa, &ih) != 0) {
224 1.1 skrll aprint_error("%s: could not map interrupt\n",
225 1.1 skrll sc->sc_dev.dv_xname);
226 1.1 skrll return;
227 1.1 skrll }
228 1.1 skrll
229 1.1 skrll intrstr = pci_intr_string(sc->sc_pct, ih);
230 1.1 skrll sc->sc_ih = pci_intr_establish(sc->sc_pct, ih, IPL_NET, iwi_intr, sc);
231 1.1 skrll if (sc->sc_ih == NULL) {
232 1.1 skrll aprint_error("%s: could not establish interrupt",
233 1.1 skrll sc->sc_dev.dv_xname);
234 1.1 skrll if (intrstr != NULL)
235 1.1 skrll aprint_error(" at %s", intrstr);
236 1.1 skrll aprint_error("\n");
237 1.1 skrll return;
238 1.1 skrll }
239 1.1 skrll aprint_normal("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
240 1.1 skrll
241 1.1 skrll if (iwi_reset(sc) != 0) {
242 1.1 skrll aprint_error("%s: could not reset adapter\n",
243 1.1 skrll sc->sc_dev.dv_xname);
244 1.1 skrll return;
245 1.1 skrll }
246 1.1 skrll
247 1.1 skrll if (iwi_dma_alloc(sc) != 0) {
248 1.1 skrll aprint_error("%s: could not allocate DMA resources\n",
249 1.1 skrll sc->sc_dev.dv_xname);
250 1.1 skrll return;
251 1.1 skrll }
252 1.1 skrll
253 1.1 skrll ic->ic_phytype = IEEE80211_T_OFDM;
254 1.1 skrll ic->ic_opmode = IEEE80211_M_STA;
255 1.1 skrll ic->ic_state = IEEE80211_S_INIT;
256 1.1 skrll
257 1.1 skrll /* set device capabilities */
258 1.1 skrll ic->ic_caps = IEEE80211_C_IBSS | IEEE80211_C_PMGT | IEEE80211_C_WEP |
259 1.1 skrll IEEE80211_C_TXPMGT | IEEE80211_C_SHPREAMBLE;
260 1.1 skrll
261 1.1 skrll /* read MAC address from EEPROM */
262 1.1 skrll val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 0);
263 1.1 skrll ic->ic_myaddr[0] = val >> 8;
264 1.1 skrll ic->ic_myaddr[1] = val & 0xff;
265 1.1 skrll val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 1);
266 1.1 skrll ic->ic_myaddr[2] = val >> 8;
267 1.1 skrll ic->ic_myaddr[3] = val & 0xff;
268 1.1 skrll val = iwi_read_prom_word(sc, IWI_EEPROM_MAC + 2);
269 1.1 skrll ic->ic_myaddr[4] = val >> 8;
270 1.1 skrll ic->ic_myaddr[5] = val & 0xff;
271 1.1 skrll
272 1.1 skrll aprint_normal("%s: 802.11 address %s\n", sc->sc_dev.dv_xname,
273 1.1 skrll ether_sprintf(ic->ic_myaddr));
274 1.1 skrll
275 1.1 skrll if (PCI_PRODUCT(pa->pa_id) != PCI_PRODUCT_INTEL_PRO_WL_2200BG) {
276 1.1 skrll /* set supported .11a rates */
277 1.1 skrll ic->ic_sup_rates[IEEE80211_MODE_11A] = iwi_rateset_11a;
278 1.1 skrll
279 1.1 skrll /* set supported .11a channels */
280 1.1 skrll for (i = 36; i <= 64; i += 4) {
281 1.1 skrll ic->ic_channels[i].ic_freq =
282 1.1 skrll ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
283 1.1 skrll ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
284 1.1 skrll }
285 1.1 skrll for (i = 149; i <= 161; i += 4) {
286 1.1 skrll ic->ic_channels[i].ic_freq =
287 1.1 skrll ieee80211_ieee2mhz(i, IEEE80211_CHAN_5GHZ);
288 1.1 skrll ic->ic_channels[i].ic_flags = IEEE80211_CHAN_A;
289 1.1 skrll }
290 1.1 skrll }
291 1.1 skrll
292 1.1 skrll /* set supported .11b and .11g rates */
293 1.1 skrll ic->ic_sup_rates[IEEE80211_MODE_11B] = iwi_rateset_11b;
294 1.1 skrll ic->ic_sup_rates[IEEE80211_MODE_11G] = iwi_rateset_11g;
295 1.1 skrll
296 1.1 skrll /* set supported .11b and .11g channels (1 through 14) */
297 1.1 skrll for (i = 1; i <= 14; i++) {
298 1.1 skrll ic->ic_channels[i].ic_freq =
299 1.1 skrll ieee80211_ieee2mhz(i, IEEE80211_CHAN_2GHZ);
300 1.1 skrll ic->ic_channels[i].ic_flags =
301 1.1 skrll IEEE80211_CHAN_CCK | IEEE80211_CHAN_OFDM |
302 1.1 skrll IEEE80211_CHAN_DYN | IEEE80211_CHAN_2GHZ;
303 1.1 skrll }
304 1.1 skrll
305 1.1 skrll /* default to authmode OPEN */
306 1.1 skrll sc->authmode = IEEE80211_AUTH_OPEN;
307 1.1 skrll
308 1.1 skrll /* IBSS channel undefined for now */
309 1.1 skrll ic->ic_ibss_chan = &ic->ic_channels[0];
310 1.1 skrll
311 1.1 skrll ifp->if_softc = sc;
312 1.1 skrll ifp->if_flags = IFF_BROADCAST | IFF_SIMPLEX | IFF_MULTICAST;
313 1.1 skrll ifp->if_init = iwi_init;
314 1.1 skrll ifp->if_stop = iwi_stop;
315 1.1 skrll ifp->if_ioctl = iwi_ioctl;
316 1.1 skrll ifp->if_start = iwi_start;
317 1.1 skrll ifp->if_watchdog = iwi_watchdog;
318 1.1 skrll IFQ_SET_READY(&ifp->if_snd);
319 1.1 skrll memcpy(ifp->if_xname, sc->sc_dev.dv_xname, IFNAMSIZ);
320 1.1 skrll
321 1.1 skrll if_attach(ifp);
322 1.1 skrll ieee80211_ifattach(ifp);
323 1.1 skrll /* override state transition machine */
324 1.1 skrll sc->sc_newstate = ic->ic_newstate;
325 1.1 skrll ic->ic_newstate = iwi_newstate;
326 1.1 skrll ieee80211_media_init(ifp, iwi_media_change, iwi_media_status);
327 1.1 skrll
328 1.1 skrll #if NBPFILTER > 0
329 1.1 skrll bpfattach2(ifp, DLT_IEEE802_11_RADIO,
330 1.1 skrll sizeof (struct ieee80211_frame) + 64, &sc->sc_drvbpf);
331 1.1 skrll
332 1.1 skrll sc->sc_rxtap_len = sizeof sc->sc_rxtapu;
333 1.1 skrll sc->sc_rxtap.wr_ihdr.it_len = htole16(sc->sc_rxtap_len);
334 1.1 skrll sc->sc_rxtap.wr_ihdr.it_present = htole32(IWI_RX_RADIOTAP_PRESENT);
335 1.1 skrll
336 1.1 skrll sc->sc_txtap_len = sizeof sc->sc_txtapu;
337 1.1 skrll sc->sc_txtap.wt_ihdr.it_len = htole16(sc->sc_txtap_len);
338 1.1 skrll sc->sc_txtap.wt_ihdr.it_present = htole32(IWI_TX_RADIOTAP_PRESENT);
339 1.1 skrll #endif
340 1.1 skrll }
341 1.1 skrll
342 1.1 skrll static int
343 1.1 skrll iwi_detach(struct device* self, int flags)
344 1.1 skrll {
345 1.1 skrll struct iwi_softc *sc = (struct iwi_softc *)self;
346 1.1 skrll struct ifnet *ifp = &sc->sc_ic.ic_if;
347 1.1 skrll
348 1.1 skrll iwi_stop(ifp, 1);
349 1.1 skrll iwi_free_firmware(sc);
350 1.1 skrll
351 1.1 skrll #if NBPFILTER > 0
352 1.1 skrll bpfdetach(ifp);
353 1.1 skrll #endif
354 1.1 skrll ieee80211_ifdetach(ifp);
355 1.1 skrll if_detach(ifp);
356 1.1 skrll
357 1.1 skrll iwi_release(sc);
358 1.1 skrll
359 1.1 skrll if (sc->sc_ih != NULL) {
360 1.1 skrll pci_intr_disestablish(sc->sc_pct, sc->sc_ih);
361 1.1 skrll sc->sc_ih = NULL;
362 1.1 skrll }
363 1.1 skrll
364 1.1 skrll bus_space_unmap(sc->sc_st, sc->sc_sh, sc->sc_sz);
365 1.1 skrll
366 1.1 skrll return 0;
367 1.1 skrll }
368 1.1 skrll
369 1.1 skrll static int
370 1.1 skrll iwi_dma_alloc(struct iwi_softc *sc)
371 1.1 skrll {
372 1.1 skrll int i, nsegs, error;
373 1.1 skrll
374 1.1 skrll /*
375 1.1 skrll * Allocate and map Tx ring
376 1.1 skrll */
377 1.1 skrll error = bus_dmamap_create(sc->sc_dmat,
378 1.1 skrll sizeof (struct iwi_tx_desc) * IWI_TX_RING_SIZE, 1,
379 1.1 skrll sizeof (struct iwi_tx_desc) * IWI_TX_RING_SIZE, 0, BUS_DMA_NOWAIT,
380 1.1 skrll &sc->tx_ring_map);
381 1.1 skrll if (error != 0) {
382 1.1 skrll aprint_error("%s: could not create tx ring DMA map\n",
383 1.1 skrll sc->sc_dev.dv_xname);
384 1.1 skrll goto fail;
385 1.1 skrll }
386 1.1 skrll
387 1.1 skrll error = bus_dmamem_alloc(sc->sc_dmat,
388 1.1 skrll sizeof (struct iwi_tx_desc) * IWI_TX_RING_SIZE, PAGE_SIZE, 0,
389 1.1 skrll &sc->tx_ring_seg, 1, &nsegs, BUS_DMA_NOWAIT);
390 1.1 skrll if (error != 0) {
391 1.1 skrll aprint_error("%s: could not allocate tx ring DMA memory\n",
392 1.1 skrll sc->sc_dev.dv_xname);
393 1.1 skrll goto fail;
394 1.1 skrll }
395 1.1 skrll
396 1.1 skrll error = bus_dmamem_map(sc->sc_dmat, &sc->tx_ring_seg, nsegs,
397 1.1 skrll sizeof (struct iwi_tx_desc) * IWI_TX_RING_SIZE,
398 1.1 skrll (caddr_t *)&sc->tx_desc, BUS_DMA_NOWAIT);
399 1.1 skrll if (error != 0) {
400 1.1 skrll aprint_error("%s: could not map tx ring DMA memory\n",
401 1.1 skrll sc->sc_dev.dv_xname);
402 1.1 skrll goto fail;
403 1.1 skrll }
404 1.1 skrll
405 1.1 skrll error = bus_dmamap_load(sc->sc_dmat, sc->tx_ring_map, sc->tx_desc,
406 1.1 skrll sizeof (struct iwi_tx_desc) * IWI_TX_RING_SIZE, NULL,
407 1.1 skrll BUS_DMA_NOWAIT);
408 1.1 skrll if (error != 0) {
409 1.1 skrll aprint_error("%s: could not load tx ring DMA map\n",
410 1.1 skrll sc->sc_dev.dv_xname);
411 1.1 skrll goto fail;
412 1.1 skrll }
413 1.1 skrll
414 1.1 skrll memset(sc->tx_desc, 0, sizeof (struct iwi_tx_desc) * IWI_TX_RING_SIZE);
415 1.1 skrll
416 1.1 skrll /*
417 1.1 skrll * Allocate and map command ring
418 1.1 skrll */
419 1.1 skrll error = bus_dmamap_create(sc->sc_dmat,
420 1.1 skrll sizeof (struct iwi_cmd_desc) * IWI_CMD_RING_SIZE, 1,
421 1.1 skrll sizeof (struct iwi_cmd_desc) * IWI_CMD_RING_SIZE, 0,
422 1.1 skrll BUS_DMA_NOWAIT, &sc->cmd_ring_map);
423 1.1 skrll if (error != 0) {
424 1.1 skrll aprint_error("%s: could not create command ring DMA map\n",
425 1.1 skrll sc->sc_dev.dv_xname);
426 1.1 skrll goto fail;
427 1.1 skrll }
428 1.1 skrll
429 1.1 skrll error = bus_dmamem_alloc(sc->sc_dmat,
430 1.1 skrll sizeof (struct iwi_cmd_desc) * IWI_CMD_RING_SIZE, PAGE_SIZE, 0,
431 1.1 skrll &sc->cmd_ring_seg, 1, &nsegs, BUS_DMA_NOWAIT);
432 1.1 skrll if (error != 0) {
433 1.1 skrll aprint_error("%s: could not allocate command ring DMA memory\n",
434 1.1 skrll sc->sc_dev.dv_xname);
435 1.1 skrll goto fail;
436 1.1 skrll }
437 1.1 skrll
438 1.1 skrll error = bus_dmamem_map(sc->sc_dmat, &sc->cmd_ring_seg, nsegs,
439 1.1 skrll sizeof (struct iwi_cmd_desc) * IWI_CMD_RING_SIZE,
440 1.1 skrll (caddr_t *)&sc->cmd_desc, BUS_DMA_NOWAIT);
441 1.1 skrll if (error != 0) {
442 1.1 skrll aprint_error("%s: could not map command ring DMA memory\n",
443 1.1 skrll sc->sc_dev.dv_xname);
444 1.1 skrll goto fail;
445 1.1 skrll }
446 1.1 skrll
447 1.1 skrll error = bus_dmamap_load(sc->sc_dmat, sc->cmd_ring_map, sc->cmd_desc,
448 1.1 skrll sizeof (struct iwi_cmd_desc) * IWI_CMD_RING_SIZE, NULL,
449 1.1 skrll BUS_DMA_NOWAIT);
450 1.1 skrll if (error != 0) {
451 1.1 skrll aprint_error("%s: could not load command ring DMA map\n",
452 1.1 skrll sc->sc_dev.dv_xname);
453 1.1 skrll goto fail;
454 1.1 skrll }
455 1.1 skrll
456 1.1 skrll memset(sc->cmd_desc, 0,
457 1.1 skrll sizeof (struct iwi_cmd_desc) * IWI_CMD_RING_SIZE);
458 1.1 skrll
459 1.1 skrll /*
460 1.1 skrll * Allocate Tx buffers DMA maps
461 1.1 skrll */
462 1.1 skrll for (i = 0; i < IWI_TX_RING_SIZE; i++) {
463 1.1 skrll error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, IWI_MAX_NSEG,
464 1.1 skrll MCLBYTES, 0, BUS_DMA_NOWAIT, &sc->tx_buf[i].map);
465 1.1 skrll if (error != 0) {
466 1.1 skrll aprint_error("%s: could not create tx buf DMA map",
467 1.1 skrll sc->sc_dev.dv_xname);
468 1.1 skrll goto fail;
469 1.1 skrll }
470 1.1 skrll }
471 1.1 skrll
472 1.1 skrll /*
473 1.1 skrll * Allocate and map Rx buffers
474 1.1 skrll */
475 1.1 skrll for (i = 0; i < IWI_RX_RING_SIZE; i++) {
476 1.1 skrll
477 1.1 skrll error = bus_dmamap_create(sc->sc_dmat, MCLBYTES, 1, MCLBYTES,
478 1.1 skrll 0, BUS_DMA_NOWAIT, &sc->rx_buf[i].map);
479 1.1 skrll if (error != 0) {
480 1.1 skrll aprint_error("%s: could not create rx buf DMA map",
481 1.1 skrll sc->sc_dev.dv_xname);
482 1.1 skrll goto fail;
483 1.1 skrll }
484 1.1 skrll
485 1.1 skrll MGETHDR(sc->rx_buf[i].m, M_DONTWAIT, MT_DATA);
486 1.1 skrll if (sc->rx_buf[i].m == NULL) {
487 1.1 skrll aprint_error("%s: could not allocate rx mbuf\n",
488 1.1 skrll sc->sc_dev.dv_xname);
489 1.1 skrll error = ENOMEM;
490 1.1 skrll goto fail;
491 1.1 skrll }
492 1.1 skrll
493 1.1 skrll MCLGET(sc->rx_buf[i].m, M_DONTWAIT);
494 1.1 skrll if (!(sc->rx_buf[i].m->m_flags & M_EXT)) {
495 1.1 skrll m_freem(sc->rx_buf[i].m);
496 1.1 skrll aprint_error("%s: could not allocate rx mbuf cluster\n",
497 1.1 skrll sc->sc_dev.dv_xname);
498 1.1 skrll error = ENOMEM;
499 1.1 skrll goto fail;
500 1.1 skrll }
501 1.1 skrll
502 1.1 skrll error = bus_dmamap_load(sc->sc_dmat, sc->rx_buf[i].map,
503 1.1 skrll mtod(sc->rx_buf[i].m, void *), MCLBYTES, NULL,
504 1.1 skrll BUS_DMA_NOWAIT);
505 1.1 skrll if (error != 0) {
506 1.1 skrll aprint_error("%s: could not load rx buffer DMA map\n",
507 1.1 skrll sc->sc_dev.dv_xname);
508 1.1 skrll goto fail;
509 1.1 skrll }
510 1.1 skrll }
511 1.1 skrll
512 1.1 skrll return 0;
513 1.1 skrll
514 1.1 skrll fail: iwi_release(sc);
515 1.1 skrll return error;
516 1.1 skrll }
517 1.1 skrll
518 1.1 skrll static void
519 1.1 skrll iwi_release(struct iwi_softc *sc)
520 1.1 skrll {
521 1.1 skrll int i;
522 1.1 skrll
523 1.1 skrll if (sc->tx_ring_map != NULL) {
524 1.1 skrll if (sc->tx_desc != NULL) {
525 1.1 skrll bus_dmamap_unload(sc->sc_dmat, sc->tx_ring_map);
526 1.1 skrll bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->tx_desc,
527 1.1 skrll sizeof (struct iwi_tx_desc) * IWI_TX_RING_SIZE);
528 1.1 skrll bus_dmamem_free(sc->sc_dmat, &sc->tx_ring_seg, 1);
529 1.1 skrll }
530 1.1 skrll bus_dmamap_destroy(sc->sc_dmat, sc->tx_ring_map);
531 1.1 skrll }
532 1.1 skrll
533 1.1 skrll if (sc->cmd_ring_map != NULL) {
534 1.1 skrll if (sc->cmd_desc != NULL) {
535 1.1 skrll bus_dmamap_unload(sc->sc_dmat, sc->cmd_ring_map);
536 1.1 skrll bus_dmamem_unmap(sc->sc_dmat, (caddr_t)sc->cmd_desc,
537 1.1 skrll sizeof (struct iwi_cmd_desc) * IWI_CMD_RING_SIZE);
538 1.1 skrll bus_dmamem_free(sc->sc_dmat, &sc->cmd_ring_seg, 1);
539 1.1 skrll }
540 1.1 skrll bus_dmamap_destroy(sc->sc_dmat, sc->cmd_ring_map);
541 1.1 skrll }
542 1.1 skrll
543 1.1 skrll for (i = 0; i < IWI_TX_RING_SIZE; i++) {
544 1.1 skrll if (sc->tx_buf[i].m != NULL) {
545 1.1 skrll bus_dmamap_unload(sc->sc_dmat, sc->tx_buf[i].map);
546 1.1 skrll m_freem(sc->tx_buf[i].m);
547 1.1 skrll }
548 1.1 skrll bus_dmamap_destroy(sc->sc_dmat, sc->tx_buf[i].map);
549 1.1 skrll }
550 1.1 skrll
551 1.1 skrll for (i = 0; i < IWI_RX_RING_SIZE; i++) {
552 1.1 skrll if (sc->rx_buf[i].m != NULL) {
553 1.1 skrll bus_dmamap_unload(sc->sc_dmat, sc->rx_buf[i].map);
554 1.1 skrll m_freem(sc->rx_buf[i].m);
555 1.1 skrll }
556 1.1 skrll bus_dmamap_destroy(sc->sc_dmat, sc->rx_buf[i].map);
557 1.1 skrll }
558 1.1 skrll }
559 1.1 skrll
560 1.1 skrll static int
561 1.1 skrll iwi_media_change(struct ifnet *ifp)
562 1.1 skrll {
563 1.1 skrll int error;
564 1.1 skrll
565 1.1 skrll error = ieee80211_media_change(ifp);
566 1.1 skrll if (error != ENETRESET)
567 1.1 skrll return error;
568 1.1 skrll
569 1.1 skrll if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) == (IFF_UP | IFF_RUNNING))
570 1.1 skrll iwi_init(ifp);
571 1.1 skrll
572 1.1 skrll return 0;
573 1.1 skrll }
574 1.1 skrll
575 1.1 skrll static void
576 1.1 skrll iwi_media_status(struct ifnet *ifp, struct ifmediareq *imr)
577 1.1 skrll {
578 1.1 skrll struct iwi_softc *sc = ifp->if_softc;
579 1.1 skrll struct ieee80211com *ic = &sc->sc_ic;
580 1.1 skrll #define N(a) (sizeof (a) / sizeof (a[0]))
581 1.1 skrll static const struct {
582 1.1 skrll u_int32_t val;
583 1.1 skrll int rate;
584 1.1 skrll } rates[] = {
585 1.1 skrll { IWI_RATE_DS1, 2 },
586 1.1 skrll { IWI_RATE_DS2, 4 },
587 1.1 skrll { IWI_RATE_DS5, 11 },
588 1.1 skrll { IWI_RATE_DS11, 22 },
589 1.1 skrll { IWI_RATE_OFDM6, 12 },
590 1.1 skrll { IWI_RATE_OFDM9, 18 },
591 1.1 skrll { IWI_RATE_OFDM12, 24 },
592 1.1 skrll { IWI_RATE_OFDM18, 36 },
593 1.1 skrll { IWI_RATE_OFDM24, 48 },
594 1.1 skrll { IWI_RATE_OFDM36, 72 },
595 1.1 skrll { IWI_RATE_OFDM48, 96 },
596 1.1 skrll { IWI_RATE_OFDM54, 108 },
597 1.1 skrll };
598 1.1 skrll u_int32_t val;
599 1.1 skrll int rate, i;
600 1.1 skrll
601 1.1 skrll imr->ifm_status = IFM_AVALID;
602 1.1 skrll imr->ifm_active = IFM_IEEE80211;
603 1.1 skrll if (ic->ic_state == IEEE80211_S_RUN)
604 1.1 skrll imr->ifm_status |= IFM_ACTIVE;
605 1.1 skrll
606 1.1 skrll /* read current transmission rate from adapter */
607 1.1 skrll val = CSR_READ_4(sc, IWI_CSR_CURRENT_TX_RATE);
608 1.1 skrll
609 1.1 skrll /* convert rate to 802.11 rate */
610 1.1 skrll for (i = 0; i < N(rates) && rates[i].val != val; i++);
611 1.1 skrll rate = (i < N(rates)) ? rates[i].rate : 0;
612 1.1 skrll
613 1.1 skrll imr->ifm_active |= ieee80211_rate2media(ic, rate, ic->ic_curmode);
614 1.1 skrll switch (ic->ic_opmode) {
615 1.1 skrll case IEEE80211_M_STA:
616 1.1 skrll break;
617 1.1 skrll
618 1.1 skrll case IEEE80211_M_IBSS:
619 1.1 skrll imr->ifm_active |= IFM_IEEE80211_ADHOC;
620 1.1 skrll break;
621 1.1 skrll
622 1.1 skrll case IEEE80211_M_MONITOR:
623 1.1 skrll imr->ifm_active |= IFM_IEEE80211_MONITOR;
624 1.1 skrll break;
625 1.1 skrll
626 1.1 skrll case IEEE80211_M_AHDEMO:
627 1.1 skrll case IEEE80211_M_HOSTAP:
628 1.1 skrll /* should not get there */
629 1.1 skrll break;
630 1.1 skrll }
631 1.1 skrll #undef N
632 1.1 skrll }
633 1.1 skrll
634 1.1 skrll static int
635 1.1 skrll iwi_newstate(struct ieee80211com *ic, enum ieee80211_state nstate, int arg)
636 1.1 skrll {
637 1.1 skrll struct iwi_softc *sc = ic->ic_softc;
638 1.1 skrll
639 1.1 skrll switch (nstate) {
640 1.1 skrll case IEEE80211_S_SCAN:
641 1.1 skrll iwi_scan(sc);
642 1.1 skrll break;
643 1.1 skrll
644 1.1 skrll case IEEE80211_S_AUTH:
645 1.1 skrll iwi_auth_and_assoc(sc);
646 1.1 skrll break;
647 1.1 skrll
648 1.1 skrll case IEEE80211_S_RUN:
649 1.1 skrll if (ic->ic_opmode == IEEE80211_M_IBSS)
650 1.1 skrll ieee80211_new_state(ic, IEEE80211_S_AUTH, -1);
651 1.1 skrll break;
652 1.1 skrll
653 1.1 skrll case IEEE80211_S_ASSOC:
654 1.1 skrll case IEEE80211_S_INIT:
655 1.1 skrll break;
656 1.1 skrll }
657 1.1 skrll
658 1.1 skrll ic->ic_state = nstate;
659 1.1 skrll return 0;
660 1.1 skrll }
661 1.1 skrll
662 1.1 skrll /*
663 1.1 skrll * Read 16 bits at address 'addr' from the serial EEPROM.
664 1.1 skrll * DON'T PLAY WITH THIS CODE UNLESS YOU KNOW *EXACTLY* WHAT YOU'RE DOING!
665 1.1 skrll */
666 1.1 skrll static u_int16_t
667 1.1 skrll iwi_read_prom_word(struct iwi_softc *sc, u_int8_t addr)
668 1.1 skrll {
669 1.1 skrll u_int32_t tmp;
670 1.1 skrll u_int16_t val;
671 1.1 skrll int n;
672 1.1 skrll
673 1.1 skrll /* Clock C once before the first command */
674 1.1 skrll IWI_EEPROM_CTL(sc, 0);
675 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S);
676 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_C);
677 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S);
678 1.1 skrll
679 1.1 skrll /* Write start bit (1) */
680 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_D);
681 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_D | IWI_EEPROM_C);
682 1.1 skrll
683 1.1 skrll /* Write READ opcode (10) */
684 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_D);
685 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_D | IWI_EEPROM_C);
686 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S);
687 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_C);
688 1.1 skrll
689 1.1 skrll /* Write address A7-A0 */
690 1.1 skrll for (n = 7; n >= 0; n--) {
691 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S |
692 1.1 skrll (((addr >> n) & 1) << IWI_EEPROM_SHIFT_D));
693 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S |
694 1.1 skrll (((addr >> n) & 1) << IWI_EEPROM_SHIFT_D) | IWI_EEPROM_C);
695 1.1 skrll }
696 1.1 skrll
697 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S);
698 1.1 skrll
699 1.1 skrll /* Read data Q15-Q0 */
700 1.1 skrll val = 0;
701 1.1 skrll for (n = 15; n >= 0; n--) {
702 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S | IWI_EEPROM_C);
703 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S);
704 1.1 skrll tmp = MEM_READ_4(sc, IWI_MEM_EEPROM_CTL);
705 1.1 skrll val |= ((tmp & IWI_EEPROM_Q) >> IWI_EEPROM_SHIFT_Q) << n;
706 1.1 skrll }
707 1.1 skrll
708 1.1 skrll IWI_EEPROM_CTL(sc, 0);
709 1.1 skrll
710 1.1 skrll /* Clear Chip Select and clock C */
711 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_S);
712 1.1 skrll IWI_EEPROM_CTL(sc, 0);
713 1.1 skrll IWI_EEPROM_CTL(sc, IWI_EEPROM_C);
714 1.1 skrll
715 1.1 skrll return be16toh(val);
716 1.1 skrll }
717 1.1 skrll
718 1.1 skrll /*
719 1.1 skrll * XXX: Hack to set the current channel to the value advertised in beacons or
720 1.1 skrll * probe responses. Only used during AP detection.
721 1.1 skrll */
722 1.1 skrll static void
723 1.1 skrll iwi_fix_channel(struct ieee80211com *ic, struct mbuf *m)
724 1.1 skrll {
725 1.1 skrll struct ieee80211_frame *wh;
726 1.1 skrll u_int8_t subtype;
727 1.1 skrll u_int8_t *frm, *efrm;
728 1.1 skrll
729 1.1 skrll wh = mtod(m, struct ieee80211_frame *);
730 1.1 skrll
731 1.1 skrll if ((wh->i_fc[0] & IEEE80211_FC0_TYPE_MASK) != IEEE80211_FC0_TYPE_MGT)
732 1.1 skrll return;
733 1.1 skrll
734 1.1 skrll subtype = wh->i_fc[0] & IEEE80211_FC0_SUBTYPE_MASK;
735 1.1 skrll
736 1.1 skrll if (subtype != IEEE80211_FC0_SUBTYPE_BEACON &&
737 1.1 skrll subtype != IEEE80211_FC0_SUBTYPE_PROBE_RESP)
738 1.1 skrll return;
739 1.1 skrll
740 1.1 skrll frm = (u_int8_t *)(wh + 1);
741 1.1 skrll efrm = mtod(m, u_int8_t *) + m->m_len;
742 1.1 skrll
743 1.1 skrll frm += 12; /* skip tstamp, bintval and capinfo fields */
744 1.1 skrll while (frm < efrm) {
745 1.1 skrll if (*frm == IEEE80211_ELEMID_DSPARMS)
746 1.1 skrll #if IEEE80211_CHAN_MAX < 255
747 1.1 skrll if (frm[2] <= IEEE80211_CHAN_MAX)
748 1.1 skrll #endif
749 1.1 skrll ic->ic_bss->ni_chan = &ic->ic_channels[frm[2]];
750 1.1 skrll
751 1.1 skrll frm += frm[1] + 2;
752 1.1 skrll }
753 1.1 skrll }
754 1.1 skrll
755 1.1 skrll static void
756 1.1 skrll iwi_frame_intr(struct iwi_softc *sc, struct iwi_rx_buf *buf, int i,
757 1.1 skrll struct iwi_frame *frame)
758 1.1 skrll {
759 1.1 skrll struct ieee80211com *ic = &sc->sc_ic;
760 1.1 skrll struct ifnet *ifp = &ic->ic_if;
761 1.1 skrll struct mbuf *m;
762 1.1 skrll struct ieee80211_frame *wh;
763 1.1 skrll struct ieee80211_node *ni;
764 1.1 skrll int error;
765 1.1 skrll
766 1.1 skrll DPRINTFN(5, ("RX!DATA!%u!%u!%u\n", le16toh(frame->len), frame->chan,
767 1.1 skrll frame->rssi_dbm));
768 1.1 skrll
769 1.1 skrll bus_dmamap_sync(sc->sc_dmat, buf->map, sizeof (struct iwi_hdr),
770 1.1 skrll sizeof (struct iwi_frame) + le16toh(frame->len),
771 1.1 skrll BUS_DMASYNC_POSTREAD);
772 1.1 skrll
773 1.1 skrll if (le16toh(frame->len) < sizeof (struct ieee80211_frame_min) ||
774 1.1 skrll le16toh(frame->len) > MCLBYTES) {
775 1.1 skrll aprint_error("%s: bad frame length\n", sc->sc_dev.dv_xname);
776 1.1 skrll }
777 1.1 skrll
778 1.1 skrll bus_dmamap_unload(sc->sc_dmat, buf->map);
779 1.1 skrll
780 1.1 skrll /* Finalize mbuf */
781 1.1 skrll m = buf->m;
782 1.1 skrll m->m_pkthdr.rcvif = ifp;
783 1.1 skrll m->m_pkthdr.len = m->m_len = sizeof (struct iwi_hdr) +
784 1.1 skrll sizeof (struct iwi_frame) + le16toh(frame->len);
785 1.1 skrll
786 1.1 skrll m_adj(m, sizeof (struct iwi_hdr) + sizeof (struct iwi_frame));
787 1.1 skrll
788 1.1 skrll wh = mtod(m, struct ieee80211_frame *);
789 1.1 skrll if (wh->i_fc[1] & IEEE80211_FC1_WEP) {
790 1.1 skrll /*
791 1.1 skrll * Hardware decrypts the frame itself but leaves the WEP bit
792 1.1 skrll * set in the 802.11 header and don't remove the iv and crc
793 1.1 skrll * fields
794 1.1 skrll */
795 1.1 skrll wh->i_fc[1] &= ~IEEE80211_FC1_WEP;
796 1.1 skrll memmove((char *)wh + IEEE80211_WEP_IVLEN +
797 1.1 skrll IEEE80211_WEP_KIDLEN, wh, sizeof (struct ieee80211_frame));
798 1.1 skrll m_adj(m, IEEE80211_WEP_IVLEN + IEEE80211_WEP_KIDLEN);
799 1.1 skrll m_adj(m, -IEEE80211_WEP_CRCLEN);
800 1.1 skrll wh = mtod(m, struct ieee80211_frame *);
801 1.1 skrll }
802 1.1 skrll
803 1.1 skrll #if NBPFILTER > 0
804 1.1 skrll if (sc->sc_drvbpf != NULL) {
805 1.1 skrll struct iwi_rx_radiotap_header *tap = &sc->sc_rxtap;
806 1.1 skrll
807 1.1 skrll bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m);
808 1.1 skrll }
809 1.1 skrll #endif
810 1.1 skrll
811 1.1 skrll if (ic->ic_state == IEEE80211_S_SCAN)
812 1.1 skrll iwi_fix_channel(ic, m);
813 1.1 skrll
814 1.1 skrll ni = ieee80211_find_rxnode(ic, wh);
815 1.1 skrll
816 1.1 skrll /* Send the frame to the upper layer */
817 1.1 skrll ieee80211_input(ifp, m, ni, IWI_RSSIDBM2RAW(frame->rssi_dbm), 0);
818 1.1 skrll
819 1.1 skrll ieee80211_release_node(ic, ni);
820 1.1 skrll
821 1.1 skrll MGETHDR(buf->m, M_DONTWAIT, MT_DATA);
822 1.1 skrll if (buf->m == NULL) {
823 1.1 skrll aprint_error("%s: could not allocate rx mbuf\n",
824 1.1 skrll sc->sc_dev.dv_xname);
825 1.1 skrll return;
826 1.1 skrll }
827 1.1 skrll
828 1.1 skrll MCLGET(buf->m, M_DONTWAIT);
829 1.1 skrll if (!(buf->m->m_flags & M_EXT)) {
830 1.1 skrll aprint_error("%s: could not allocate rx mbuf cluster\n",
831 1.1 skrll sc->sc_dev.dv_xname);
832 1.1 skrll m_freem(buf->m);
833 1.1 skrll buf->m = NULL;
834 1.1 skrll return;
835 1.1 skrll }
836 1.1 skrll
837 1.1 skrll error = bus_dmamap_load(sc->sc_dmat, buf->map, mtod(buf->m, void *),
838 1.1 skrll MCLBYTES, NULL, BUS_DMA_NOWAIT);
839 1.1 skrll if (error != 0) {
840 1.1 skrll aprint_error("%s: could not load rx buf DMA map\n",
841 1.1 skrll sc->sc_dev.dv_xname);
842 1.1 skrll m_freem(buf->m);
843 1.1 skrll buf->m = NULL;
844 1.1 skrll return;
845 1.1 skrll }
846 1.1 skrll
847 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RX_BASE + i * 4, buf->map->dm_segs[0].ds_addr);
848 1.1 skrll }
849 1.1 skrll
850 1.1 skrll static void
851 1.1 skrll iwi_notification_intr(struct iwi_softc *sc, struct iwi_rx_buf *buf,
852 1.1 skrll struct iwi_notif *notif)
853 1.1 skrll {
854 1.1 skrll struct ieee80211com *ic = &sc->sc_ic;
855 1.1 skrll struct iwi_notif_scan_channel *chan;
856 1.1 skrll struct iwi_notif_scan_complete *scan;
857 1.1 skrll struct iwi_notif_authentication *auth;
858 1.1 skrll struct iwi_notif_association *assoc;
859 1.1 skrll
860 1.1 skrll bus_dmamap_sync(sc->sc_dmat, buf->map, sizeof (struct iwi_hdr),
861 1.1 skrll sizeof (struct iwi_notif) + le16toh(notif->len),
862 1.1 skrll BUS_DMASYNC_POSTREAD);
863 1.1 skrll
864 1.1 skrll switch (notif->type) {
865 1.1 skrll case IWI_NOTIF_TYPE_SCAN_CHANNEL:
866 1.1 skrll chan = (struct iwi_notif_scan_channel *)(notif + 1);
867 1.1 skrll
868 1.1 skrll DPRINTFN(2, ("Scan channel (%u)\n", chan->nchan));
869 1.1 skrll break;
870 1.1 skrll
871 1.1 skrll case IWI_NOTIF_TYPE_SCAN_COMPLETE:
872 1.1 skrll scan = (struct iwi_notif_scan_complete *)(notif + 1);
873 1.1 skrll
874 1.1 skrll DPRINTFN(2, ("Scan completed (%u, %u)\n", scan->nchan,
875 1.1 skrll scan->status));
876 1.1 skrll
877 1.1 skrll ieee80211_end_scan(ic);
878 1.1 skrll break;
879 1.1 skrll
880 1.1 skrll case IWI_NOTIF_TYPE_AUTHENTICATION:
881 1.1 skrll auth = (struct iwi_notif_authentication *)(notif + 1);
882 1.1 skrll
883 1.1 skrll DPRINTFN(2, ("Authentication (%u)\n", auth->state));
884 1.1 skrll
885 1.1 skrll switch (auth->state) {
886 1.1 skrll case IWI_AUTHENTICATED:
887 1.1 skrll ieee80211_new_state(ic, IEEE80211_S_ASSOC, -1);
888 1.1 skrll break;
889 1.1 skrll
890 1.1 skrll case IWI_DEAUTHENTICATED:
891 1.1 skrll break;
892 1.1 skrll
893 1.1 skrll default:
894 1.1 skrll aprint_error("%s: unknown authentication state %u\n",
895 1.1 skrll sc->sc_dev.dv_xname, auth->state);
896 1.1 skrll }
897 1.1 skrll break;
898 1.1 skrll
899 1.1 skrll case IWI_NOTIF_TYPE_ASSOCIATION:
900 1.1 skrll assoc = (struct iwi_notif_association *)(notif + 1);
901 1.1 skrll
902 1.1 skrll DPRINTFN(2, ("Association (%u, %u)\n", assoc->state,
903 1.1 skrll assoc->status));
904 1.1 skrll
905 1.1 skrll switch (assoc->state) {
906 1.1 skrll case IWI_ASSOCIATED:
907 1.1 skrll ieee80211_new_state(ic, IEEE80211_S_RUN, -1);
908 1.1 skrll break;
909 1.1 skrll
910 1.1 skrll case IWI_DEASSOCIATED:
911 1.1 skrll ieee80211_begin_scan(ic);
912 1.1 skrll break;
913 1.1 skrll
914 1.1 skrll default:
915 1.1 skrll aprint_error("%s: unknown association state %u\n",
916 1.1 skrll sc->sc_dev.dv_xname, assoc->state);
917 1.1 skrll }
918 1.1 skrll break;
919 1.1 skrll
920 1.1 skrll case IWI_NOTIF_TYPE_CALIBRATION:
921 1.1 skrll case IWI_NOTIF_TYPE_BEACON:
922 1.1 skrll case IWI_NOTIF_TYPE_NOISE:
923 1.1 skrll DPRINTFN(5, ("Notification (%u)\n", notif->type));
924 1.1 skrll break;
925 1.1 skrll
926 1.1 skrll default:
927 1.1 skrll aprint_error("%s: unknown notification type %u\n",
928 1.1 skrll sc->sc_dev.dv_xname, notif->type);
929 1.1 skrll }
930 1.1 skrll }
931 1.1 skrll
932 1.1 skrll static void
933 1.1 skrll iwi_rx_intr(struct iwi_softc *sc)
934 1.1 skrll {
935 1.1 skrll struct iwi_rx_buf *buf;
936 1.1 skrll struct iwi_hdr *hdr;
937 1.1 skrll u_int32_t r, i;
938 1.1 skrll
939 1.1 skrll r = CSR_READ_4(sc, IWI_CSR_RX_READ_INDEX);
940 1.1 skrll
941 1.1 skrll for (i = (sc->rx_cur + 1) % IWI_RX_RING_SIZE; i != r;
942 1.1 skrll i = (i + 1) % IWI_RX_RING_SIZE) {
943 1.1 skrll
944 1.1 skrll buf = &sc->rx_buf[i];
945 1.1 skrll
946 1.1 skrll bus_dmamap_sync(sc->sc_dmat, buf->map, 0,
947 1.1 skrll sizeof (struct iwi_hdr), BUS_DMASYNC_POSTREAD);
948 1.1 skrll
949 1.1 skrll hdr = mtod(buf->m, struct iwi_hdr *);
950 1.1 skrll
951 1.1 skrll switch (hdr->type) {
952 1.1 skrll case IWI_HDR_TYPE_FRAME:
953 1.1 skrll iwi_frame_intr(sc, buf, i,
954 1.1 skrll (struct iwi_frame *)(hdr + 1));
955 1.1 skrll break;
956 1.1 skrll
957 1.1 skrll case IWI_HDR_TYPE_NOTIF:
958 1.1 skrll iwi_notification_intr(sc, buf,
959 1.1 skrll (struct iwi_notif *)(hdr + 1));
960 1.1 skrll break;
961 1.1 skrll
962 1.1 skrll default:
963 1.1 skrll aprint_error("%s: unknown hdr type %u\n",
964 1.1 skrll sc->sc_dev.dv_xname, hdr->type);
965 1.1 skrll }
966 1.1 skrll }
967 1.1 skrll
968 1.1 skrll /* Tell the firmware what we have processed */
969 1.1 skrll sc->rx_cur = (r == 0) ? IWI_RX_RING_SIZE - 1 : r - 1;
970 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RX_WRITE_INDEX, sc->rx_cur);
971 1.1 skrll }
972 1.1 skrll
973 1.1 skrll static void
974 1.1 skrll iwi_tx_intr(struct iwi_softc *sc)
975 1.1 skrll {
976 1.1 skrll struct ieee80211com *ic = &sc->sc_ic;
977 1.1 skrll struct ifnet *ifp = &ic->ic_if;
978 1.1 skrll struct iwi_tx_buf *buf;
979 1.1 skrll u_int32_t r, i;
980 1.1 skrll
981 1.1 skrll r = CSR_READ_4(sc, IWI_CSR_TX1_READ_INDEX);
982 1.1 skrll
983 1.1 skrll for (i = (sc->tx_old + 1) % IWI_TX_RING_SIZE; i != r;
984 1.1 skrll i = (i + 1) % IWI_TX_RING_SIZE) {
985 1.1 skrll
986 1.1 skrll buf = &sc->tx_buf[i];
987 1.1 skrll
988 1.1 skrll bus_dmamap_unload(sc->sc_dmat, buf->map);
989 1.1 skrll m_freem(buf->m);
990 1.1 skrll buf->m = NULL;
991 1.1 skrll ieee80211_release_node(ic, buf->ni);
992 1.1 skrll buf->ni = NULL;
993 1.1 skrll
994 1.1 skrll sc->tx_queued--;
995 1.1 skrll
996 1.1 skrll /* kill watchdog timer */
997 1.1 skrll sc->sc_tx_timer = 0;
998 1.1 skrll }
999 1.1 skrll
1000 1.1 skrll /* Remember what the firmware has processed */
1001 1.1 skrll sc->tx_old = (r == 0) ? IWI_TX_RING_SIZE - 1 : r - 1;
1002 1.1 skrll
1003 1.1 skrll /* Call start() since some buffer descriptors have been released */
1004 1.1 skrll ifp->if_flags &= ~IFF_OACTIVE;
1005 1.1 skrll (*ifp->if_start)(ifp);
1006 1.1 skrll }
1007 1.1 skrll
1008 1.1 skrll static int
1009 1.1 skrll iwi_intr(void *arg)
1010 1.1 skrll {
1011 1.1 skrll struct iwi_softc *sc = arg;
1012 1.1 skrll u_int32_t r;
1013 1.1 skrll
1014 1.1 skrll if ((r = CSR_READ_4(sc, IWI_CSR_INTR)) == 0 || r == 0xffffffff)
1015 1.1 skrll return 0;
1016 1.1 skrll
1017 1.1 skrll /* Disable interrupts */
1018 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, 0);
1019 1.1 skrll
1020 1.1 skrll DPRINTFN(8, ("INTR!0x%08x\n", r));
1021 1.1 skrll
1022 1.1 skrll if (r & (IWI_INTR_FATAL_ERROR | IWI_INTR_PARITY_ERROR)) {
1023 1.1 skrll aprint_error("%s: fatal error\n", sc->sc_dev.dv_xname);
1024 1.1 skrll iwi_stop(&sc->sc_ic.ic_if, 1);
1025 1.1 skrll }
1026 1.1 skrll
1027 1.1 skrll if (r & IWI_INTR_FW_INITED) {
1028 1.1 skrll if (!(r & (IWI_INTR_FATAL_ERROR | IWI_INTR_PARITY_ERROR)))
1029 1.1 skrll wakeup(sc);
1030 1.1 skrll }
1031 1.1 skrll
1032 1.1 skrll if (r & IWI_INTR_RADIO_OFF) {
1033 1.1 skrll DPRINTF(("radio transmitter off\n"));
1034 1.1 skrll iwi_stop(&sc->sc_ic.ic_if, 1);
1035 1.1 skrll }
1036 1.1 skrll
1037 1.1 skrll if (r & IWI_INTR_RX_TRANSFER)
1038 1.1 skrll iwi_rx_intr(sc);
1039 1.1 skrll
1040 1.1 skrll if (r & IWI_INTR_CMD_TRANSFER)
1041 1.1 skrll wakeup(sc);
1042 1.1 skrll
1043 1.1 skrll if (r & IWI_INTR_TX1_TRANSFER)
1044 1.1 skrll iwi_tx_intr(sc);
1045 1.1 skrll
1046 1.1 skrll /* Acknowledge interrupts */
1047 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_INTR, r);
1048 1.1 skrll
1049 1.1 skrll /* Re-enable interrupts */
1050 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, IWI_INTR_MASK);
1051 1.1 skrll
1052 1.1 skrll return 1;
1053 1.1 skrll }
1054 1.1 skrll
1055 1.1 skrll static int
1056 1.1 skrll iwi_cmd(struct iwi_softc *sc, u_int8_t type, void *data, u_int8_t len,
1057 1.1 skrll int async)
1058 1.1 skrll {
1059 1.1 skrll struct iwi_cmd_desc *desc;
1060 1.1 skrll
1061 1.1 skrll DPRINTFN(2, ("TX!CMD!%u!%u\n", type, len));
1062 1.1 skrll
1063 1.1 skrll desc = &sc->cmd_desc[sc->cmd_cur];
1064 1.1 skrll desc->hdr.type = IWI_HDR_TYPE_COMMAND;
1065 1.1 skrll desc->hdr.flags = IWI_HDR_FLAG_IRQ;
1066 1.1 skrll desc->type = type;
1067 1.1 skrll desc->len = len;
1068 1.1 skrll memcpy(desc->data, data, len);
1069 1.1 skrll
1070 1.1 skrll bus_dmamap_sync(sc->sc_dmat, sc->cmd_ring_map,
1071 1.1 skrll sc->cmd_cur * sizeof (struct iwi_cmd_desc),
1072 1.1 skrll sizeof (struct iwi_cmd_desc), BUS_DMASYNC_PREWRITE);
1073 1.1 skrll
1074 1.1 skrll sc->cmd_cur = (sc->cmd_cur + 1) % IWI_CMD_RING_SIZE;
1075 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_CMD_WRITE_INDEX, sc->cmd_cur);
1076 1.1 skrll
1077 1.1 skrll return async ? 0 : tsleep(sc, 0, "iwicmd", hz);
1078 1.1 skrll }
1079 1.1 skrll
1080 1.1 skrll static int
1081 1.1 skrll iwi_tx_start(struct ifnet *ifp, struct mbuf *m0, struct ieee80211_node *ni)
1082 1.1 skrll {
1083 1.1 skrll struct iwi_softc *sc = ifp->if_softc;
1084 1.1 skrll struct ieee80211com *ic = &sc->sc_ic;
1085 1.1 skrll struct ieee80211_frame *wh;
1086 1.1 skrll struct iwi_tx_buf *buf;
1087 1.1 skrll struct iwi_tx_desc *desc;
1088 1.1 skrll struct mbuf *mnew;
1089 1.1 skrll int error, i;
1090 1.1 skrll
1091 1.1 skrll #if NBPFILTER > 0
1092 1.1 skrll if (sc->sc_drvbpf != NULL) {
1093 1.1 skrll struct iwi_tx_radiotap_header *tap = &sc->sc_txtap;
1094 1.1 skrll
1095 1.1 skrll tap->wt_flags = 0;
1096 1.1 skrll tap->wt_chan_freq = htole16(ic->ic_bss->ni_chan->ic_freq);
1097 1.1 skrll tap->wt_chan_flags = htole16(ic->ic_bss->ni_chan->ic_flags);
1098 1.1 skrll
1099 1.1 skrll bpf_mtap2(sc->sc_drvbpf, tap, sc->sc_txtap_len, m0);
1100 1.1 skrll }
1101 1.1 skrll #endif
1102 1.1 skrll
1103 1.1 skrll buf = &sc->tx_buf[sc->tx_cur];
1104 1.1 skrll desc = &sc->tx_desc[sc->tx_cur];
1105 1.1 skrll
1106 1.1 skrll wh = mtod(m0, struct ieee80211_frame *);
1107 1.1 skrll
1108 1.1 skrll /* trim IEEE802.11 header */
1109 1.1 skrll m_adj(m0, sizeof (struct ieee80211_frame));
1110 1.1 skrll
1111 1.1 skrll error = bus_dmamap_load_mbuf(sc->sc_dmat, buf->map, m0, BUS_DMA_NOWAIT);
1112 1.1 skrll if (error != 0 && error != EFBIG) {
1113 1.1 skrll aprint_error("%s: could not map mbuf (error %d)\n",
1114 1.1 skrll sc->sc_dev.dv_xname, error);
1115 1.1 skrll m_freem(m0);
1116 1.1 skrll return error;
1117 1.1 skrll }
1118 1.1 skrll if (error != 0) {
1119 1.1 skrll /* too many fragments, linearize */
1120 1.1 skrll
1121 1.1 skrll MGETHDR(mnew, M_DONTWAIT, MT_DATA);
1122 1.1 skrll if (mnew == NULL) {
1123 1.1 skrll m_freem(m0);
1124 1.1 skrll return ENOMEM;
1125 1.1 skrll }
1126 1.1 skrll
1127 1.1 skrll M_COPY_PKTHDR(mnew, m0);
1128 1.1 skrll MCLGET(mnew, M_DONTWAIT);
1129 1.1 skrll if (!(mnew->m_flags & M_EXT)) {
1130 1.1 skrll m_freem(m0);
1131 1.1 skrll m_freem(mnew);
1132 1.1 skrll return ENOMEM;
1133 1.1 skrll }
1134 1.1 skrll
1135 1.1 skrll m_copydata(m0, 0, m0->m_pkthdr.len, mtod(mnew, caddr_t));
1136 1.1 skrll m_freem(m0);
1137 1.1 skrll mnew->m_len = mnew->m_pkthdr.len;
1138 1.1 skrll m0 = mnew;
1139 1.1 skrll
1140 1.1 skrll error = bus_dmamap_load_mbuf(sc->sc_dmat, buf->map, m0,
1141 1.1 skrll BUS_DMA_NOWAIT);
1142 1.1 skrll if (error != 0) {
1143 1.1 skrll aprint_error("%s: could not map mbuf (error %d)\n",
1144 1.1 skrll sc->sc_dev.dv_xname, error);
1145 1.1 skrll m_freem(m0);
1146 1.1 skrll return error;
1147 1.1 skrll }
1148 1.1 skrll }
1149 1.1 skrll
1150 1.1 skrll buf->m = m0;
1151 1.1 skrll buf->ni = ni;
1152 1.1 skrll
1153 1.1 skrll desc->hdr.type = IWI_HDR_TYPE_DATA;
1154 1.1 skrll desc->hdr.flags = IWI_HDR_FLAG_IRQ;
1155 1.1 skrll desc->cmd = IWI_DATA_CMD_TX;
1156 1.1 skrll desc->len = htole16(m0->m_pkthdr.len);
1157 1.1 skrll desc->flags = 0;
1158 1.1 skrll if (ic->ic_opmode == IEEE80211_M_IBSS) {
1159 1.1 skrll if (!IEEE80211_IS_MULTICAST(wh->i_addr1))
1160 1.1 skrll desc->flags |= IWI_DATA_FLAG_NEED_ACK;
1161 1.1 skrll } else if (!IEEE80211_IS_MULTICAST(wh->i_addr3))
1162 1.1 skrll desc->flags |= IWI_DATA_FLAG_NEED_ACK;
1163 1.1 skrll
1164 1.1 skrll if (ic->ic_flags & IEEE80211_F_PRIVACY) {
1165 1.1 skrll wh->i_fc[1] |= IEEE80211_FC1_WEP;
1166 1.1 skrll desc->wep_txkey = ic->ic_wep_txkey;
1167 1.1 skrll } else
1168 1.1 skrll desc->flags |= IWI_DATA_FLAG_NO_WEP;
1169 1.1 skrll
1170 1.1 skrll if (ic->ic_flags & IEEE80211_F_SHPREAMBLE)
1171 1.1 skrll desc->flags |= IWI_DATA_FLAG_SHPREAMBLE;
1172 1.1 skrll
1173 1.1 skrll memcpy(&desc->wh, wh, sizeof (struct ieee80211_frame));
1174 1.1 skrll desc->nseg = htole32(buf->map->dm_nsegs);
1175 1.1 skrll for (i = 0; i < buf->map->dm_nsegs; i++) {
1176 1.1 skrll desc->seg_addr[i] = htole32(buf->map->dm_segs[i].ds_addr);
1177 1.1 skrll desc->seg_len[i] = htole32(buf->map->dm_segs[i].ds_len);
1178 1.1 skrll }
1179 1.1 skrll
1180 1.1 skrll bus_dmamap_sync(sc->sc_dmat, sc->tx_ring_map,
1181 1.1 skrll sc->tx_cur * sizeof (struct iwi_tx_desc),
1182 1.1 skrll sizeof (struct iwi_tx_desc), BUS_DMASYNC_PREWRITE);
1183 1.1 skrll
1184 1.1 skrll bus_dmamap_sync(sc->sc_dmat, buf->map, 0, MCLBYTES,
1185 1.1 skrll BUS_DMASYNC_PREWRITE);
1186 1.1 skrll
1187 1.1 skrll DPRINTFN(5, ("TX!DATA!%u!%u\n", desc->len, desc->nseg));
1188 1.1 skrll
1189 1.1 skrll /* Inform firmware about this new packet */
1190 1.1 skrll sc->tx_queued++;
1191 1.1 skrll sc->tx_cur = (sc->tx_cur + 1) % IWI_TX_RING_SIZE;
1192 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX1_WRITE_INDEX, sc->tx_cur);
1193 1.1 skrll
1194 1.1 skrll return 0;
1195 1.1 skrll }
1196 1.1 skrll
1197 1.1 skrll static void
1198 1.1 skrll iwi_start(struct ifnet *ifp)
1199 1.1 skrll {
1200 1.1 skrll struct iwi_softc *sc = ifp->if_softc;
1201 1.1 skrll struct ieee80211com *ic = &sc->sc_ic;
1202 1.1 skrll struct mbuf *m0;
1203 1.1 skrll struct ieee80211_node *ni;
1204 1.1 skrll
1205 1.1 skrll if (ic->ic_state != IEEE80211_S_RUN)
1206 1.1 skrll return;
1207 1.1 skrll
1208 1.1 skrll for (;;) {
1209 1.1 skrll IF_DEQUEUE(&ifp->if_snd, m0);
1210 1.1 skrll if (m0 == NULL)
1211 1.1 skrll break;
1212 1.1 skrll
1213 1.1 skrll if (sc->tx_queued >= IWI_TX_RING_SIZE - 4) {
1214 1.1 skrll IF_PREPEND(&ifp->if_snd, m0);
1215 1.1 skrll ifp->if_flags |= IFF_OACTIVE;
1216 1.1 skrll break;
1217 1.1 skrll }
1218 1.1 skrll
1219 1.1 skrll #if NBPFILTER > 0
1220 1.1 skrll if (ifp->if_bpf != NULL)
1221 1.1 skrll bpf_mtap(ifp->if_bpf, m0);
1222 1.1 skrll #endif
1223 1.1 skrll
1224 1.1 skrll m0 = ieee80211_encap(ifp, m0, &ni);
1225 1.1 skrll if (m0 == NULL)
1226 1.1 skrll continue;
1227 1.1 skrll
1228 1.1 skrll #if NBPFILTER > 0
1229 1.1 skrll if (ic->ic_rawbpf != NULL)
1230 1.1 skrll bpf_mtap(ic->ic_rawbpf, m0);
1231 1.1 skrll #endif
1232 1.1 skrll
1233 1.1 skrll if (iwi_tx_start(ifp, m0, ni) != 0) {
1234 1.1 skrll if (ni != NULL)
1235 1.1 skrll ieee80211_release_node(ic, ni);
1236 1.1 skrll break;
1237 1.1 skrll }
1238 1.1 skrll
1239 1.1 skrll /* start watchdog timer */
1240 1.1 skrll sc->sc_tx_timer = 5;
1241 1.1 skrll ifp->if_timer = 1;
1242 1.1 skrll }
1243 1.1 skrll }
1244 1.1 skrll
1245 1.1 skrll static void
1246 1.1 skrll iwi_watchdog(struct ifnet *ifp)
1247 1.1 skrll {
1248 1.1 skrll struct iwi_softc *sc = ifp->if_softc;
1249 1.1 skrll
1250 1.1 skrll ifp->if_timer = 0;
1251 1.1 skrll
1252 1.1 skrll if (sc->sc_tx_timer > 0) {
1253 1.1 skrll if (--sc->sc_tx_timer == 0) {
1254 1.1 skrll aprint_error("%s: device timeout\n",
1255 1.1 skrll sc->sc_dev.dv_xname);
1256 1.1 skrll iwi_stop(ifp, 1);
1257 1.1 skrll return;
1258 1.1 skrll }
1259 1.1 skrll ifp->if_timer = 1;
1260 1.1 skrll }
1261 1.1 skrll
1262 1.1 skrll ieee80211_watchdog(ifp);
1263 1.1 skrll }
1264 1.1 skrll
1265 1.1 skrll static int
1266 1.1 skrll iwi_get_table0(struct iwi_softc *sc, u_int32_t *tbl)
1267 1.1 skrll {
1268 1.1 skrll u_int32_t size, buf[128];
1269 1.1 skrll
1270 1.1 skrll if (!(sc->flags & IWI_FLAG_FW_INITED)) {
1271 1.1 skrll memset(buf, 0, sizeof buf);
1272 1.1 skrll return copyout(buf, tbl, sizeof buf);
1273 1.1 skrll }
1274 1.1 skrll
1275 1.1 skrll size = min(CSR_READ_4(sc, IWI_CSR_TABLE0_SIZE), 128 - 1);
1276 1.1 skrll CSR_READ_REGION_4(sc, IWI_CSR_TABLE0_BASE, &buf[1], size);
1277 1.1 skrll
1278 1.1 skrll return copyout(buf, tbl, sizeof buf);
1279 1.1 skrll }
1280 1.1 skrll
1281 1.1 skrll static int
1282 1.1 skrll iwi_get_radio(struct iwi_softc *sc, int *ret)
1283 1.1 skrll {
1284 1.1 skrll int val;
1285 1.1 skrll
1286 1.1 skrll val = (CSR_READ_4(sc, IWI_CSR_IO) & IWI_IO_RADIO_ENABLED) ? 1 : 0;
1287 1.1 skrll return copyout(&val, ret, sizeof val);
1288 1.1 skrll }
1289 1.1 skrll
1290 1.1 skrll static int
1291 1.1 skrll iwi_ioctl(struct ifnet *ifp, u_long cmd, caddr_t data)
1292 1.1 skrll {
1293 1.1 skrll struct iwi_softc *sc = ifp->if_softc;
1294 1.1 skrll struct ifreq *ifr;
1295 1.1 skrll int s, error = 0;
1296 1.1 skrll
1297 1.1 skrll s = splnet();
1298 1.1 skrll
1299 1.1 skrll switch (cmd) {
1300 1.1 skrll case SIOCSIFFLAGS:
1301 1.1 skrll if (ifp->if_flags & IFF_UP) {
1302 1.1 skrll if (!(ifp->if_flags & IFF_RUNNING))
1303 1.1 skrll iwi_init(ifp);
1304 1.1 skrll } else {
1305 1.1 skrll if (ifp->if_flags & IFF_RUNNING)
1306 1.1 skrll iwi_stop(ifp, 1);
1307 1.1 skrll }
1308 1.1 skrll break;
1309 1.1 skrll
1310 1.1 skrll case SIOCGTABLE0:
1311 1.1 skrll ifr = (struct ifreq *)data;
1312 1.1 skrll error = iwi_get_table0(sc, (u_int32_t *)ifr->ifr_data);
1313 1.1 skrll break;
1314 1.1 skrll
1315 1.1 skrll case SIOCGRADIO:
1316 1.1 skrll ifr = (struct ifreq *)data;
1317 1.1 skrll error = iwi_get_radio(sc, (int *)ifr->ifr_data);
1318 1.1 skrll break;
1319 1.1 skrll
1320 1.1 skrll case SIOCSLOADFW:
1321 1.1 skrll /* only super-user can do that! */
1322 1.1 skrll if ((error = suser(curproc->p_ucred, &curproc->p_acflag)) != 0)
1323 1.1 skrll break;
1324 1.1 skrll
1325 1.1 skrll ifr = (struct ifreq *)data;
1326 1.1 skrll error = iwi_cache_firmware(sc, ifr->ifr_data);
1327 1.1 skrll break;
1328 1.1 skrll
1329 1.1 skrll case SIOCSKILLFW:
1330 1.1 skrll /* only super-user can do that! */
1331 1.1 skrll if ((error = suser(curproc->p_ucred, &curproc->p_acflag)) != 0)
1332 1.1 skrll break;
1333 1.1 skrll
1334 1.1 skrll iwi_stop(ifp, 1);
1335 1.1 skrll iwi_free_firmware(sc);
1336 1.1 skrll break;
1337 1.1 skrll
1338 1.1 skrll case SIOCG80211AUTH:
1339 1.1 skrll ((struct ieee80211_auth *)data)->i_authtype = sc->authmode;
1340 1.1 skrll break;
1341 1.1 skrll
1342 1.1 skrll case SIOCS80211AUTH:
1343 1.1 skrll /* only super-user can do that! */
1344 1.1 skrll if ((error = suser(curproc->p_ucred, &curproc->p_acflag)) != 0)
1345 1.1 skrll break;
1346 1.1 skrll
1347 1.1 skrll sc->authmode = ((struct ieee80211_auth *)data)->i_authtype;
1348 1.1 skrll break;
1349 1.1 skrll
1350 1.1 skrll default:
1351 1.1 skrll error = ieee80211_ioctl(ifp, cmd, data);
1352 1.1 skrll }
1353 1.1 skrll
1354 1.1 skrll if (error == ENETRESET && cmd != SIOCADDMULTI) {
1355 1.1 skrll if ((ifp->if_flags & (IFF_UP | IFF_RUNNING)) ==
1356 1.1 skrll (IFF_UP | IFF_RUNNING))
1357 1.1 skrll iwi_init(ifp);
1358 1.1 skrll error = 0;
1359 1.1 skrll }
1360 1.1 skrll
1361 1.1 skrll splx(s);
1362 1.1 skrll return error;
1363 1.1 skrll }
1364 1.1 skrll
1365 1.1 skrll static void
1366 1.1 skrll iwi_stop_master(struct iwi_softc *sc)
1367 1.1 skrll {
1368 1.1 skrll int ntries;
1369 1.1 skrll
1370 1.1 skrll /* Disable interrupts */
1371 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, 0);
1372 1.1 skrll
1373 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RST, IWI_RST_STOP_MASTER);
1374 1.1 skrll for (ntries = 0; ntries < 5; ntries++) {
1375 1.1 skrll if (CSR_READ_4(sc, IWI_CSR_RST) & IWI_RST_MASTER_DISABLED)
1376 1.1 skrll break;
1377 1.1 skrll DELAY(10);
1378 1.1 skrll }
1379 1.1 skrll if (ntries == 5)
1380 1.1 skrll aprint_error("%s: timeout waiting for master\n",
1381 1.1 skrll sc->sc_dev.dv_xname);
1382 1.1 skrll
1383 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) |
1384 1.1 skrll IWI_RST_PRINCETON_RESET);
1385 1.1 skrll
1386 1.1 skrll sc->flags &= ~IWI_FLAG_FW_INITED;
1387 1.1 skrll }
1388 1.1 skrll
1389 1.1 skrll static int
1390 1.1 skrll iwi_reset(struct iwi_softc *sc)
1391 1.1 skrll {
1392 1.1 skrll int i, ntries;
1393 1.1 skrll
1394 1.1 skrll iwi_stop_master(sc);
1395 1.1 skrll
1396 1.1 skrll /* Move adapter to D0 state */
1397 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_CTL, CSR_READ_4(sc, IWI_CSR_CTL) |
1398 1.1 skrll IWI_CTL_INIT);
1399 1.1 skrll
1400 1.1 skrll /* Initialize Phase-Locked Level (PLL) */
1401 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_READ_INT, IWI_READ_INT_INIT_HOST);
1402 1.1 skrll
1403 1.1 skrll /* Wait for clock stabilization */
1404 1.1 skrll for (ntries = 0; ntries < 1000; ntries++) {
1405 1.1 skrll if (CSR_READ_4(sc, IWI_CSR_CTL) & IWI_CTL_CLOCK_READY)
1406 1.1 skrll break;
1407 1.1 skrll DELAY(200);
1408 1.1 skrll }
1409 1.1 skrll if (ntries == 1000)
1410 1.1 skrll return EIO;
1411 1.1 skrll
1412 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) |
1413 1.1 skrll IWI_RST_SW_RESET);
1414 1.1 skrll
1415 1.1 skrll DELAY(10);
1416 1.1 skrll
1417 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_CTL, CSR_READ_4(sc, IWI_CSR_CTL) |
1418 1.1 skrll IWI_CTL_INIT);
1419 1.1 skrll
1420 1.1 skrll /* Clear NIC memory */
1421 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_AUTOINC_ADDR, 0);
1422 1.1 skrll for (i = 0; i < 0xc000; i++)
1423 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, 0);
1424 1.1 skrll
1425 1.1 skrll return 0;
1426 1.1 skrll }
1427 1.1 skrll
1428 1.1 skrll static int
1429 1.1 skrll iwi_load_ucode(struct iwi_softc *sc, void *uc, int size)
1430 1.1 skrll {
1431 1.1 skrll u_int16_t *w;
1432 1.1 skrll int ntries, i;
1433 1.1 skrll
1434 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) |
1435 1.1 skrll IWI_RST_STOP_MASTER);
1436 1.1 skrll for (ntries = 0; ntries < 5; ntries++) {
1437 1.1 skrll if (CSR_READ_4(sc, IWI_CSR_RST) & IWI_RST_MASTER_DISABLED)
1438 1.1 skrll break;
1439 1.1 skrll DELAY(10);
1440 1.1 skrll }
1441 1.1 skrll if (ntries == 5) {
1442 1.1 skrll aprint_error("%s: timeout waiting for master\n",
1443 1.1 skrll sc->sc_dev.dv_xname);
1444 1.1 skrll return EIO;
1445 1.1 skrll }
1446 1.1 skrll
1447 1.1 skrll MEM_WRITE_4(sc, 0x3000e0, 0x80000000);
1448 1.1 skrll DELAY(5000);
1449 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) &
1450 1.1 skrll ~IWI_RST_PRINCETON_RESET);
1451 1.1 skrll DELAY(5000);
1452 1.1 skrll MEM_WRITE_4(sc, 0x3000e0, 0);
1453 1.1 skrll DELAY(1000);
1454 1.1 skrll MEM_WRITE_4(sc, 0x300004, 1);
1455 1.1 skrll DELAY(1000);
1456 1.1 skrll MEM_WRITE_4(sc, 0x300004, 0);
1457 1.1 skrll DELAY(1000);
1458 1.1 skrll MEM_WRITE_1(sc, 0x200000, 0x00);
1459 1.1 skrll MEM_WRITE_1(sc, 0x200000, 0x40);
1460 1.1 skrll
1461 1.1 skrll /* Adapter is buggy, we must set the address for each word */
1462 1.1 skrll for (w = uc; size > 0; w++, size -= 2)
1463 1.1 skrll MEM_WRITE_2(sc, 0x200010, *w);
1464 1.1 skrll
1465 1.1 skrll MEM_WRITE_1(sc, 0x200000, 0x00);
1466 1.1 skrll MEM_WRITE_1(sc, 0x200000, 0x80);
1467 1.1 skrll
1468 1.1 skrll /* Wait until we get a response in the uc queue */
1469 1.1 skrll for (ntries = 0; ntries < 100; ntries++) {
1470 1.1 skrll if (MEM_READ_1(sc, 0x200000) & 1)
1471 1.1 skrll break;
1472 1.1 skrll DELAY(100);
1473 1.1 skrll }
1474 1.1 skrll if (ntries == 100) {
1475 1.1 skrll aprint_error("%s: timeout waiting for ucode to initialize\n",
1476 1.1 skrll sc->sc_dev.dv_xname);
1477 1.1 skrll return EIO;
1478 1.1 skrll }
1479 1.1 skrll
1480 1.1 skrll /* Empty the uc queue or the firmware will not initialize properly */
1481 1.1 skrll for (i = 0; i < 7; i++)
1482 1.1 skrll MEM_READ_4(sc, 0x200004);
1483 1.1 skrll
1484 1.1 skrll MEM_WRITE_1(sc, 0x200000, 0x00);
1485 1.1 skrll
1486 1.1 skrll return 0;
1487 1.1 skrll }
1488 1.1 skrll
1489 1.1 skrll /* macro to handle unaligned little endian data in firmware image */
1490 1.1 skrll #define GETLE32(p) ((p)[0] | (p)[1] << 8 | (p)[2] << 16 | (p)[3] << 24)
1491 1.1 skrll static int
1492 1.1 skrll iwi_load_firmware(struct iwi_softc *sc, void *fw, int size)
1493 1.1 skrll {
1494 1.1 skrll bus_dmamap_t map;
1495 1.1 skrll bus_dma_segment_t seg;
1496 1.1 skrll caddr_t virtaddr;
1497 1.1 skrll u_char *p, *end;
1498 1.1 skrll u_int32_t sentinel, ctl, src, dst, sum, len, mlen;
1499 1.1 skrll int ntries, nsegs, error;
1500 1.1 skrll
1501 1.1 skrll /* Allocate DMA memory for storing firmware image */
1502 1.1 skrll error = bus_dmamap_create(sc->sc_dmat, size, 1, size, 0,
1503 1.1 skrll BUS_DMA_NOWAIT, &map);
1504 1.1 skrll if (error != 0) {
1505 1.1 skrll aprint_error("%s: could not create firmware DMA map\n",
1506 1.1 skrll sc->sc_dev.dv_xname);
1507 1.1 skrll goto fail1;
1508 1.1 skrll }
1509 1.1 skrll
1510 1.1 skrll /*
1511 1.1 skrll * We cannot map fw directly because of some hardware constraints on
1512 1.1 skrll * the mapping address.
1513 1.1 skrll */
1514 1.1 skrll error = bus_dmamem_alloc(sc->sc_dmat, size, PAGE_SIZE, 0, &seg, 1,
1515 1.1 skrll &nsegs, BUS_DMA_NOWAIT);
1516 1.1 skrll if (error != 0) {
1517 1.1 skrll aprint_error("%s: could allocate firmware DMA memory\n",
1518 1.1 skrll sc->sc_dev.dv_xname);
1519 1.1 skrll goto fail2;
1520 1.1 skrll }
1521 1.1 skrll
1522 1.1 skrll error = bus_dmamem_map(sc->sc_dmat, &seg, nsegs, size, &virtaddr,
1523 1.1 skrll BUS_DMA_NOWAIT);
1524 1.1 skrll if (error != 0) {
1525 1.1 skrll aprint_error("%s: could not load firmware DMA map\n",
1526 1.1 skrll sc->sc_dev.dv_xname);
1527 1.1 skrll goto fail3;
1528 1.1 skrll }
1529 1.1 skrll
1530 1.1 skrll error = bus_dmamap_load(sc->sc_dmat, map, virtaddr, size, NULL,
1531 1.1 skrll BUS_DMA_NOWAIT);
1532 1.1 skrll if (error != 0) {
1533 1.1 skrll aprint_error("%s: could not load fw dma map\n",
1534 1.1 skrll sc->sc_dev.dv_xname);
1535 1.1 skrll goto fail4;
1536 1.1 skrll }
1537 1.1 skrll
1538 1.1 skrll /* Copy firmware image to DMA memory */
1539 1.1 skrll memcpy(virtaddr, fw, size);
1540 1.1 skrll
1541 1.1 skrll /* Make sure the adapter will get up-to-date values */
1542 1.1 skrll bus_dmamap_sync(sc->sc_dmat, map, 0, size, BUS_DMASYNC_PREWRITE);
1543 1.1 skrll
1544 1.1 skrll /* Tell the adapter where the command blocks are stored */
1545 1.1 skrll MEM_WRITE_4(sc, 0x3000a0, 0x27000);
1546 1.1 skrll
1547 1.1 skrll /*
1548 1.1 skrll * Store command blocks into adapter's internal memory using register
1549 1.1 skrll * indirections. The adapter will read the firmware image through DMA
1550 1.1 skrll * using information stored in command blocks.
1551 1.1 skrll */
1552 1.1 skrll src = map->dm_segs[0].ds_addr;
1553 1.1 skrll p = virtaddr;
1554 1.1 skrll end = p + size;
1555 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_AUTOINC_ADDR, 0x27000);
1556 1.1 skrll
1557 1.1 skrll while (p < end) {
1558 1.1 skrll dst = GETLE32(p); p += 4; src += 4;
1559 1.1 skrll len = GETLE32(p); p += 4; src += 4;
1560 1.1 skrll p += len;
1561 1.1 skrll
1562 1.1 skrll while (len > 0) {
1563 1.1 skrll mlen = min(len, IWI_CB_MAXDATALEN);
1564 1.1 skrll
1565 1.1 skrll ctl = IWI_CB_DEFAULT_CTL | mlen;
1566 1.1 skrll sum = ctl ^ src ^ dst;
1567 1.1 skrll
1568 1.1 skrll /* Write a command block */
1569 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, ctl);
1570 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, src);
1571 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, dst);
1572 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, sum);
1573 1.1 skrll
1574 1.1 skrll src += mlen;
1575 1.1 skrll dst += mlen;
1576 1.1 skrll len -= mlen;
1577 1.1 skrll }
1578 1.1 skrll }
1579 1.1 skrll
1580 1.1 skrll /* Write a fictive final command block (sentinel) */
1581 1.1 skrll sentinel = CSR_READ_4(sc, IWI_CSR_AUTOINC_ADDR);
1582 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_AUTOINC_DATA, 0);
1583 1.1 skrll
1584 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RST, CSR_READ_4(sc, IWI_CSR_RST) &
1585 1.1 skrll ~(IWI_RST_MASTER_DISABLED | IWI_RST_STOP_MASTER));
1586 1.1 skrll
1587 1.1 skrll /* Tell the adapter to start processing command blocks */
1588 1.1 skrll MEM_WRITE_4(sc, 0x3000a4, 0x540100);
1589 1.1 skrll
1590 1.1 skrll /* Wait until the adapter has processed all command blocks */
1591 1.1 skrll for (ntries = 0; ntries < 400; ntries++) {
1592 1.1 skrll if (MEM_READ_4(sc, 0x3000d0) >= sentinel)
1593 1.1 skrll break;
1594 1.1 skrll DELAY(100);
1595 1.1 skrll }
1596 1.1 skrll if (ntries == 400) {
1597 1.1 skrll aprint_error("%s: timeout processing cb\n",
1598 1.1 skrll sc->sc_dev.dv_xname);
1599 1.1 skrll error = EIO;
1600 1.1 skrll goto fail5;
1601 1.1 skrll }
1602 1.1 skrll
1603 1.1 skrll /* We're done with command blocks processing */
1604 1.1 skrll MEM_WRITE_4(sc, 0x3000a4, 0x540c00);
1605 1.1 skrll
1606 1.1 skrll /* Allow interrupts so we know when the firmware is inited */
1607 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_INTR_MASK, IWI_INTR_MASK);
1608 1.1 skrll
1609 1.1 skrll /* Tell the adapter to initialize the firmware */
1610 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RST, 0);
1611 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_CTL, CSR_READ_4(sc, IWI_CSR_CTL) |
1612 1.1 skrll IWI_CTL_ALLOW_STANDBY);
1613 1.1 skrll
1614 1.1 skrll /* Wait at most one second for firmware initialization to complete */
1615 1.1 skrll if ((error = tsleep(sc, 0, "iwiinit", hz)) != 0) {
1616 1.1 skrll aprint_error("%s: timeout waiting for firmware initialization "
1617 1.1 skrll "to complete\n", sc->sc_dev.dv_xname);
1618 1.1 skrll goto fail5;
1619 1.1 skrll }
1620 1.1 skrll
1621 1.1 skrll fail5: bus_dmamap_sync(sc->sc_dmat, map, 0, size, BUS_DMASYNC_POSTWRITE);
1622 1.1 skrll bus_dmamap_unload(sc->sc_dmat, map);
1623 1.1 skrll fail4: bus_dmamem_unmap(sc->sc_dmat, virtaddr, size);
1624 1.1 skrll fail3: bus_dmamem_free(sc->sc_dmat, &seg, 1);
1625 1.1 skrll fail2: bus_dmamap_destroy(sc->sc_dmat, map);
1626 1.1 skrll
1627 1.1 skrll fail1: return error;
1628 1.1 skrll }
1629 1.1 skrll
1630 1.1 skrll /*
1631 1.1 skrll * Store firmware into kernel memory so we can download it when we need to,
1632 1.1 skrll * e.g when the adapter wakes up from suspend mode.
1633 1.1 skrll */
1634 1.1 skrll static int
1635 1.1 skrll iwi_cache_firmware(struct iwi_softc *sc, void *data)
1636 1.1 skrll {
1637 1.1 skrll struct iwi_firmware *kfw = &sc->fw;
1638 1.1 skrll struct iwi_firmware ufw;
1639 1.1 skrll int error;
1640 1.1 skrll
1641 1.1 skrll iwi_free_firmware(sc);
1642 1.1 skrll
1643 1.1 skrll if ((error = copyin(data, &ufw, sizeof ufw)) != 0)
1644 1.1 skrll goto fail1;
1645 1.1 skrll
1646 1.1 skrll kfw->boot_size = ufw.boot_size;
1647 1.1 skrll kfw->ucode_size = ufw.ucode_size;
1648 1.1 skrll kfw->main_size = ufw.main_size;
1649 1.1 skrll
1650 1.1 skrll kfw->boot = malloc(kfw->boot_size, M_DEVBUF, M_NOWAIT);
1651 1.1 skrll if (kfw->boot == NULL) {
1652 1.1 skrll error = ENOMEM;
1653 1.1 skrll goto fail1;
1654 1.1 skrll }
1655 1.1 skrll
1656 1.1 skrll kfw->ucode = malloc(kfw->ucode_size, M_DEVBUF, M_NOWAIT);
1657 1.1 skrll if (kfw->ucode == NULL) {
1658 1.1 skrll error = ENOMEM;
1659 1.1 skrll goto fail2;
1660 1.1 skrll }
1661 1.1 skrll
1662 1.1 skrll kfw->main = malloc(kfw->main_size, M_DEVBUF, M_NOWAIT);
1663 1.1 skrll if (kfw->main == NULL) {
1664 1.1 skrll error = ENOMEM;
1665 1.1 skrll goto fail3;
1666 1.1 skrll }
1667 1.1 skrll
1668 1.1 skrll if ((error = copyin(ufw.boot, kfw->boot, kfw->boot_size)) != 0)
1669 1.1 skrll goto fail4;
1670 1.1 skrll
1671 1.1 skrll if ((error = copyin(ufw.ucode, kfw->ucode, kfw->ucode_size)) != 0)
1672 1.1 skrll goto fail4;
1673 1.1 skrll
1674 1.1 skrll if ((error = copyin(ufw.main, kfw->main, kfw->main_size)) != 0)
1675 1.1 skrll goto fail4;
1676 1.1 skrll
1677 1.1 skrll DPRINTF(("Firmware cached: boot %u, ucode %u, main %u\n",
1678 1.1 skrll kfw->boot_size, kfw->ucode_size, kfw->main_size));
1679 1.1 skrll
1680 1.1 skrll sc->flags |= IWI_FLAG_FW_CACHED;
1681 1.1 skrll
1682 1.1 skrll return 0;
1683 1.1 skrll
1684 1.1 skrll fail4: free(kfw->boot, M_DEVBUF);
1685 1.1 skrll fail3: free(kfw->ucode, M_DEVBUF);
1686 1.1 skrll fail2: free(kfw->main, M_DEVBUF);
1687 1.1 skrll fail1:
1688 1.1 skrll return error;
1689 1.1 skrll }
1690 1.1 skrll
1691 1.1 skrll static void
1692 1.1 skrll iwi_free_firmware(struct iwi_softc *sc)
1693 1.1 skrll {
1694 1.1 skrll if (!(sc->flags & IWI_FLAG_FW_CACHED))
1695 1.1 skrll return;
1696 1.1 skrll
1697 1.1 skrll free(sc->fw.boot, M_DEVBUF);
1698 1.1 skrll free(sc->fw.ucode, M_DEVBUF);
1699 1.1 skrll free(sc->fw.main, M_DEVBUF);
1700 1.1 skrll
1701 1.1 skrll sc->flags &= ~IWI_FLAG_FW_CACHED;
1702 1.1 skrll }
1703 1.1 skrll
1704 1.1 skrll static int
1705 1.1 skrll iwi_config(struct iwi_softc *sc)
1706 1.1 skrll {
1707 1.1 skrll struct ieee80211com *ic = &sc->sc_ic;
1708 1.1 skrll struct ifnet *ifp = &ic->ic_if;
1709 1.1 skrll struct iwi_configuration config;
1710 1.1 skrll struct iwi_rateset rs;
1711 1.1 skrll struct iwi_txpower power;
1712 1.1 skrll struct ieee80211_wepkey *k;
1713 1.1 skrll struct iwi_wep_key wepkey;
1714 1.1 skrll u_int32_t data;
1715 1.1 skrll int error, i;
1716 1.1 skrll
1717 1.1 skrll IEEE80211_ADDR_COPY(ic->ic_myaddr, LLADDR(ifp->if_sadl));
1718 1.1 skrll DPRINTF(("Setting MAC address to %s\n", ether_sprintf(ic->ic_myaddr)));
1719 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_MAC_ADDRESS, ic->ic_myaddr,
1720 1.1 skrll IEEE80211_ADDR_LEN, 0);
1721 1.1 skrll if (error != 0)
1722 1.1 skrll return error;
1723 1.1 skrll
1724 1.1 skrll memset(&config, 0, sizeof config);
1725 1.1 skrll config.bluetooth_coexistence = 1;
1726 1.1 skrll config.multicast_enabled = 1;
1727 1.1 skrll config.noise_reported = 1;
1728 1.1 skrll DPRINTF(("Configuring adapter\n"));
1729 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_CONFIGURATION, &config, sizeof config,
1730 1.1 skrll 0);
1731 1.1 skrll if (error != 0)
1732 1.1 skrll return error;
1733 1.1 skrll
1734 1.1 skrll data = htole32(IWI_POWER_MODE_CAM);
1735 1.1 skrll DPRINTF(("Setting power mode to %u\n", le32toh(data)));
1736 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_POWER_MODE, &data, sizeof data, 0);
1737 1.1 skrll if (error != 0)
1738 1.1 skrll return error;
1739 1.1 skrll
1740 1.1 skrll data = htole32(ic->ic_rtsthreshold);
1741 1.1 skrll DPRINTF(("Setting RTS threshold to %u\n", le32toh(data)));
1742 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_RTS_THRESHOLD, &data, sizeof data, 0);
1743 1.1 skrll if (error != 0)
1744 1.1 skrll return error;
1745 1.1 skrll
1746 1.1 skrll if (ic->ic_opmode == IEEE80211_M_IBSS) {
1747 1.1 skrll power.mode = IWI_MODE_11B;
1748 1.1 skrll power.nchan = 11;
1749 1.1 skrll for (i = 0; i < 11; i++) {
1750 1.1 skrll power.chan[i].chan = i + 1;
1751 1.1 skrll power.chan[i].power = IWI_TXPOWER_MAX;
1752 1.1 skrll }
1753 1.1 skrll DPRINTF(("Setting .11b channels tx power\n"));
1754 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_TX_POWER, &power, sizeof power,
1755 1.1 skrll 0);
1756 1.1 skrll if (error != 0)
1757 1.1 skrll return error;
1758 1.1 skrll
1759 1.1 skrll power.mode = IWI_MODE_11G;
1760 1.1 skrll DPRINTF(("Setting .11g channels tx power\n"));
1761 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_TX_POWER, &power, sizeof power,
1762 1.1 skrll 0);
1763 1.1 skrll if (error != 0)
1764 1.1 skrll return error;
1765 1.1 skrll }
1766 1.1 skrll
1767 1.1 skrll rs.mode = IWI_MODE_11G;
1768 1.1 skrll rs.type = IWI_RATESET_TYPE_SUPPORTED;
1769 1.1 skrll rs.nrates = ic->ic_sup_rates[IEEE80211_MODE_11G].rs_nrates;
1770 1.1 skrll memcpy(rs.rates, ic->ic_sup_rates[IEEE80211_MODE_11G].rs_rates,
1771 1.1 skrll rs.nrates);
1772 1.1 skrll DPRINTF(("Setting .11bg supported rates (%u)\n", rs.nrates));
1773 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_RATES, &rs, sizeof rs, 0);
1774 1.1 skrll if (error != 0)
1775 1.1 skrll return error;
1776 1.1 skrll
1777 1.1 skrll rs.mode = IWI_MODE_11A;
1778 1.1 skrll rs.type = IWI_RATESET_TYPE_SUPPORTED;
1779 1.1 skrll rs.nrates = ic->ic_sup_rates[IEEE80211_MODE_11A].rs_nrates;
1780 1.1 skrll memcpy(rs.rates, ic->ic_sup_rates[IEEE80211_MODE_11A].rs_rates,
1781 1.1 skrll rs.nrates);
1782 1.1 skrll DPRINTF(("Setting .11a supported rates (%u)\n", rs.nrates));
1783 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_RATES, &rs, sizeof rs, 0);
1784 1.1 skrll if (error != 0)
1785 1.1 skrll return error;
1786 1.1 skrll
1787 1.1 skrll data = htole32(arc4random());
1788 1.1 skrll DPRINTF(("Setting initialization vector to %u\n", le32toh(data)));
1789 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_IV, &data, sizeof data, 0);
1790 1.1 skrll if (error != 0)
1791 1.1 skrll return error;
1792 1.1 skrll
1793 1.1 skrll if (ic->ic_flags & IEEE80211_F_PRIVACY) {
1794 1.1 skrll k = ic->ic_nw_keys;
1795 1.1 skrll for (i = 0; i < IEEE80211_WEP_NKID; i++, k++) {
1796 1.1 skrll wepkey.cmd = IWI_WEP_KEY_CMD_SETKEY;
1797 1.1 skrll wepkey.idx = i;
1798 1.1 skrll wepkey.len = k->wk_len;
1799 1.1 skrll memset(wepkey.key, 0, sizeof wepkey.key);
1800 1.1 skrll memcpy(wepkey.key, k->wk_key, k->wk_len);
1801 1.1 skrll DPRINTF(("Setting wep key index %u len %u\n",
1802 1.1 skrll wepkey.idx, wepkey.len));
1803 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_WEP_KEY, &wepkey,
1804 1.1 skrll sizeof wepkey, 0);
1805 1.1 skrll if (error != 0)
1806 1.1 skrll return error;
1807 1.1 skrll }
1808 1.1 skrll }
1809 1.1 skrll
1810 1.1 skrll /* Enable adapter */
1811 1.1 skrll DPRINTF(("Enabling adapter\n"));
1812 1.1 skrll return iwi_cmd(sc, IWI_CMD_ENABLE, NULL, 0, 0);
1813 1.1 skrll }
1814 1.1 skrll
1815 1.1 skrll static int
1816 1.1 skrll iwi_scan(struct iwi_softc *sc)
1817 1.1 skrll {
1818 1.1 skrll struct ieee80211com *ic = &sc->sc_ic;
1819 1.1 skrll struct iwi_scan scan;
1820 1.1 skrll u_int8_t *p;
1821 1.1 skrll int i, count;
1822 1.1 skrll
1823 1.1 skrll memset(&scan, 0, sizeof scan);
1824 1.1 skrll scan.type = IWI_SCAN_TYPE_BROADCAST;
1825 1.1 skrll scan.intval = htole16(40);
1826 1.1 skrll
1827 1.1 skrll p = scan.channels;
1828 1.1 skrll count = 0;
1829 1.1 skrll for (i = 0; i <= IEEE80211_CHAN_MAX; i++) {
1830 1.1 skrll if (IEEE80211_IS_CHAN_5GHZ(&ic->ic_channels[i]) &&
1831 1.1 skrll isset(ic->ic_chan_active, i)) {
1832 1.1 skrll *++p = i;
1833 1.1 skrll count++;
1834 1.1 skrll }
1835 1.1 skrll }
1836 1.1 skrll *(p - count) = IWI_CHAN_5GHZ | count;
1837 1.1 skrll
1838 1.1 skrll count = 0;
1839 1.1 skrll for (i = 0; i <= IEEE80211_CHAN_MAX; i++) {
1840 1.1 skrll if (IEEE80211_IS_CHAN_2GHZ(&ic->ic_channels[i]) &&
1841 1.1 skrll isset(ic->ic_chan_active, i)) {
1842 1.1 skrll *++p = i;
1843 1.1 skrll count++;
1844 1.1 skrll }
1845 1.1 skrll }
1846 1.1 skrll *(p - count) = IWI_CHAN_2GHZ | count;
1847 1.1 skrll
1848 1.1 skrll DPRINTF(("Start scanning\n"));
1849 1.1 skrll return iwi_cmd(sc, IWI_CMD_SCAN, &scan, sizeof scan, 1);
1850 1.1 skrll }
1851 1.1 skrll
1852 1.1 skrll static int
1853 1.1 skrll iwi_auth_and_assoc(struct iwi_softc *sc)
1854 1.1 skrll {
1855 1.1 skrll struct ieee80211com *ic = &sc->sc_ic;
1856 1.1 skrll struct ieee80211_node *ni = ic->ic_bss;
1857 1.1 skrll struct iwi_configuration config;
1858 1.1 skrll struct iwi_associate assoc;
1859 1.1 skrll struct iwi_rateset rs;
1860 1.1 skrll u_int32_t data;
1861 1.1 skrll int error;
1862 1.1 skrll
1863 1.1 skrll if (IEEE80211_IS_CHAN_2GHZ(ni->ni_chan)) {
1864 1.1 skrll /* enable b/g autodection */
1865 1.1 skrll memset(&config, 0, sizeof config);
1866 1.1 skrll config.bluetooth_coexistence = 1;
1867 1.1 skrll config.multicast_enabled = 1;
1868 1.1 skrll config.bg_autodetection = 1;
1869 1.1 skrll config.noise_reported = 1;
1870 1.1 skrll DPRINTF(("Configuring adapter\n"));
1871 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_CONFIGURATION, &config,
1872 1.1 skrll sizeof config, 1);
1873 1.1 skrll if (error != 0)
1874 1.1 skrll return error;
1875 1.1 skrll }
1876 1.1 skrll
1877 1.1 skrll #ifdef IWI_DEBUG
1878 1.1 skrll if (iwi_debug > 0) {
1879 1.1 skrll printf("Setting ESSID to ");
1880 1.1 skrll ieee80211_print_essid(ni->ni_essid, ni->ni_esslen);
1881 1.1 skrll printf("\n");
1882 1.1 skrll }
1883 1.1 skrll #endif
1884 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_ESSID, ni->ni_essid, ni->ni_esslen, 1);
1885 1.1 skrll if (error != 0)
1886 1.1 skrll return error;
1887 1.1 skrll
1888 1.1 skrll /* the rate set has already been "negociated" */
1889 1.1 skrll rs.mode = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? IWI_MODE_11A :
1890 1.1 skrll IWI_MODE_11G;
1891 1.1 skrll rs.type = IWI_RATESET_TYPE_NEGOCIATED;
1892 1.1 skrll rs.nrates = ni->ni_rates.rs_nrates;
1893 1.1 skrll memcpy(rs.rates, ni->ni_rates.rs_rates, rs.nrates);
1894 1.1 skrll DPRINTF(("Setting negociated rates (%u)\n", rs.nrates));
1895 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_RATES, &rs, sizeof rs, 1);
1896 1.1 skrll if (error != 0)
1897 1.1 skrll return error;
1898 1.1 skrll
1899 1.1 skrll data = htole32(ni->ni_rssi);
1900 1.1 skrll DPRINTF(("Setting sensitivity to %d\n", (int8_t)ni->ni_rssi));
1901 1.1 skrll error = iwi_cmd(sc, IWI_CMD_SET_SENSITIVITY, &data, sizeof data, 1);
1902 1.1 skrll if (error != 0)
1903 1.1 skrll return error;
1904 1.1 skrll
1905 1.1 skrll memset(&assoc, 0, sizeof assoc);
1906 1.1 skrll assoc.mode = IEEE80211_IS_CHAN_5GHZ(ni->ni_chan) ? IWI_MODE_11A :
1907 1.1 skrll IWI_MODE_11G;
1908 1.1 skrll assoc.chan = ieee80211_chan2ieee(ic, ni->ni_chan);
1909 1.1 skrll if (sc->authmode == IEEE80211_AUTH_SHARED)
1910 1.1 skrll assoc.auth = (ic->ic_wep_txkey << 4) | IWI_AUTH_SHARED;
1911 1.1 skrll memcpy(assoc.tstamp, ni->ni_tstamp, 8);
1912 1.1 skrll assoc.capinfo = htole16(ni->ni_capinfo);
1913 1.1 skrll assoc.lintval = htole16(ic->ic_lintval);
1914 1.1 skrll assoc.intval = htole16(ni->ni_intval);
1915 1.1 skrll IEEE80211_ADDR_COPY(assoc.bssid, ni->ni_bssid);
1916 1.1 skrll IEEE80211_ADDR_COPY(assoc.dst, ni->ni_bssid);
1917 1.1 skrll DPRINTF(("Trying to associate to %s channel %u auth %u\n",
1918 1.1 skrll ether_sprintf(assoc.bssid), assoc.chan, assoc.auth));
1919 1.1 skrll return iwi_cmd(sc, IWI_CMD_ASSOCIATE, &assoc, sizeof assoc, 1);
1920 1.1 skrll }
1921 1.1 skrll
1922 1.1 skrll static int
1923 1.1 skrll iwi_init(struct ifnet *ifp)
1924 1.1 skrll {
1925 1.1 skrll struct iwi_softc *sc = ifp->if_softc;
1926 1.1 skrll struct ieee80211com *ic = &sc->sc_ic;
1927 1.1 skrll struct iwi_firmware *fw = &sc->fw;
1928 1.1 skrll int i, error;
1929 1.1 skrll
1930 1.1 skrll /* exit immediately if firmware has not been ioctl'd */
1931 1.1 skrll if (!(sc->flags & IWI_FLAG_FW_CACHED)) {
1932 1.1 skrll ifp->if_flags &= ~IFF_UP;
1933 1.1 skrll return EIO;
1934 1.1 skrll }
1935 1.1 skrll
1936 1.1 skrll if ((error = iwi_reset(sc)) != 0) {
1937 1.1 skrll aprint_error("%s: could not reset adapter\n",
1938 1.1 skrll sc->sc_dev.dv_xname);
1939 1.1 skrll goto fail;
1940 1.1 skrll }
1941 1.1 skrll
1942 1.1 skrll if ((error = iwi_load_firmware(sc, fw->boot, fw->boot_size)) != 0) {
1943 1.1 skrll aprint_error("%s: could not load boot firmware\n",
1944 1.1 skrll sc->sc_dev.dv_xname);
1945 1.1 skrll goto fail;
1946 1.1 skrll }
1947 1.1 skrll
1948 1.1 skrll if ((error = iwi_load_ucode(sc, fw->ucode, fw->ucode_size)) != 0) {
1949 1.1 skrll aprint_error("%s: could not load microcode\n",
1950 1.1 skrll sc->sc_dev.dv_xname);
1951 1.1 skrll goto fail;
1952 1.1 skrll }
1953 1.1 skrll
1954 1.1 skrll iwi_stop_master(sc);
1955 1.1 skrll
1956 1.1 skrll sc->tx_cur = 0;
1957 1.1 skrll sc->tx_queued = 0;
1958 1.1 skrll sc->tx_old = IWI_TX_RING_SIZE - 1;
1959 1.1 skrll sc->cmd_cur = 0;
1960 1.1 skrll sc->rx_cur = IWI_RX_RING_SIZE - 1;
1961 1.1 skrll
1962 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_CMD_BASE, sc->cmd_ring_map->dm_segs[0].ds_addr);
1963 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_CMD_SIZE, IWI_CMD_RING_SIZE);
1964 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_CMD_READ_INDEX, 0);
1965 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_CMD_WRITE_INDEX, sc->cmd_cur);
1966 1.1 skrll
1967 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX1_BASE, sc->tx_ring_map->dm_segs[0].ds_addr);
1968 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX1_SIZE, IWI_TX_RING_SIZE);
1969 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX1_READ_INDEX, 0);
1970 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX1_WRITE_INDEX, sc->tx_cur);
1971 1.1 skrll
1972 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX2_BASE, sc->tx_ring_map->dm_segs[0].ds_addr);
1973 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX2_SIZE, IWI_TX_RING_SIZE);
1974 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX2_READ_INDEX, 0);
1975 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX2_WRITE_INDEX, 0);
1976 1.1 skrll
1977 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX3_BASE, sc->tx_ring_map->dm_segs[0].ds_addr);
1978 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX3_SIZE, IWI_TX_RING_SIZE);
1979 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX3_READ_INDEX, 0);
1980 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX3_WRITE_INDEX, 0);
1981 1.1 skrll
1982 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX4_BASE, sc->tx_ring_map->dm_segs[0].ds_addr);
1983 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX4_SIZE, IWI_TX_RING_SIZE);
1984 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX4_READ_INDEX, 0);
1985 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_TX4_WRITE_INDEX, 0);
1986 1.1 skrll
1987 1.1 skrll for (i = 0; i < IWI_RX_RING_SIZE; i++)
1988 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RX_BASE + i * 4,
1989 1.1 skrll sc->rx_buf[i].map->dm_segs[0].ds_addr);
1990 1.1 skrll
1991 1.1 skrll /*
1992 1.1 skrll * Kick Rx
1993 1.1 skrll */
1994 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RX_WRITE_INDEX, sc->rx_cur);
1995 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RX_READ_INDEX, 0);
1996 1.1 skrll
1997 1.1 skrll if ((error = iwi_load_firmware(sc, fw->main, fw->main_size)) != 0) {
1998 1.1 skrll aprint_error("%s: could not load main firmware\n",
1999 1.1 skrll sc->sc_dev.dv_xname);
2000 1.1 skrll goto fail;
2001 1.1 skrll }
2002 1.1 skrll
2003 1.1 skrll sc->flags |= IWI_FLAG_FW_INITED;
2004 1.1 skrll
2005 1.1 skrll if ((error = iwi_config(sc)) != 0) {
2006 1.1 skrll aprint_error("%s: device configuration failed\n",
2007 1.1 skrll sc->sc_dev.dv_xname);
2008 1.1 skrll goto fail;
2009 1.1 skrll }
2010 1.1 skrll
2011 1.1 skrll ieee80211_begin_scan(ic);
2012 1.1 skrll
2013 1.1 skrll ifp->if_flags &= ~IFF_OACTIVE;
2014 1.1 skrll ifp->if_flags |= IFF_RUNNING;
2015 1.1 skrll
2016 1.1 skrll return 0;
2017 1.1 skrll
2018 1.1 skrll fail: iwi_stop(ifp, 0);
2019 1.1 skrll
2020 1.1 skrll return error;
2021 1.1 skrll }
2022 1.1 skrll
2023 1.1 skrll static void
2024 1.1 skrll iwi_stop(struct ifnet *ifp, int disable)
2025 1.1 skrll {
2026 1.1 skrll struct iwi_softc *sc = ifp->if_softc;
2027 1.1 skrll struct ieee80211com *ic = &sc->sc_ic;
2028 1.1 skrll struct iwi_tx_buf *buf;
2029 1.1 skrll int i;
2030 1.1 skrll
2031 1.1 skrll iwi_stop_master(sc);
2032 1.1 skrll CSR_WRITE_4(sc, IWI_CSR_RST, IWI_RST_SW_RESET);
2033 1.1 skrll
2034 1.1 skrll /*
2035 1.1 skrll * Release Tx buffers
2036 1.1 skrll */
2037 1.1 skrll for (i = 0; i < IWI_TX_RING_SIZE; i++) {
2038 1.1 skrll buf = &sc->tx_buf[i];
2039 1.1 skrll
2040 1.1 skrll if (buf->m != NULL) {
2041 1.1 skrll bus_dmamap_unload(sc->sc_dmat, buf->map);
2042 1.1 skrll m_freem(buf->m);
2043 1.1 skrll buf->m = NULL;
2044 1.1 skrll
2045 1.1 skrll if (buf->ni != NULL) {
2046 1.1 skrll ieee80211_release_node(ic, buf->ni);
2047 1.1 skrll buf->ni = NULL;
2048 1.1 skrll }
2049 1.1 skrll }
2050 1.1 skrll }
2051 1.1 skrll
2052 1.1 skrll ifp->if_timer = 0;
2053 1.1 skrll ifp->if_flags &= ~(IFF_RUNNING | IFF_OACTIVE);
2054 1.1 skrll
2055 1.1 skrll ieee80211_new_state(ic, IEEE80211_S_INIT, -1);
2056 1.1 skrll }
2057