ixgbe_vf.c revision 1.3 1 1.1 dyoung /******************************************************************************
2 1.1 dyoung
3 1.2 msaitoh Copyright (c) 2001-2012, Intel Corporation
4 1.1 dyoung All rights reserved.
5 1.1 dyoung
6 1.1 dyoung Redistribution and use in source and binary forms, with or without
7 1.1 dyoung modification, are permitted provided that the following conditions are met:
8 1.1 dyoung
9 1.1 dyoung 1. Redistributions of source code must retain the above copyright notice,
10 1.1 dyoung this list of conditions and the following disclaimer.
11 1.1 dyoung
12 1.1 dyoung 2. Redistributions in binary form must reproduce the above copyright
13 1.1 dyoung notice, this list of conditions and the following disclaimer in the
14 1.1 dyoung documentation and/or other materials provided with the distribution.
15 1.1 dyoung
16 1.1 dyoung 3. Neither the name of the Intel Corporation nor the names of its
17 1.1 dyoung contributors may be used to endorse or promote products derived from
18 1.1 dyoung this software without specific prior written permission.
19 1.1 dyoung
20 1.1 dyoung THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 1.1 dyoung AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 1.1 dyoung IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 1.1 dyoung ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 1.1 dyoung LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 1.1 dyoung CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 1.1 dyoung SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 1.1 dyoung INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 1.1 dyoung CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 1.1 dyoung ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 1.1 dyoung POSSIBILITY OF SUCH DAMAGE.
31 1.1 dyoung
32 1.1 dyoung ******************************************************************************/
33 1.3 msaitoh /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_vf.c 238149 2012-07-05 20:51:44Z jfv $*/
34 1.2 msaitoh /*$NetBSD: ixgbe_vf.c,v 1.3 2015/04/02 09:26:55 msaitoh Exp $*/
35 1.1 dyoung
36 1.1 dyoung
37 1.1 dyoung #include "ixgbe_api.h"
38 1.1 dyoung #include "ixgbe_type.h"
39 1.1 dyoung #include "ixgbe_vf.h"
40 1.1 dyoung
41 1.1 dyoung #ifndef IXGBE_VFWRITE_REG
42 1.1 dyoung #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
43 1.1 dyoung #endif
44 1.1 dyoung #ifndef IXGBE_VFREAD_REG
45 1.1 dyoung #define IXGBE_VFREAD_REG IXGBE_READ_REG
46 1.1 dyoung #endif
47 1.1 dyoung
48 1.1 dyoung /**
49 1.1 dyoung * ixgbe_init_ops_vf - Initialize the pointers for vf
50 1.1 dyoung * @hw: pointer to hardware structure
51 1.1 dyoung *
52 1.1 dyoung * This will assign function pointers, adapter-specific functions can
53 1.1 dyoung * override the assignment of generic function pointers by assigning
54 1.1 dyoung * their own adapter-specific function pointers.
55 1.1 dyoung * Does not touch the hardware.
56 1.1 dyoung **/
57 1.1 dyoung s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
58 1.1 dyoung {
59 1.1 dyoung /* MAC */
60 1.1 dyoung hw->mac.ops.init_hw = ixgbe_init_hw_vf;
61 1.1 dyoung hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
62 1.1 dyoung hw->mac.ops.start_hw = ixgbe_start_hw_vf;
63 1.1 dyoung /* Cannot clear stats on VF */
64 1.1 dyoung hw->mac.ops.clear_hw_cntrs = NULL;
65 1.1 dyoung hw->mac.ops.get_media_type = NULL;
66 1.1 dyoung hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
67 1.2 msaitoh hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
68 1.1 dyoung hw->mac.ops.get_bus_info = NULL;
69 1.1 dyoung
70 1.1 dyoung /* Link */
71 1.1 dyoung hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
72 1.1 dyoung hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
73 1.1 dyoung hw->mac.ops.get_link_capabilities = NULL;
74 1.1 dyoung
75 1.1 dyoung /* RAR, Multicast, VLAN */
76 1.1 dyoung hw->mac.ops.set_rar = ixgbe_set_rar_vf;
77 1.2 msaitoh hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
78 1.1 dyoung hw->mac.ops.init_rx_addrs = NULL;
79 1.1 dyoung hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
80 1.1 dyoung hw->mac.ops.enable_mc = NULL;
81 1.1 dyoung hw->mac.ops.disable_mc = NULL;
82 1.1 dyoung hw->mac.ops.clear_vfta = NULL;
83 1.1 dyoung hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
84 1.1 dyoung
85 1.1 dyoung hw->mac.max_tx_queues = 1;
86 1.1 dyoung hw->mac.max_rx_queues = 1;
87 1.1 dyoung
88 1.1 dyoung hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
89 1.1 dyoung
90 1.1 dyoung return IXGBE_SUCCESS;
91 1.1 dyoung }
92 1.1 dyoung
93 1.1 dyoung /**
94 1.1 dyoung * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
95 1.1 dyoung * @hw: pointer to hardware structure
96 1.1 dyoung *
97 1.1 dyoung * Starts the hardware by filling the bus info structure and media type, clears
98 1.1 dyoung * all on chip counters, initializes receive address registers, multicast
99 1.1 dyoung * table, VLAN filter table, calls routine to set up link and flow control
100 1.1 dyoung * settings, and leaves transmit and receive units disabled and uninitialized
101 1.1 dyoung **/
102 1.1 dyoung s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
103 1.1 dyoung {
104 1.1 dyoung /* Clear adapter stopped flag */
105 1.1 dyoung hw->adapter_stopped = FALSE;
106 1.1 dyoung
107 1.1 dyoung return IXGBE_SUCCESS;
108 1.1 dyoung }
109 1.1 dyoung
110 1.1 dyoung /**
111 1.1 dyoung * ixgbe_init_hw_vf - virtual function hardware initialization
112 1.1 dyoung * @hw: pointer to hardware structure
113 1.1 dyoung *
114 1.1 dyoung * Initialize the hardware by resetting the hardware and then starting
115 1.1 dyoung * the hardware
116 1.1 dyoung **/
117 1.1 dyoung s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
118 1.1 dyoung {
119 1.1 dyoung s32 status = hw->mac.ops.start_hw(hw);
120 1.1 dyoung
121 1.1 dyoung hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
122 1.1 dyoung
123 1.1 dyoung return status;
124 1.1 dyoung }
125 1.1 dyoung
126 1.1 dyoung /**
127 1.1 dyoung * ixgbe_reset_hw_vf - Performs hardware reset
128 1.1 dyoung * @hw: pointer to hardware structure
129 1.1 dyoung *
130 1.1 dyoung * Resets the hardware by reseting the transmit and receive units, masks and
131 1.1 dyoung * clears all interrupts.
132 1.1 dyoung **/
133 1.1 dyoung s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
134 1.1 dyoung {
135 1.1 dyoung struct ixgbe_mbx_info *mbx = &hw->mbx;
136 1.1 dyoung u32 timeout = IXGBE_VF_INIT_TIMEOUT;
137 1.1 dyoung s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
138 1.1 dyoung u32 ctrl, msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
139 1.1 dyoung u8 *addr = (u8 *)(&msgbuf[1]);
140 1.1 dyoung
141 1.1 dyoung DEBUGFUNC("ixgbevf_reset_hw_vf");
142 1.1 dyoung
143 1.1 dyoung /* Call adapter stop to disable tx/rx and clear interrupts */
144 1.1 dyoung hw->mac.ops.stop_adapter(hw);
145 1.1 dyoung
146 1.1 dyoung DEBUGOUT("Issuing a function level reset to MAC\n");
147 1.1 dyoung
148 1.2 msaitoh ctrl = IXGBE_VFREAD_REG(hw, IXGBE_VFCTRL) | IXGBE_CTRL_RST;
149 1.2 msaitoh IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, ctrl);
150 1.2 msaitoh IXGBE_WRITE_FLUSH(hw);
151 1.2 msaitoh
152 1.2 msaitoh msec_delay(50);
153 1.1 dyoung
154 1.1 dyoung /* we cannot reset while the RSTI / RSTD bits are asserted */
155 1.1 dyoung while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
156 1.1 dyoung timeout--;
157 1.1 dyoung usec_delay(5);
158 1.1 dyoung }
159 1.1 dyoung
160 1.1 dyoung if (timeout) {
161 1.1 dyoung /* mailbox timeout can now become active */
162 1.1 dyoung mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
163 1.1 dyoung
164 1.1 dyoung msgbuf[0] = IXGBE_VF_RESET;
165 1.1 dyoung mbx->ops.write_posted(hw, msgbuf, 1, 0);
166 1.1 dyoung
167 1.1 dyoung msec_delay(10);
168 1.1 dyoung
169 1.2 msaitoh /*
170 1.2 msaitoh * set our "perm_addr" based on info provided by PF
171 1.2 msaitoh * also set up the mc_filter_type which is piggy backed
172 1.2 msaitoh * on the mac address in word 3
173 1.2 msaitoh */
174 1.1 dyoung ret_val = mbx->ops.read_posted(hw, msgbuf,
175 1.1 dyoung IXGBE_VF_PERMADDR_MSG_LEN, 0);
176 1.1 dyoung if (!ret_val) {
177 1.1 dyoung if (msgbuf[0] == (IXGBE_VF_RESET |
178 1.1 dyoung IXGBE_VT_MSGTYPE_ACK)) {
179 1.1 dyoung memcpy(hw->mac.perm_addr, addr,
180 1.1 dyoung IXGBE_ETH_LENGTH_OF_ADDRESS);
181 1.1 dyoung hw->mac.mc_filter_type =
182 1.1 dyoung msgbuf[IXGBE_VF_MC_TYPE_WORD];
183 1.1 dyoung } else {
184 1.1 dyoung ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
185 1.1 dyoung }
186 1.1 dyoung }
187 1.1 dyoung }
188 1.1 dyoung
189 1.1 dyoung return ret_val;
190 1.1 dyoung }
191 1.1 dyoung
192 1.1 dyoung /**
193 1.2 msaitoh * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
194 1.1 dyoung * @hw: pointer to hardware structure
195 1.1 dyoung *
196 1.1 dyoung * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
197 1.1 dyoung * disables transmit and receive units. The adapter_stopped flag is used by
198 1.1 dyoung * the shared code and drivers to determine if the adapter is in a stopped
199 1.1 dyoung * state and should not touch the hardware.
200 1.1 dyoung **/
201 1.2 msaitoh s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
202 1.1 dyoung {
203 1.1 dyoung u32 reg_val;
204 1.1 dyoung u16 i;
205 1.1 dyoung
206 1.1 dyoung /*
207 1.1 dyoung * Set the adapter_stopped flag so other driver functions stop touching
208 1.1 dyoung * the hardware
209 1.1 dyoung */
210 1.1 dyoung hw->adapter_stopped = TRUE;
211 1.1 dyoung
212 1.1 dyoung /* Clear interrupt mask to stop from interrupts being generated */
213 1.1 dyoung IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
214 1.1 dyoung
215 1.2 msaitoh /* Clear any pending interrupts, flush previous writes */
216 1.1 dyoung IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
217 1.1 dyoung
218 1.1 dyoung /* Disable the transmit unit. Each queue must be disabled. */
219 1.2 msaitoh for (i = 0; i < hw->mac.max_tx_queues; i++)
220 1.2 msaitoh IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
221 1.2 msaitoh
222 1.2 msaitoh /* Disable the receive unit by stopping each queue */
223 1.2 msaitoh for (i = 0; i < hw->mac.max_rx_queues; i++) {
224 1.2 msaitoh reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
225 1.2 msaitoh reg_val &= ~IXGBE_RXDCTL_ENABLE;
226 1.2 msaitoh IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
227 1.1 dyoung }
228 1.1 dyoung
229 1.2 msaitoh /* flush all queues disables */
230 1.2 msaitoh IXGBE_WRITE_FLUSH(hw);
231 1.2 msaitoh msec_delay(2);
232 1.2 msaitoh
233 1.1 dyoung return IXGBE_SUCCESS;
234 1.1 dyoung }
235 1.1 dyoung
236 1.1 dyoung /**
237 1.1 dyoung * ixgbe_mta_vector - Determines bit-vector in multicast table to set
238 1.1 dyoung * @hw: pointer to hardware structure
239 1.1 dyoung * @mc_addr: the multicast address
240 1.1 dyoung *
241 1.1 dyoung * Extracts the 12 bits, from a multicast address, to determine which
242 1.1 dyoung * bit-vector to set in the multicast table. The hardware uses 12 bits, from
243 1.1 dyoung * incoming rx multicast addresses, to determine the bit-vector to check in
244 1.1 dyoung * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
245 1.1 dyoung * by the MO field of the MCSTCTRL. The MO field is set during initialization
246 1.1 dyoung * to mc_filter_type.
247 1.1 dyoung **/
248 1.1 dyoung static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
249 1.1 dyoung {
250 1.1 dyoung u32 vector = 0;
251 1.1 dyoung
252 1.1 dyoung switch (hw->mac.mc_filter_type) {
253 1.1 dyoung case 0: /* use bits [47:36] of the address */
254 1.1 dyoung vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
255 1.1 dyoung break;
256 1.1 dyoung case 1: /* use bits [46:35] of the address */
257 1.1 dyoung vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
258 1.1 dyoung break;
259 1.1 dyoung case 2: /* use bits [45:34] of the address */
260 1.1 dyoung vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
261 1.1 dyoung break;
262 1.1 dyoung case 3: /* use bits [43:32] of the address */
263 1.1 dyoung vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
264 1.1 dyoung break;
265 1.1 dyoung default: /* Invalid mc_filter_type */
266 1.1 dyoung DEBUGOUT("MC filter type param set incorrectly\n");
267 1.1 dyoung ASSERT(0);
268 1.1 dyoung break;
269 1.1 dyoung }
270 1.1 dyoung
271 1.1 dyoung /* vector can only be 12-bits or boundary will be exceeded */
272 1.1 dyoung vector &= 0xFFF;
273 1.1 dyoung return vector;
274 1.1 dyoung }
275 1.1 dyoung
276 1.1 dyoung /**
277 1.1 dyoung * ixgbe_set_rar_vf - set device MAC address
278 1.1 dyoung * @hw: pointer to hardware structure
279 1.1 dyoung * @index: Receive address register to write
280 1.1 dyoung * @addr: Address to put into receive address register
281 1.1 dyoung * @vmdq: VMDq "set" or "pool" index
282 1.1 dyoung * @enable_addr: set flag that address is active
283 1.1 dyoung **/
284 1.1 dyoung s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
285 1.2 msaitoh u32 enable_addr)
286 1.1 dyoung {
287 1.1 dyoung struct ixgbe_mbx_info *mbx = &hw->mbx;
288 1.1 dyoung u32 msgbuf[3];
289 1.1 dyoung u8 *msg_addr = (u8 *)(&msgbuf[1]);
290 1.1 dyoung s32 ret_val;
291 1.2 msaitoh UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
292 1.1 dyoung
293 1.1 dyoung memset(msgbuf, 0, 12);
294 1.1 dyoung msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
295 1.1 dyoung memcpy(msg_addr, addr, 6);
296 1.1 dyoung ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
297 1.1 dyoung
298 1.1 dyoung if (!ret_val)
299 1.1 dyoung ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
300 1.1 dyoung
301 1.1 dyoung msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
302 1.1 dyoung
303 1.1 dyoung /* if nacked the address was rejected, use "perm_addr" */
304 1.1 dyoung if (!ret_val &&
305 1.1 dyoung (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
306 1.1 dyoung ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
307 1.1 dyoung
308 1.1 dyoung return ret_val;
309 1.1 dyoung }
310 1.1 dyoung
311 1.1 dyoung /**
312 1.1 dyoung * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
313 1.1 dyoung * @hw: pointer to the HW structure
314 1.1 dyoung * @mc_addr_list: array of multicast addresses to program
315 1.1 dyoung * @mc_addr_count: number of multicast addresses to program
316 1.1 dyoung * @next: caller supplied function to return next address in list
317 1.1 dyoung *
318 1.1 dyoung * Updates the Multicast Table Array.
319 1.1 dyoung **/
320 1.1 dyoung s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
321 1.2 msaitoh u32 mc_addr_count, ixgbe_mc_addr_itr next,
322 1.2 msaitoh bool clear)
323 1.1 dyoung {
324 1.1 dyoung struct ixgbe_mbx_info *mbx = &hw->mbx;
325 1.1 dyoung u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
326 1.1 dyoung u16 *vector_list = (u16 *)&msgbuf[1];
327 1.1 dyoung u32 vector;
328 1.1 dyoung u32 cnt, i;
329 1.1 dyoung u32 vmdq;
330 1.1 dyoung
331 1.2 msaitoh UNREFERENCED_1PARAMETER(clear);
332 1.2 msaitoh
333 1.1 dyoung DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
334 1.1 dyoung
335 1.1 dyoung /* Each entry in the list uses 1 16 bit word. We have 30
336 1.1 dyoung * 16 bit words available in our HW msg buffer (minus 1 for the
337 1.1 dyoung * msg type). That's 30 hash values if we pack 'em right. If
338 1.1 dyoung * there are more than 30 MC addresses to add then punt the
339 1.1 dyoung * extras for now and then add code to handle more than 30 later.
340 1.1 dyoung * It would be unusual for a server to request that many multi-cast
341 1.1 dyoung * addresses except for in large enterprise network environments.
342 1.1 dyoung */
343 1.1 dyoung
344 1.1 dyoung DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
345 1.1 dyoung
346 1.1 dyoung cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
347 1.1 dyoung msgbuf[0] = IXGBE_VF_SET_MULTICAST;
348 1.1 dyoung msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
349 1.1 dyoung
350 1.1 dyoung for (i = 0; i < cnt; i++) {
351 1.1 dyoung vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
352 1.1 dyoung DEBUGOUT1("Hash value = 0x%03X\n", vector);
353 1.1 dyoung vector_list[i] = (u16)vector;
354 1.1 dyoung }
355 1.1 dyoung
356 1.1 dyoung return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0);
357 1.1 dyoung }
358 1.1 dyoung
359 1.1 dyoung /**
360 1.1 dyoung * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
361 1.1 dyoung * @hw: pointer to the HW structure
362 1.1 dyoung * @vlan: 12 bit VLAN ID
363 1.1 dyoung * @vind: unused by VF drivers
364 1.1 dyoung * @vlan_on: if TRUE then set bit, else clear bit
365 1.1 dyoung **/
366 1.1 dyoung s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
367 1.1 dyoung {
368 1.1 dyoung struct ixgbe_mbx_info *mbx = &hw->mbx;
369 1.1 dyoung u32 msgbuf[2];
370 1.3 msaitoh s32 ret_val;
371 1.2 msaitoh UNREFERENCED_1PARAMETER(vind);
372 1.1 dyoung
373 1.1 dyoung msgbuf[0] = IXGBE_VF_SET_VLAN;
374 1.1 dyoung msgbuf[1] = vlan;
375 1.1 dyoung /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
376 1.1 dyoung msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
377 1.1 dyoung
378 1.3 msaitoh ret_val = mbx->ops.write_posted(hw, msgbuf, 2, 0);
379 1.3 msaitoh if (!ret_val)
380 1.3 msaitoh ret_val = mbx->ops.read_posted(hw, msgbuf, 1, 0);
381 1.3 msaitoh
382 1.3 msaitoh if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK))
383 1.3 msaitoh return IXGBE_SUCCESS;
384 1.3 msaitoh
385 1.3 msaitoh return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK);
386 1.1 dyoung }
387 1.1 dyoung
388 1.1 dyoung /**
389 1.1 dyoung * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
390 1.1 dyoung * @hw: pointer to hardware structure
391 1.1 dyoung *
392 1.1 dyoung * Returns the number of transmit queues for the given adapter.
393 1.1 dyoung **/
394 1.1 dyoung u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
395 1.1 dyoung {
396 1.2 msaitoh UNREFERENCED_1PARAMETER(hw);
397 1.1 dyoung return IXGBE_VF_MAX_TX_QUEUES;
398 1.1 dyoung }
399 1.1 dyoung
400 1.1 dyoung /**
401 1.1 dyoung * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
402 1.1 dyoung * @hw: pointer to hardware structure
403 1.1 dyoung *
404 1.1 dyoung * Returns the number of receive queues for the given adapter.
405 1.1 dyoung **/
406 1.1 dyoung u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
407 1.1 dyoung {
408 1.2 msaitoh UNREFERENCED_1PARAMETER(hw);
409 1.1 dyoung return IXGBE_VF_MAX_RX_QUEUES;
410 1.1 dyoung }
411 1.1 dyoung
412 1.1 dyoung /**
413 1.1 dyoung * ixgbe_get_mac_addr_vf - Read device MAC address
414 1.1 dyoung * @hw: pointer to the HW structure
415 1.1 dyoung **/
416 1.1 dyoung s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
417 1.1 dyoung {
418 1.1 dyoung int i;
419 1.1 dyoung
420 1.1 dyoung for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
421 1.1 dyoung mac_addr[i] = hw->mac.perm_addr[i];
422 1.1 dyoung
423 1.1 dyoung return IXGBE_SUCCESS;
424 1.1 dyoung }
425 1.1 dyoung
426 1.2 msaitoh s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
427 1.2 msaitoh {
428 1.2 msaitoh struct ixgbe_mbx_info *mbx = &hw->mbx;
429 1.2 msaitoh u32 msgbuf[3];
430 1.2 msaitoh u8 *msg_addr = (u8 *)(&msgbuf[1]);
431 1.2 msaitoh s32 ret_val;
432 1.2 msaitoh
433 1.2 msaitoh memset(msgbuf, 0, sizeof(msgbuf));
434 1.2 msaitoh /*
435 1.2 msaitoh * If index is one then this is the start of a new list and needs
436 1.2 msaitoh * indication to the PF so it can do it's own list management.
437 1.2 msaitoh * If it is zero then that tells the PF to just clear all of
438 1.2 msaitoh * this VF's macvlans and there is no new list.
439 1.2 msaitoh */
440 1.2 msaitoh msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
441 1.2 msaitoh msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
442 1.2 msaitoh if (addr)
443 1.2 msaitoh memcpy(msg_addr, addr, 6);
444 1.2 msaitoh ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
445 1.2 msaitoh
446 1.2 msaitoh if (!ret_val)
447 1.2 msaitoh ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
448 1.2 msaitoh
449 1.2 msaitoh msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
450 1.2 msaitoh
451 1.2 msaitoh if (!ret_val)
452 1.2 msaitoh if (msgbuf[0] == (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
453 1.2 msaitoh ret_val = IXGBE_ERR_OUT_OF_MEM;
454 1.2 msaitoh
455 1.2 msaitoh return ret_val;
456 1.2 msaitoh }
457 1.2 msaitoh
458 1.1 dyoung /**
459 1.1 dyoung * ixgbe_setup_mac_link_vf - Setup MAC link settings
460 1.1 dyoung * @hw: pointer to hardware structure
461 1.1 dyoung * @speed: new link speed
462 1.1 dyoung * @autoneg: TRUE if autonegotiation enabled
463 1.1 dyoung * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
464 1.1 dyoung *
465 1.1 dyoung * Set the link speed in the AUTOC register and restarts link.
466 1.1 dyoung **/
467 1.1 dyoung s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw,
468 1.2 msaitoh ixgbe_link_speed speed, bool autoneg,
469 1.2 msaitoh bool autoneg_wait_to_complete)
470 1.1 dyoung {
471 1.2 msaitoh UNREFERENCED_4PARAMETER(hw, speed, autoneg, autoneg_wait_to_complete);
472 1.1 dyoung return IXGBE_SUCCESS;
473 1.1 dyoung }
474 1.1 dyoung
475 1.1 dyoung /**
476 1.1 dyoung * ixgbe_check_mac_link_vf - Get link/speed status
477 1.1 dyoung * @hw: pointer to hardware structure
478 1.1 dyoung * @speed: pointer to link speed
479 1.1 dyoung * @link_up: TRUE is link is up, FALSE otherwise
480 1.1 dyoung * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
481 1.1 dyoung *
482 1.1 dyoung * Reads the links register to determine if link is up and the current speed
483 1.1 dyoung **/
484 1.1 dyoung s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
485 1.2 msaitoh bool *link_up, bool autoneg_wait_to_complete)
486 1.1 dyoung {
487 1.1 dyoung u32 links_reg;
488 1.2 msaitoh UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
489 1.1 dyoung
490 1.1 dyoung if (!(hw->mbx.ops.check_for_rst(hw, 0))) {
491 1.1 dyoung *link_up = FALSE;
492 1.1 dyoung *speed = 0;
493 1.1 dyoung return -1;
494 1.1 dyoung }
495 1.1 dyoung
496 1.1 dyoung links_reg = IXGBE_VFREAD_REG(hw, IXGBE_VFLINKS);
497 1.1 dyoung
498 1.1 dyoung if (links_reg & IXGBE_LINKS_UP)
499 1.1 dyoung *link_up = TRUE;
500 1.1 dyoung else
501 1.1 dyoung *link_up = FALSE;
502 1.1 dyoung
503 1.3 msaitoh switch (links_reg & IXGBE_LINKS_SPEED_10G_82599) {
504 1.3 msaitoh case IXGBE_LINKS_SPEED_10G_82599:
505 1.1 dyoung *speed = IXGBE_LINK_SPEED_10GB_FULL;
506 1.3 msaitoh break;
507 1.3 msaitoh case IXGBE_LINKS_SPEED_1G_82599:
508 1.1 dyoung *speed = IXGBE_LINK_SPEED_1GB_FULL;
509 1.3 msaitoh break;
510 1.3 msaitoh case IXGBE_LINKS_SPEED_100_82599:
511 1.3 msaitoh *speed = IXGBE_LINK_SPEED_100_FULL;
512 1.3 msaitoh break;
513 1.3 msaitoh }
514 1.1 dyoung
515 1.1 dyoung return IXGBE_SUCCESS;
516 1.1 dyoung }
517 1.1 dyoung
518