ixgbe_vf.c revision 1.24.2.2 1 /* $NetBSD: ixgbe_vf.c,v 1.24.2.2 2021/04/03 22:28:49 thorpej Exp $ */
2
3 /******************************************************************************
4 SPDX-License-Identifier: BSD-3-Clause
5
6 Copyright (c) 2001-2017, Intel Corporation
7 All rights reserved.
8
9 Redistribution and use in source and binary forms, with or without
10 modification, are permitted provided that the following conditions are met:
11
12 1. Redistributions of source code must retain the above copyright notice,
13 this list of conditions and the following disclaimer.
14
15 2. Redistributions in binary form must reproduce the above copyright
16 notice, this list of conditions and the following disclaimer in the
17 documentation and/or other materials provided with the distribution.
18
19 3. Neither the name of the Intel Corporation nor the names of its
20 contributors may be used to endorse or promote products derived from
21 this software without specific prior written permission.
22
23 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
24 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
27 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
28 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
29 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
30 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
31 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
32 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
33 POSSIBILITY OF SUCH DAMAGE.
34
35 ******************************************************************************/
36 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_vf.c 331224 2018-03-19 20:55:05Z erj $*/
37
38
39 #include "ixgbe_api.h"
40 #include "ixgbe_type.h"
41 #include "ixgbe_vf.h"
42
43 #ifndef IXGBE_VFWRITE_REG
44 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
45 #endif
46 #ifndef IXGBE_VFREAD_REG
47 #define IXGBE_VFREAD_REG IXGBE_READ_REG
48 #endif
49
50 /**
51 * ixgbe_init_ops_vf - Initialize the pointers for vf
52 * @hw: pointer to hardware structure
53 *
54 * This will assign function pointers, adapter-specific functions can
55 * override the assignment of generic function pointers by assigning
56 * their own adapter-specific function pointers.
57 * Does not touch the hardware.
58 **/
59 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
60 {
61 /* MAC */
62 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
63 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
64 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
65 /* Cannot clear stats on VF */
66 hw->mac.ops.clear_hw_cntrs = NULL;
67 hw->mac.ops.get_media_type = NULL;
68 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
69 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
70 hw->mac.ops.get_bus_info = NULL;
71 hw->mac.ops.negotiate_api_version = ixgbevf_negotiate_api_version;
72
73 /* Link */
74 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
75 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
76 hw->mac.ops.get_link_capabilities = NULL;
77
78 /* RAR, Multicast, VLAN */
79 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
80 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
81 hw->mac.ops.init_rx_addrs = NULL;
82 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
83 hw->mac.ops.update_xcast_mode = ixgbevf_update_xcast_mode;
84 hw->mac.ops.enable_mc = NULL;
85 hw->mac.ops.disable_mc = NULL;
86 hw->mac.ops.clear_vfta = NULL;
87 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
88 hw->mac.ops.set_rlpml = ixgbevf_rlpml_set_vf;
89
90 hw->mac.max_tx_queues = 1;
91 hw->mac.max_rx_queues = 1;
92
93 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
94
95 return IXGBE_SUCCESS;
96 }
97
98 /* ixgbe_virt_clr_reg - Set register to default (power on) state.
99 * @hw: pointer to hardware structure
100 */
101 static void ixgbe_virt_clr_reg(struct ixgbe_hw *hw)
102 {
103 int i;
104 u32 vfsrrctl;
105 u32 vfdca_rxctrl;
106 u32 vfdca_txctrl;
107
108 /* VRSRRCTL default values (BSIZEPACKET = 2048, BSIZEHEADER = 256) */
109 vfsrrctl = 0x100 << IXGBE_SRRCTL_BSIZEHDRSIZE_SHIFT;
110 vfsrrctl |= 0x800 >> IXGBE_SRRCTL_BSIZEPKT_SHIFT;
111
112 /* DCA_RXCTRL default value */
113 vfdca_rxctrl = IXGBE_DCA_RXCTRL_DESC_RRO_EN |
114 IXGBE_DCA_RXCTRL_DATA_WRO_EN |
115 IXGBE_DCA_RXCTRL_HEAD_WRO_EN;
116
117 /* DCA_TXCTRL default value */
118 vfdca_txctrl = IXGBE_DCA_TXCTRL_DESC_RRO_EN |
119 IXGBE_DCA_TXCTRL_DESC_WRO_EN |
120 IXGBE_DCA_TXCTRL_DATA_RRO_EN;
121
122 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
123
124 KASSERT(IXGBE_VF_MAX_TX_QUEUES == IXGBE_VF_MAX_RX_QUEUES);
125 for (i = 0; i < IXGBE_VF_MAX_TX_QUEUES; i++) {
126 IXGBE_WRITE_REG(hw, IXGBE_VFRDH(i), 0);
127 IXGBE_WRITE_REG(hw, IXGBE_VFRDT(i), 0);
128 IXGBE_WRITE_REG(hw, IXGBE_VFRXDCTL(i), 0);
129 IXGBE_WRITE_REG(hw, IXGBE_VFSRRCTL(i), vfsrrctl);
130 IXGBE_WRITE_REG(hw, IXGBE_VFTDH(i), 0);
131 IXGBE_WRITE_REG(hw, IXGBE_VFTDT(i), 0);
132 IXGBE_WRITE_REG(hw, IXGBE_VFTXDCTL(i), 0);
133 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAH(i), 0);
134 IXGBE_WRITE_REG(hw, IXGBE_VFTDWBAL(i), 0);
135 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_RXCTRL(i), vfdca_rxctrl);
136 IXGBE_WRITE_REG(hw, IXGBE_VFDCA_TXCTRL(i), vfdca_txctrl);
137 }
138
139 IXGBE_WRITE_FLUSH(hw);
140 }
141
142 /**
143 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
144 * @hw: pointer to hardware structure
145 *
146 * Starts the hardware by filling the bus info structure and media type, clears
147 * all on chip counters, initializes receive address registers, multicast
148 * table, VLAN filter table, calls routine to set up link and flow control
149 * settings, and leaves transmit and receive units disabled and uninitialized
150 **/
151 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
152 {
153 /* Clear adapter stopped flag */
154 hw->adapter_stopped = FALSE;
155
156 return IXGBE_SUCCESS;
157 }
158
159 /**
160 * ixgbe_init_hw_vf - virtual function hardware initialization
161 * @hw: pointer to hardware structure
162 *
163 * Initialize the hardware by resetting the hardware and then starting
164 * the hardware
165 **/
166 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
167 {
168 s32 status = hw->mac.ops.start_hw(hw);
169
170 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
171
172 return status;
173 }
174
175 /**
176 * ixgbe_reset_hw_vf - Performs hardware reset
177 * @hw: pointer to hardware structure
178 *
179 * Resets the hardware by resetting the transmit and receive units, masks and
180 * clears all interrupts.
181 **/
182 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
183 {
184 struct ixgbe_mbx_info *mbx = &hw->mbx;
185 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
186 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
187 u32 msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
188 u8 *addr = (u8 *)(&msgbuf[1]);
189
190 DEBUGFUNC("ixgbevf_reset_hw_vf");
191
192 /* Call adapter stop to disable tx/rx and clear interrupts */
193 hw->mac.ops.stop_adapter(hw);
194
195 /* reset the api version */
196 hw->api_version = ixgbe_mbox_api_10;
197
198 DEBUGOUT("Issuing a function level reset to MAC\n");
199
200 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, IXGBE_CTRL_RST);
201 IXGBE_WRITE_FLUSH(hw);
202
203 msec_delay(50);
204
205 /* we cannot reset while the RSTI / RSTD bits are asserted */
206 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
207 timeout--;
208 usec_delay(5);
209 }
210
211 if (!timeout)
212 return IXGBE_ERR_RESET_FAILED;
213
214 /* Reset VF registers to initial values */
215 ixgbe_virt_clr_reg(hw);
216
217 /* mailbox timeout can now become active */
218 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
219
220 msgbuf[0] = IXGBE_VF_RESET;
221 mbx->ops.write_posted(hw, msgbuf, 1, 0);
222
223 msec_delay(10);
224
225 /*
226 * set our "perm_addr" based on info provided by PF
227 * also set up the mc_filter_type which is piggy backed
228 * on the mac address in word 3
229 */
230 ret_val = mbx->ops.read_posted(hw, msgbuf,
231 IXGBE_VF_PERMADDR_MSG_LEN, 0);
232 if (ret_val)
233 return ret_val;
234
235 if (msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK) &&
236 msgbuf[0] != (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_NACK))
237 return IXGBE_ERR_INVALID_MAC_ADDR;
238
239 if (msgbuf[0] == (IXGBE_VF_RESET | IXGBE_VT_MSGTYPE_ACK))
240 memcpy(hw->mac.perm_addr, addr, IXGBE_ETH_LENGTH_OF_ADDRESS);
241
242 hw->mac.mc_filter_type = msgbuf[IXGBE_VF_MC_TYPE_WORD];
243
244 return ret_val;
245 }
246
247 /**
248 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
249 * @hw: pointer to hardware structure
250 *
251 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
252 * disables transmit and receive units. The adapter_stopped flag is used by
253 * the shared code and drivers to determine if the adapter is in a stopped
254 * state and should not touch the hardware.
255 **/
256 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
257 {
258 u32 reg_val;
259 u16 i;
260
261 /*
262 * Set the adapter_stopped flag so other driver functions stop touching
263 * the hardware
264 */
265 hw->adapter_stopped = TRUE;
266
267 /* Clear interrupt mask to stop from interrupts being generated */
268 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
269
270 /* Clear any pending interrupts, flush previous writes */
271 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
272
273 /* Disable the transmit unit. Each queue must be disabled. */
274 for (i = 0; i < hw->mac.max_tx_queues; i++)
275 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
276
277 /* Disable the receive unit by stopping each queue */
278 for (i = 0; i < hw->mac.max_rx_queues; i++) {
279 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
280 reg_val &= ~IXGBE_RXDCTL_ENABLE;
281 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
282 }
283 /* Clear packet split and pool config */
284 IXGBE_WRITE_REG(hw, IXGBE_VFPSRTYPE, 0);
285
286 /* flush all queues disables */
287 IXGBE_WRITE_FLUSH(hw);
288 msec_delay(2);
289
290 return IXGBE_SUCCESS;
291 }
292
293 /**
294 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
295 * @hw: pointer to hardware structure
296 * @mc_addr: the multicast address
297 *
298 * Extracts the 12 bits, from a multicast address, to determine which
299 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
300 * incoming rx multicast addresses, to determine the bit-vector to check in
301 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
302 * by the MO field of the MCSTCTRL. The MO field is set during initialization
303 * to mc_filter_type.
304 **/
305 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
306 {
307 u32 vector = 0;
308
309 switch (hw->mac.mc_filter_type) {
310 case 0: /* use bits [47:36] of the address */
311 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
312 break;
313 case 1: /* use bits [46:35] of the address */
314 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
315 break;
316 case 2: /* use bits [45:34] of the address */
317 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
318 break;
319 case 3: /* use bits [43:32] of the address */
320 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
321 break;
322 default: /* Invalid mc_filter_type */
323 DEBUGOUT("MC filter type param set incorrectly\n");
324 ASSERT(0);
325 break;
326 }
327
328 /* vector can only be 12-bits or boundary will be exceeded */
329 vector &= 0xFFF;
330 return vector;
331 }
332
333 static s32 ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw, u32 *msg,
334 u32 *retmsg, u16 size)
335 {
336 struct ixgbe_mbx_info *mbx = &hw->mbx;
337 s32 retval = mbx->ops.write_posted(hw, msg, size, 0);
338
339 if (retval)
340 return retval;
341
342 return mbx->ops.read_posted(hw, retmsg, size, 0);
343 }
344
345 /**
346 * ixgbe_set_rar_vf - set device MAC address
347 * @hw: pointer to hardware structure
348 * @index: Receive address register to write
349 * @addr: Address to put into receive address register
350 * @vmdq: VMDq "set" or "pool" index
351 * @enable_addr: set flag that address is active
352 **/
353 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
354 u32 enable_addr)
355 {
356 u32 msgbuf[3];
357 u8 *msg_addr = (u8 *)(&msgbuf[1]);
358 s32 ret_val;
359 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
360
361 memset(msgbuf, 0, 12);
362 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
363 memcpy(msg_addr, addr, 6);
364 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
365
366 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
367
368 /* if nacked the address was rejected, use "perm_addr" */
369 if (!ret_val &&
370 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK))) {
371 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
372 return IXGBE_ERR_MBX;
373 }
374
375 return ret_val;
376 }
377
378 /**
379 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
380 * @hw: pointer to the HW structure
381 * @mc_addr_list: array of multicast addresses to program
382 * @mc_addr_count: number of multicast addresses to program
383 * @next: caller supplied function to return next address in list
384 * @clear: unused
385 *
386 * Updates the Multicast Table Array.
387 **/
388 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
389 u32 mc_addr_count, ixgbe_mc_addr_itr next,
390 bool clear)
391 {
392 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
393 u16 *vector_list = (u16 *)&msgbuf[1];
394 u32 vector;
395 u32 cnt, i;
396 u32 vmdq;
397
398 UNREFERENCED_1PARAMETER(clear);
399
400 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
401
402 /* Each entry in the list uses 1 16 bit word. We have 30
403 * 16 bit words available in our HW msg buffer (minus 1 for the
404 * msg type). That's 30 hash values if we pack 'em right. If
405 * there are more than 30 MC addresses to add then punt the
406 * extras for now and then add code to handle more than 30 later.
407 * It would be unusual for a server to request that many multi-cast
408 * addresses except for in large enterprise network environments.
409 */
410
411 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
412
413 if (mc_addr_count > IXGBE_MAX_VF_MC) {
414 device_printf(ixgbe_dev_from_hw(hw),
415 "number of Ethernet multicast addresses exceeded "
416 "the limit (%u > %d)\n", mc_addr_count, IXGBE_MAX_VF_MC);
417 cnt = IXGBE_MAX_VF_MC;
418 } else
419 cnt = mc_addr_count;
420 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
421 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
422
423 for (i = 0; i < cnt; i++) {
424 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
425 DEBUGOUT1("Hash value = 0x%03X\n", vector);
426 vector_list[i] = (u16)vector;
427 }
428 return ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf,
429 IXGBE_VFMAILBOX_SIZE);
430 }
431
432 /**
433 * ixgbevf_update_xcast_mode - Update Multicast mode
434 * @hw: pointer to the HW structure
435 * @xcast_mode: new multicast mode
436 *
437 * Updates the Multicast Mode of VF.
438 **/
439 s32 ixgbevf_update_xcast_mode(struct ixgbe_hw *hw, int xcast_mode)
440 {
441 u32 msgbuf[2];
442 s32 err;
443
444 switch (hw->api_version) {
445 case ixgbe_mbox_api_12:
446 /* New modes were introduced in 1.3 version */
447 if (xcast_mode > IXGBEVF_XCAST_MODE_ALLMULTI)
448 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
449 /* Fall through */
450 case ixgbe_mbox_api_13:
451 break;
452 default:
453 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
454 }
455
456 msgbuf[0] = IXGBE_VF_UPDATE_XCAST_MODE;
457 msgbuf[1] = xcast_mode;
458
459 err = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
460 if (err)
461 return err;
462
463 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
464 if (msgbuf[0] ==
465 (IXGBE_VF_UPDATE_XCAST_MODE | IXGBE_VT_MSGTYPE_NACK)) {
466 if (xcast_mode == IXGBEVF_XCAST_MODE_PROMISC) {
467 /*
468 * If the API version matched and the reply was NACK,
469 * assume the PF was not in PROMISC mode.
470 */
471 return IXGBE_ERR_NOT_IN_PROMISC;
472 } else
473 return IXGBE_ERR_FEATURE_NOT_SUPPORTED;
474 }
475 /*
476 * On linux's PF driver implementation, the PF replies VF's
477 * XCAST_MODE_ALLMULTI message not with NACK but with ACK even if the
478 * virtual function is NOT marked "trust" and act as
479 * XCAST_MODE_"MULTI". If ixv(4) simply check the return value of
480 * update_xcast_mode(XCAST_MODE_ALLMULTI), SIOCSADDMULTI success and
481 * the user may have trouble with some addresses. Fortunately, the
482 * Linux's PF driver's "ACK" message has not XCAST_MODE_"ALL"MULTI but
483 * XCAST_MODE_MULTI, so we can check this state by checking if the
484 * send message's argument and the reply message's argument are
485 * different.
486 */
487 if ((xcast_mode > IXGBEVF_XCAST_MODE_MULTI)
488 && (xcast_mode != msgbuf[1]))
489 return IXGBE_ERR_NOT_TRUSTED;
490 return IXGBE_SUCCESS;
491 }
492
493 /**
494 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
495 * @hw: pointer to the HW structure
496 * @vlan: 12 bit VLAN ID
497 * @vind: unused by VF drivers
498 * @vlan_on: if TRUE then set bit, else clear bit
499 * @vlvf_bypass: boolean flag indicating updating default pool is okay
500 *
501 * Turn on/off specified VLAN in the VLAN filter table.
502 **/
503 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind,
504 bool vlan_on, bool vlvf_bypass)
505 {
506 u32 msgbuf[2];
507 s32 ret_val;
508 UNREFERENCED_2PARAMETER(vind, vlvf_bypass);
509
510 msgbuf[0] = IXGBE_VF_SET_VLAN;
511 msgbuf[1] = vlan;
512 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
513 msgbuf[0] |= (u32)vlan_on << IXGBE_VT_MSGINFO_SHIFT;
514
515 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
516 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK))
517 return IXGBE_SUCCESS;
518
519 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK);
520 }
521
522 /**
523 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
524 * @hw: pointer to hardware structure
525 *
526 * Returns the number of transmit queues for the given adapter.
527 **/
528 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
529 {
530 UNREFERENCED_1PARAMETER(hw);
531 return IXGBE_VF_MAX_TX_QUEUES;
532 }
533
534 /**
535 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
536 * @hw: pointer to hardware structure
537 *
538 * Returns the number of receive queues for the given adapter.
539 **/
540 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
541 {
542 UNREFERENCED_1PARAMETER(hw);
543 return IXGBE_VF_MAX_RX_QUEUES;
544 }
545
546 /**
547 * ixgbe_get_mac_addr_vf - Read device MAC address
548 * @hw: pointer to the HW structure
549 * @mac_addr: the MAC address
550 **/
551 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
552 {
553 int i;
554
555 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
556 mac_addr[i] = hw->mac.perm_addr[i];
557
558 return IXGBE_SUCCESS;
559 }
560
561 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
562 {
563 u32 msgbuf[3], msgbuf_chk;
564 u8 *msg_addr = (u8 *)(&msgbuf[1]);
565 s32 ret_val;
566
567 memset(msgbuf, 0, sizeof(msgbuf));
568 /*
569 * If index is one then this is the start of a new list and needs
570 * indication to the PF so it can do it's own list management.
571 * If it is zero then that tells the PF to just clear all of
572 * this VF's macvlans and there is no new list.
573 */
574 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
575 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
576 msgbuf_chk = msgbuf[0];
577 if (addr)
578 memcpy(msg_addr, addr, 6);
579
580 ret_val = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 3);
581 if (!ret_val) {
582 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
583
584 if (msgbuf[0] == (msgbuf_chk | IXGBE_VT_MSGTYPE_NACK))
585 return IXGBE_ERR_OUT_OF_MEM;
586 }
587
588 return ret_val;
589 }
590
591 /**
592 * ixgbe_setup_mac_link_vf - Setup MAC link settings
593 * @hw: pointer to hardware structure
594 * @speed: new link speed
595 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
596 *
597 * Set the link speed in the AUTOC register and restarts link.
598 **/
599 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
600 bool autoneg_wait_to_complete)
601 {
602 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
603 return IXGBE_SUCCESS;
604 }
605
606 /**
607 * ixgbe_check_mac_link_vf - Get link/speed status
608 * @hw: pointer to hardware structure
609 * @speed: pointer to link speed
610 * @link_up: TRUE is link is up, FALSE otherwise
611 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
612 *
613 * Reads the links register to determine if link is up and the current speed
614 **/
615 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
616 bool *link_up, bool autoneg_wait_to_complete)
617 {
618 struct ixgbe_mbx_info *mbx = &hw->mbx;
619 struct ixgbe_mac_info *mac = &hw->mac;
620 s32 ret_val = IXGBE_SUCCESS;
621 u32 links_reg;
622 u32 in_msg = 0;
623 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
624
625 /* If we were hit with a reset drop the link */
626 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
627 mac->get_link_status = TRUE;
628
629 if (!mac->get_link_status)
630 goto out;
631
632 /* if link status is down no point in checking to see if pf is up */
633 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
634 if (!(links_reg & IXGBE_LINKS_UP))
635 goto out;
636
637 /* for SFP+ modules and DA cables on 82599 it can take up to 500usecs
638 * before the link status is correct
639 */
640 if (mac->type == ixgbe_mac_82599_vf) {
641 int i;
642
643 for (i = 0; i < 5; i++) {
644 usec_delay(100);
645 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
646
647 if (!(links_reg & IXGBE_LINKS_UP))
648 goto out;
649 }
650 }
651
652 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
653 case IXGBE_LINKS_SPEED_10G_82599:
654 *speed = IXGBE_LINK_SPEED_10GB_FULL;
655 if (hw->mac.type >= ixgbe_mac_X550) {
656 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
657 *speed = IXGBE_LINK_SPEED_2_5GB_FULL;
658 }
659 break;
660 case IXGBE_LINKS_SPEED_1G_82599:
661 *speed = IXGBE_LINK_SPEED_1GB_FULL;
662 break;
663 case IXGBE_LINKS_SPEED_100_82599:
664 *speed = IXGBE_LINK_SPEED_100_FULL;
665 if (hw->mac.type >= ixgbe_mac_X550) {
666 if (links_reg & IXGBE_LINKS_SPEED_NON_STD)
667 *speed = IXGBE_LINK_SPEED_5GB_FULL;
668 }
669 break;
670 case IXGBE_LINKS_SPEED_10_X550EM_A:
671 *speed = IXGBE_LINK_SPEED_UNKNOWN;
672 /* Since Reserved in older MAC's */
673 if (hw->mac.type >= ixgbe_mac_X550)
674 *speed = IXGBE_LINK_SPEED_10_FULL;
675 break;
676 default:
677 *speed = IXGBE_LINK_SPEED_UNKNOWN;
678 }
679
680 /* if the read failed it could just be a mailbox collision, best wait
681 * until we are called again and don't report an error
682 */
683 if (mbx->ops.read(hw, &in_msg, 1, 0))
684 goto out;
685
686 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
687 /* msg is not CTS and is NACK we must have lost CTS status */
688 if (in_msg & IXGBE_VT_MSGTYPE_NACK)
689 ret_val = -1;
690 goto out;
691 }
692
693 /* the pf is talking, if we timed out in the past we reinit */
694 if (!mbx->timeout) {
695 ret_val = -1;
696 goto out;
697 }
698
699 /* if we passed all the tests above then the link is up and we no
700 * longer need to check for link
701 */
702 mac->get_link_status = FALSE;
703
704 out:
705 *link_up = !mac->get_link_status;
706 return ret_val;
707 }
708
709 /**
710 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
711 * @hw: pointer to the HW structure
712 * @max_size: value to assign to max frame size
713 **/
714 s32 ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
715 {
716 u32 msgbuf[2];
717 s32 retval;
718
719 msgbuf[0] = IXGBE_VF_SET_LPE;
720 msgbuf[1] = max_size;
721
722 retval = ixgbevf_write_msg_read_ack(hw, msgbuf, msgbuf, 2);
723 if (retval)
724 return retval;
725 if ((msgbuf[0] & IXGBE_VF_SET_LPE) &&
726 (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK))
727 return IXGBE_ERR_MBX;
728
729 return 0;
730 }
731
732 /**
733 * ixgbevf_negotiate_api_version - Negotiate supported API version
734 * @hw: pointer to the HW structure
735 * @api: integer containing requested API version
736 **/
737 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
738 {
739 int err;
740 u32 msg[3];
741
742 /* Negotiate the mailbox API version */
743 msg[0] = IXGBE_VF_API_NEGOTIATE;
744 msg[1] = api;
745 msg[2] = 0;
746
747 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 3);
748 if (!err) {
749 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
750
751 /* Store value and return 0 on success */
752 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
753 hw->api_version = api;
754 return 0;
755 }
756
757 err = IXGBE_ERR_INVALID_ARGUMENT;
758 }
759
760 return err;
761 }
762
763 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
764 unsigned int *default_tc)
765 {
766 int err;
767 u32 msg[5];
768
769 /* do nothing if API doesn't support ixgbevf_get_queues */
770 switch (hw->api_version) {
771 case ixgbe_mbox_api_11:
772 case ixgbe_mbox_api_12:
773 case ixgbe_mbox_api_13:
774 break;
775 default:
776 return 0;
777 }
778
779 /* Fetch queue configuration from the PF */
780 msg[0] = IXGBE_VF_GET_QUEUES;
781 msg[1] = msg[2] = msg[3] = msg[4] = 0;
782
783 err = ixgbevf_write_msg_read_ack(hw, msg, msg, 5);
784 if (!err) {
785 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
786
787 /*
788 * if we didn't get an ACK there must have been
789 * some sort of mailbox error so we should treat it
790 * as such
791 */
792 if (msg[0] != (IXGBE_VF_GET_QUEUES | IXGBE_VT_MSGTYPE_ACK))
793 return IXGBE_ERR_MBX;
794
795 /* record and validate values from message */
796 hw->mac.max_tx_queues = msg[IXGBE_VF_TX_QUEUES];
797 if (hw->mac.max_tx_queues == 0 ||
798 hw->mac.max_tx_queues > IXGBE_VF_MAX_TX_QUEUES)
799 hw->mac.max_tx_queues = IXGBE_VF_MAX_TX_QUEUES;
800
801 hw->mac.max_rx_queues = msg[IXGBE_VF_RX_QUEUES];
802 if (hw->mac.max_rx_queues == 0 ||
803 hw->mac.max_rx_queues > IXGBE_VF_MAX_RX_QUEUES)
804 hw->mac.max_rx_queues = IXGBE_VF_MAX_RX_QUEUES;
805
806 *num_tcs = msg[IXGBE_VF_TRANS_VLAN];
807 /* in case of unknown state assume we cannot tag frames */
808 if (*num_tcs > hw->mac.max_rx_queues)
809 *num_tcs = 1;
810
811 *default_tc = msg[IXGBE_VF_DEF_QUEUE];
812 /* default to queue 0 on out-of-bounds queue number */
813 if (*default_tc >= hw->mac.max_tx_queues)
814 *default_tc = 0;
815 }
816
817 return err;
818 }
819