ixgbe_vf.c revision 1.4 1 /******************************************************************************
2
3 Copyright (c) 2001-2013, Intel Corporation
4 All rights reserved.
5
6 Redistribution and use in source and binary forms, with or without
7 modification, are permitted provided that the following conditions are met:
8
9 1. Redistributions of source code must retain the above copyright notice,
10 this list of conditions and the following disclaimer.
11
12 2. Redistributions in binary form must reproduce the above copyright
13 notice, this list of conditions and the following disclaimer in the
14 documentation and/or other materials provided with the distribution.
15
16 3. Neither the name of the Intel Corporation nor the names of its
17 contributors may be used to endorse or promote products derived from
18 this software without specific prior written permission.
19
20 THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
21 AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22 IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23 ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
24 LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
25 CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
26 SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
27 INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
28 CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
29 ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
30 POSSIBILITY OF SUCH DAMAGE.
31
32 ******************************************************************************/
33 /*$FreeBSD: head/sys/dev/ixgbe/ixgbe_vf.c 247822 2013-03-04 23:07:40Z jfv $*/
34 /*$NetBSD: ixgbe_vf.c,v 1.4 2015/04/24 07:00:51 msaitoh Exp $*/
35
36
37 #include "ixgbe_api.h"
38 #include "ixgbe_type.h"
39 #include "ixgbe_vf.h"
40
41 #ifndef IXGBE_VFWRITE_REG
42 #define IXGBE_VFWRITE_REG IXGBE_WRITE_REG
43 #endif
44 #ifndef IXGBE_VFREAD_REG
45 #define IXGBE_VFREAD_REG IXGBE_READ_REG
46 #endif
47
48 /**
49 * ixgbe_init_ops_vf - Initialize the pointers for vf
50 * @hw: pointer to hardware structure
51 *
52 * This will assign function pointers, adapter-specific functions can
53 * override the assignment of generic function pointers by assigning
54 * their own adapter-specific function pointers.
55 * Does not touch the hardware.
56 **/
57 s32 ixgbe_init_ops_vf(struct ixgbe_hw *hw)
58 {
59 /* MAC */
60 hw->mac.ops.init_hw = ixgbe_init_hw_vf;
61 hw->mac.ops.reset_hw = ixgbe_reset_hw_vf;
62 hw->mac.ops.start_hw = ixgbe_start_hw_vf;
63 /* Cannot clear stats on VF */
64 hw->mac.ops.clear_hw_cntrs = NULL;
65 hw->mac.ops.get_media_type = NULL;
66 hw->mac.ops.get_mac_addr = ixgbe_get_mac_addr_vf;
67 hw->mac.ops.stop_adapter = ixgbe_stop_adapter_vf;
68 hw->mac.ops.get_bus_info = NULL;
69
70 /* Link */
71 hw->mac.ops.setup_link = ixgbe_setup_mac_link_vf;
72 hw->mac.ops.check_link = ixgbe_check_mac_link_vf;
73 hw->mac.ops.get_link_capabilities = NULL;
74
75 /* RAR, Multicast, VLAN */
76 hw->mac.ops.set_rar = ixgbe_set_rar_vf;
77 hw->mac.ops.set_uc_addr = ixgbevf_set_uc_addr_vf;
78 hw->mac.ops.init_rx_addrs = NULL;
79 hw->mac.ops.update_mc_addr_list = ixgbe_update_mc_addr_list_vf;
80 hw->mac.ops.enable_mc = NULL;
81 hw->mac.ops.disable_mc = NULL;
82 hw->mac.ops.clear_vfta = NULL;
83 hw->mac.ops.set_vfta = ixgbe_set_vfta_vf;
84
85 hw->mac.max_tx_queues = 1;
86 hw->mac.max_rx_queues = 1;
87
88 hw->mbx.ops.init_params = ixgbe_init_mbx_params_vf;
89
90 return IXGBE_SUCCESS;
91 }
92
93 /**
94 * ixgbe_start_hw_vf - Prepare hardware for Tx/Rx
95 * @hw: pointer to hardware structure
96 *
97 * Starts the hardware by filling the bus info structure and media type, clears
98 * all on chip counters, initializes receive address registers, multicast
99 * table, VLAN filter table, calls routine to set up link and flow control
100 * settings, and leaves transmit and receive units disabled and uninitialized
101 **/
102 s32 ixgbe_start_hw_vf(struct ixgbe_hw *hw)
103 {
104 /* Clear adapter stopped flag */
105 hw->adapter_stopped = FALSE;
106
107 return IXGBE_SUCCESS;
108 }
109
110 /**
111 * ixgbe_init_hw_vf - virtual function hardware initialization
112 * @hw: pointer to hardware structure
113 *
114 * Initialize the hardware by resetting the hardware and then starting
115 * the hardware
116 **/
117 s32 ixgbe_init_hw_vf(struct ixgbe_hw *hw)
118 {
119 s32 status = hw->mac.ops.start_hw(hw);
120
121 hw->mac.ops.get_mac_addr(hw, hw->mac.addr);
122
123 return status;
124 }
125
126 /**
127 * ixgbe_reset_hw_vf - Performs hardware reset
128 * @hw: pointer to hardware structure
129 *
130 * Resets the hardware by reseting the transmit and receive units, masks and
131 * clears all interrupts.
132 **/
133 s32 ixgbe_reset_hw_vf(struct ixgbe_hw *hw)
134 {
135 struct ixgbe_mbx_info *mbx = &hw->mbx;
136 u32 timeout = IXGBE_VF_INIT_TIMEOUT;
137 s32 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
138 u32 ctrl, msgbuf[IXGBE_VF_PERMADDR_MSG_LEN];
139 u8 *addr = (u8 *)(&msgbuf[1]);
140
141 DEBUGFUNC("ixgbevf_reset_hw_vf");
142
143 /* Call adapter stop to disable tx/rx and clear interrupts */
144 hw->mac.ops.stop_adapter(hw);
145
146
147 DEBUGOUT("Issuing a function level reset to MAC\n");
148
149 ctrl = IXGBE_VFREAD_REG(hw, IXGBE_VFCTRL) | IXGBE_CTRL_RST;
150 IXGBE_VFWRITE_REG(hw, IXGBE_VFCTRL, ctrl);
151 IXGBE_WRITE_FLUSH(hw);
152
153 msec_delay(50);
154
155 /* we cannot reset while the RSTI / RSTD bits are asserted */
156 while (!mbx->ops.check_for_rst(hw, 0) && timeout) {
157 timeout--;
158 usec_delay(5);
159 }
160
161 if (timeout) {
162 /* mailbox timeout can now become active */
163 mbx->timeout = IXGBE_VF_MBX_INIT_TIMEOUT;
164
165 msgbuf[0] = IXGBE_VF_RESET;
166 mbx->ops.write_posted(hw, msgbuf, 1, 0);
167
168 msec_delay(10);
169
170 /*
171 * set our "perm_addr" based on info provided by PF
172 * also set up the mc_filter_type which is piggy backed
173 * on the mac address in word 3
174 */
175 ret_val = mbx->ops.read_posted(hw, msgbuf,
176 IXGBE_VF_PERMADDR_MSG_LEN, 0);
177 if (!ret_val) {
178 if (msgbuf[0] == (IXGBE_VF_RESET |
179 IXGBE_VT_MSGTYPE_ACK)) {
180 memcpy(hw->mac.perm_addr, addr,
181 IXGBE_ETH_LENGTH_OF_ADDRESS);
182 hw->mac.mc_filter_type =
183 msgbuf[IXGBE_VF_MC_TYPE_WORD];
184 } else {
185 ret_val = IXGBE_ERR_INVALID_MAC_ADDR;
186 }
187 }
188 }
189
190 return ret_val;
191 }
192
193 /**
194 * ixgbe_stop_adapter_vf - Generic stop Tx/Rx units
195 * @hw: pointer to hardware structure
196 *
197 * Sets the adapter_stopped flag within ixgbe_hw struct. Clears interrupts,
198 * disables transmit and receive units. The adapter_stopped flag is used by
199 * the shared code and drivers to determine if the adapter is in a stopped
200 * state and should not touch the hardware.
201 **/
202 s32 ixgbe_stop_adapter_vf(struct ixgbe_hw *hw)
203 {
204 u32 reg_val;
205 u16 i;
206
207 /*
208 * Set the adapter_stopped flag so other driver functions stop touching
209 * the hardware
210 */
211 hw->adapter_stopped = TRUE;
212
213 /* Clear interrupt mask to stop from interrupts being generated */
214 IXGBE_VFWRITE_REG(hw, IXGBE_VTEIMC, IXGBE_VF_IRQ_CLEAR_MASK);
215
216 /* Clear any pending interrupts, flush previous writes */
217 IXGBE_VFREAD_REG(hw, IXGBE_VTEICR);
218
219 /* Disable the transmit unit. Each queue must be disabled. */
220 for (i = 0; i < hw->mac.max_tx_queues; i++)
221 IXGBE_VFWRITE_REG(hw, IXGBE_VFTXDCTL(i), IXGBE_TXDCTL_SWFLSH);
222
223 /* Disable the receive unit by stopping each queue */
224 for (i = 0; i < hw->mac.max_rx_queues; i++) {
225 reg_val = IXGBE_VFREAD_REG(hw, IXGBE_VFRXDCTL(i));
226 reg_val &= ~IXGBE_RXDCTL_ENABLE;
227 IXGBE_VFWRITE_REG(hw, IXGBE_VFRXDCTL(i), reg_val);
228 }
229
230 /* flush all queues disables */
231 IXGBE_WRITE_FLUSH(hw);
232 msec_delay(2);
233
234 return IXGBE_SUCCESS;
235 }
236
237 /**
238 * ixgbe_mta_vector - Determines bit-vector in multicast table to set
239 * @hw: pointer to hardware structure
240 * @mc_addr: the multicast address
241 *
242 * Extracts the 12 bits, from a multicast address, to determine which
243 * bit-vector to set in the multicast table. The hardware uses 12 bits, from
244 * incoming rx multicast addresses, to determine the bit-vector to check in
245 * the MTA. Which of the 4 combination, of 12-bits, the hardware uses is set
246 * by the MO field of the MCSTCTRL. The MO field is set during initialization
247 * to mc_filter_type.
248 **/
249 static s32 ixgbe_mta_vector(struct ixgbe_hw *hw, u8 *mc_addr)
250 {
251 u32 vector = 0;
252
253 switch (hw->mac.mc_filter_type) {
254 case 0: /* use bits [47:36] of the address */
255 vector = ((mc_addr[4] >> 4) | (((u16)mc_addr[5]) << 4));
256 break;
257 case 1: /* use bits [46:35] of the address */
258 vector = ((mc_addr[4] >> 3) | (((u16)mc_addr[5]) << 5));
259 break;
260 case 2: /* use bits [45:34] of the address */
261 vector = ((mc_addr[4] >> 2) | (((u16)mc_addr[5]) << 6));
262 break;
263 case 3: /* use bits [43:32] of the address */
264 vector = ((mc_addr[4]) | (((u16)mc_addr[5]) << 8));
265 break;
266 default: /* Invalid mc_filter_type */
267 DEBUGOUT("MC filter type param set incorrectly\n");
268 ASSERT(0);
269 break;
270 }
271
272 /* vector can only be 12-bits or boundary will be exceeded */
273 vector &= 0xFFF;
274 return vector;
275 }
276
277 static void ixgbevf_write_msg_read_ack(struct ixgbe_hw *hw,
278 u32 *msg, u16 size)
279 {
280 struct ixgbe_mbx_info *mbx = &hw->mbx;
281 u32 retmsg[IXGBE_VFMAILBOX_SIZE];
282 s32 retval = mbx->ops.write_posted(hw, msg, size, 0);
283
284 if (!retval)
285 mbx->ops.read_posted(hw, retmsg, size, 0);
286 }
287
288 /**
289 * ixgbe_set_rar_vf - set device MAC address
290 * @hw: pointer to hardware structure
291 * @index: Receive address register to write
292 * @addr: Address to put into receive address register
293 * @vmdq: VMDq "set" or "pool" index
294 * @enable_addr: set flag that address is active
295 **/
296 s32 ixgbe_set_rar_vf(struct ixgbe_hw *hw, u32 index, u8 *addr, u32 vmdq,
297 u32 enable_addr)
298 {
299 struct ixgbe_mbx_info *mbx = &hw->mbx;
300 u32 msgbuf[3];
301 u8 *msg_addr = (u8 *)(&msgbuf[1]);
302 s32 ret_val;
303 UNREFERENCED_3PARAMETER(vmdq, enable_addr, index);
304
305 memset(msgbuf, 0, 12);
306 msgbuf[0] = IXGBE_VF_SET_MAC_ADDR;
307 memcpy(msg_addr, addr, 6);
308 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
309
310 if (!ret_val)
311 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
312
313 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
314
315 /* if nacked the address was rejected, use "perm_addr" */
316 if (!ret_val &&
317 (msgbuf[0] == (IXGBE_VF_SET_MAC_ADDR | IXGBE_VT_MSGTYPE_NACK)))
318 ixgbe_get_mac_addr_vf(hw, hw->mac.addr);
319
320 return ret_val;
321 }
322
323 /**
324 * ixgbe_update_mc_addr_list_vf - Update Multicast addresses
325 * @hw: pointer to the HW structure
326 * @mc_addr_list: array of multicast addresses to program
327 * @mc_addr_count: number of multicast addresses to program
328 * @next: caller supplied function to return next address in list
329 *
330 * Updates the Multicast Table Array.
331 **/
332 s32 ixgbe_update_mc_addr_list_vf(struct ixgbe_hw *hw, u8 *mc_addr_list,
333 u32 mc_addr_count, ixgbe_mc_addr_itr next,
334 bool clear)
335 {
336 struct ixgbe_mbx_info *mbx = &hw->mbx;
337 u32 msgbuf[IXGBE_VFMAILBOX_SIZE];
338 u16 *vector_list = (u16 *)&msgbuf[1];
339 u32 vector;
340 u32 cnt, i;
341 u32 vmdq;
342
343 UNREFERENCED_1PARAMETER(clear);
344
345 DEBUGFUNC("ixgbe_update_mc_addr_list_vf");
346
347 /* Each entry in the list uses 1 16 bit word. We have 30
348 * 16 bit words available in our HW msg buffer (minus 1 for the
349 * msg type). That's 30 hash values if we pack 'em right. If
350 * there are more than 30 MC addresses to add then punt the
351 * extras for now and then add code to handle more than 30 later.
352 * It would be unusual for a server to request that many multi-cast
353 * addresses except for in large enterprise network environments.
354 */
355
356 DEBUGOUT1("MC Addr Count = %d\n", mc_addr_count);
357
358 cnt = (mc_addr_count > 30) ? 30 : mc_addr_count;
359 msgbuf[0] = IXGBE_VF_SET_MULTICAST;
360 msgbuf[0] |= cnt << IXGBE_VT_MSGINFO_SHIFT;
361
362 for (i = 0; i < cnt; i++) {
363 vector = ixgbe_mta_vector(hw, next(hw, &mc_addr_list, &vmdq));
364 DEBUGOUT1("Hash value = 0x%03X\n", vector);
365 vector_list[i] = (u16)vector;
366 }
367
368 return mbx->ops.write_posted(hw, msgbuf, IXGBE_VFMAILBOX_SIZE, 0);
369 }
370
371 /**
372 * ixgbe_set_vfta_vf - Set/Unset vlan filter table address
373 * @hw: pointer to the HW structure
374 * @vlan: 12 bit VLAN ID
375 * @vind: unused by VF drivers
376 * @vlan_on: if TRUE then set bit, else clear bit
377 **/
378 s32 ixgbe_set_vfta_vf(struct ixgbe_hw *hw, u32 vlan, u32 vind, bool vlan_on)
379 {
380 struct ixgbe_mbx_info *mbx = &hw->mbx;
381 u32 msgbuf[2];
382 s32 ret_val;
383 UNREFERENCED_1PARAMETER(vind);
384
385 msgbuf[0] = IXGBE_VF_SET_VLAN;
386 msgbuf[1] = vlan;
387 /* Setting the 8 bit field MSG INFO to TRUE indicates "add" */
388 msgbuf[0] |= vlan_on << IXGBE_VT_MSGINFO_SHIFT;
389
390 ret_val = mbx->ops.write_posted(hw, msgbuf, 2, 0);
391 if (!ret_val)
392 ret_val = mbx->ops.read_posted(hw, msgbuf, 1, 0);
393
394 if (!ret_val && (msgbuf[0] & IXGBE_VT_MSGTYPE_ACK))
395 return IXGBE_SUCCESS;
396
397 return ret_val | (msgbuf[0] & IXGBE_VT_MSGTYPE_NACK);
398 }
399
400 /**
401 * ixgbe_get_num_of_tx_queues_vf - Get number of TX queues
402 * @hw: pointer to hardware structure
403 *
404 * Returns the number of transmit queues for the given adapter.
405 **/
406 u32 ixgbe_get_num_of_tx_queues_vf(struct ixgbe_hw *hw)
407 {
408 UNREFERENCED_1PARAMETER(hw);
409 return IXGBE_VF_MAX_TX_QUEUES;
410 }
411
412 /**
413 * ixgbe_get_num_of_rx_queues_vf - Get number of RX queues
414 * @hw: pointer to hardware structure
415 *
416 * Returns the number of receive queues for the given adapter.
417 **/
418 u32 ixgbe_get_num_of_rx_queues_vf(struct ixgbe_hw *hw)
419 {
420 UNREFERENCED_1PARAMETER(hw);
421 return IXGBE_VF_MAX_RX_QUEUES;
422 }
423
424 /**
425 * ixgbe_get_mac_addr_vf - Read device MAC address
426 * @hw: pointer to the HW structure
427 **/
428 s32 ixgbe_get_mac_addr_vf(struct ixgbe_hw *hw, u8 *mac_addr)
429 {
430 int i;
431
432 for (i = 0; i < IXGBE_ETH_LENGTH_OF_ADDRESS; i++)
433 mac_addr[i] = hw->mac.perm_addr[i];
434
435 return IXGBE_SUCCESS;
436 }
437
438 s32 ixgbevf_set_uc_addr_vf(struct ixgbe_hw *hw, u32 index, u8 *addr)
439 {
440 struct ixgbe_mbx_info *mbx = &hw->mbx;
441 u32 msgbuf[3];
442 u8 *msg_addr = (u8 *)(&msgbuf[1]);
443 s32 ret_val;
444
445 memset(msgbuf, 0, sizeof(msgbuf));
446 /*
447 * If index is one then this is the start of a new list and needs
448 * indication to the PF so it can do it's own list management.
449 * If it is zero then that tells the PF to just clear all of
450 * this VF's macvlans and there is no new list.
451 */
452 msgbuf[0] |= index << IXGBE_VT_MSGINFO_SHIFT;
453 msgbuf[0] |= IXGBE_VF_SET_MACVLAN;
454 if (addr)
455 memcpy(msg_addr, addr, 6);
456 ret_val = mbx->ops.write_posted(hw, msgbuf, 3, 0);
457
458 if (!ret_val)
459 ret_val = mbx->ops.read_posted(hw, msgbuf, 3, 0);
460
461 msgbuf[0] &= ~IXGBE_VT_MSGTYPE_CTS;
462
463 if (!ret_val)
464 if (msgbuf[0] == (IXGBE_VF_SET_MACVLAN | IXGBE_VT_MSGTYPE_NACK))
465 ret_val = IXGBE_ERR_OUT_OF_MEM;
466
467 return ret_val;
468 }
469
470 /**
471 * ixgbe_setup_mac_link_vf - Setup MAC link settings
472 * @hw: pointer to hardware structure
473 * @speed: new link speed
474 * @autoneg: TRUE if autonegotiation enabled
475 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
476 *
477 * Set the link speed in the AUTOC register and restarts link.
478 **/
479 s32 ixgbe_setup_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed speed,
480 bool autoneg_wait_to_complete)
481 {
482 UNREFERENCED_3PARAMETER(hw, speed, autoneg_wait_to_complete);
483 return IXGBE_SUCCESS;
484 }
485
486 /**
487 * ixgbe_check_mac_link_vf - Get link/speed status
488 * @hw: pointer to hardware structure
489 * @speed: pointer to link speed
490 * @link_up: TRUE is link is up, FALSE otherwise
491 * @autoneg_wait_to_complete: TRUE when waiting for completion is needed
492 *
493 * Reads the links register to determine if link is up and the current speed
494 **/
495 s32 ixgbe_check_mac_link_vf(struct ixgbe_hw *hw, ixgbe_link_speed *speed,
496 bool *link_up, bool autoneg_wait_to_complete)
497 {
498 struct ixgbe_mbx_info *mbx = &hw->mbx;
499 struct ixgbe_mac_info *mac = &hw->mac;
500 s32 ret_val = IXGBE_SUCCESS;
501 u32 links_reg;
502 u32 in_msg = 0;
503 UNREFERENCED_1PARAMETER(autoneg_wait_to_complete);
504
505 /* If we were hit with a reset drop the link */
506 if (!mbx->ops.check_for_rst(hw, 0) || !mbx->timeout)
507 mac->get_link_status = TRUE;
508
509 if (!mac->get_link_status)
510 goto out;
511
512 /* if link status is down no point in checking to see if pf is up */
513 links_reg = IXGBE_READ_REG(hw, IXGBE_VFLINKS);
514 if (!(links_reg & IXGBE_LINKS_UP))
515 goto out;
516
517 switch (links_reg & IXGBE_LINKS_SPEED_82599) {
518 case IXGBE_LINKS_SPEED_10G_82599:
519 *speed = IXGBE_LINK_SPEED_10GB_FULL;
520 break;
521 case IXGBE_LINKS_SPEED_1G_82599:
522 *speed = IXGBE_LINK_SPEED_1GB_FULL;
523 break;
524 case IXGBE_LINKS_SPEED_100_82599:
525 *speed = IXGBE_LINK_SPEED_100_FULL;
526 break;
527 }
528
529 /* if the read failed it could just be a mailbox collision, best wait
530 * until we are called again and don't report an error
531 */
532 if (mbx->ops.read(hw, &in_msg, 1, 0))
533 goto out;
534
535 if (!(in_msg & IXGBE_VT_MSGTYPE_CTS)) {
536 /* msg is not CTS and is NACK we must have lost CTS status */
537 if (in_msg & IXGBE_VT_MSGTYPE_NACK)
538 ret_val = -1;
539 goto out;
540 }
541
542 /* the pf is talking, if we timed out in the past we reinit */
543 if (!mbx->timeout) {
544 ret_val = -1;
545 goto out;
546 }
547
548 /* if we passed all the tests above then the link is up and we no
549 * longer need to check for link
550 */
551 mac->get_link_status = FALSE;
552
553 out:
554 *link_up = !mac->get_link_status;
555 return ret_val;
556 }
557
558 /**
559 * ixgbevf_rlpml_set_vf - Set the maximum receive packet length
560 * @hw: pointer to the HW structure
561 * @max_size: value to assign to max frame size
562 **/
563 void ixgbevf_rlpml_set_vf(struct ixgbe_hw *hw, u16 max_size)
564 {
565 u32 msgbuf[2];
566
567 msgbuf[0] = IXGBE_VF_SET_LPE;
568 msgbuf[1] = max_size;
569 ixgbevf_write_msg_read_ack(hw, msgbuf, 2);
570 }
571
572 /**
573 * ixgbevf_negotiate_api_version - Negotiate supported API version
574 * @hw: pointer to the HW structure
575 * @api: integer containing requested API version
576 **/
577 int ixgbevf_negotiate_api_version(struct ixgbe_hw *hw, int api)
578 {
579 int err;
580 u32 msg[3];
581
582 /* Negotiate the mailbox API version */
583 msg[0] = IXGBE_VF_API_NEGOTIATE;
584 msg[1] = api;
585 msg[2] = 0;
586 err = hw->mbx.ops.write_posted(hw, msg, 3, 0);
587
588 if (!err)
589 err = hw->mbx.ops.read_posted(hw, msg, 3, 0);
590
591 if (!err) {
592 msg[0] &= ~IXGBE_VT_MSGTYPE_CTS;
593
594 /* Store value and return 0 on success */
595 if (msg[0] == (IXGBE_VF_API_NEGOTIATE | IXGBE_VT_MSGTYPE_ACK)) {
596 hw->api_version = api;
597 return 0;
598 }
599
600 err = IXGBE_ERR_INVALID_ARGUMENT;
601 }
602
603 return err;
604 }
605
606 int ixgbevf_get_queues(struct ixgbe_hw *hw, unsigned int *num_tcs,
607 unsigned int *default_tc)
608 {
609 UNREFERENCED_3PARAMETER(hw, num_tcs, default_tc);
610 return IXGBE_SUCCESS;
611 }
612
613