njs_pci.c revision 1.2.2.3
1 1.2.2.3 tron /* $NetBSD: njs_pci.c,v 1.2.2.3 2004/08/30 09:54:17 tron Exp $ */ 2 1.2.2.2 tron 3 1.2.2.2 tron /*- 4 1.2.2.2 tron * Copyright (c) 2004 The NetBSD Foundation, Inc. 5 1.2.2.2 tron * All rights reserved. 6 1.2.2.2 tron * 7 1.2.2.2 tron * This code is derived from software contributed to The NetBSD Foundation 8 1.2.2.2 tron * by ITOH Yasufumi. 9 1.2.2.2 tron * 10 1.2.2.2 tron * Redistribution and use in source and binary forms, with or without 11 1.2.2.2 tron * modification, are permitted provided that the following conditions 12 1.2.2.2 tron * are met: 13 1.2.2.2 tron * 1. Redistributions of source code must retain the above copyright 14 1.2.2.2 tron * notice, this list of conditions and the following disclaimer. 15 1.2.2.2 tron * 2. Redistributions in binary form must reproduce the above copyright 16 1.2.2.2 tron * notice, this list of conditions and the following disclaimer in the 17 1.2.2.2 tron * documentation and/or other materials provided with the distribution. 18 1.2.2.2 tron * 3. All advertising materials mentioning features or use of this software 19 1.2.2.2 tron * must display the following acknowledgement: 20 1.2.2.2 tron * This product includes software developed by the NetBSD 21 1.2.2.2 tron * Foundation, Inc. and its contributors. 22 1.2.2.2 tron * 4. Neither the name of The NetBSD Foundation nor the names of its 23 1.2.2.2 tron * contributors may be used to endorse or promote products derived 24 1.2.2.2 tron * from this software without specific prior written permission. 25 1.2.2.2 tron * 26 1.2.2.2 tron * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 1.2.2.2 tron * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 1.2.2.2 tron * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 1.2.2.2 tron * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 1.2.2.2 tron * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 1.2.2.2 tron * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 1.2.2.2 tron * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 1.2.2.2 tron * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 1.2.2.2 tron * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 1.2.2.2 tron * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 1.2.2.2 tron * POSSIBILITY OF SUCH DAMAGE. 37 1.2.2.2 tron */ 38 1.2.2.2 tron 39 1.2.2.2 tron #include <sys/cdefs.h> 40 1.2.2.3 tron __KERNEL_RCSID(0, "$NetBSD: njs_pci.c,v 1.2.2.3 2004/08/30 09:54:17 tron Exp $"); 41 1.2.2.2 tron 42 1.2.2.2 tron #include <sys/param.h> 43 1.2.2.2 tron #include <sys/systm.h> 44 1.2.2.2 tron #include <sys/kernel.h> 45 1.2.2.2 tron #include <sys/device.h> 46 1.2.2.2 tron 47 1.2.2.2 tron #include <machine/bus.h> 48 1.2.2.2 tron #include <machine/intr.h> 49 1.2.2.2 tron 50 1.2.2.2 tron #include <dev/scsipi/scsi_all.h> 51 1.2.2.2 tron #include <dev/scsipi/scsipi_all.h> 52 1.2.2.2 tron #include <dev/scsipi/scsiconf.h> 53 1.2.2.2 tron 54 1.2.2.2 tron #include <dev/pci/pcivar.h> 55 1.2.2.2 tron #include <dev/pci/pcidevs.h> 56 1.2.2.2 tron 57 1.2.2.2 tron #include <dev/ic/ninjascsi32reg.h> 58 1.2.2.2 tron #include <dev/ic/ninjascsi32var.h> 59 1.2.2.2 tron 60 1.2.2.2 tron #define NJSC32_PCI_BASEADDR_IO PCI_MAPREG_START 61 1.2.2.2 tron #define NJSC32_PCI_BASEADDR_MEM (PCI_MAPREG_START + 4) 62 1.2.2.2 tron 63 1.2.2.2 tron struct njsc32_pci_softc { 64 1.2.2.2 tron struct njsc32_softc sc_njsc32; 65 1.2.2.2 tron 66 1.2.2.2 tron pci_chipset_tag_t sc_pc; 67 1.2.2.2 tron 68 1.2.2.2 tron bus_space_handle_t sc_regmaph; 69 1.2.2.2 tron bus_size_t sc_regmap_size; 70 1.2.2.2 tron }; 71 1.2.2.2 tron 72 1.2.2.3 tron static int njs_pci_match(struct device *, struct cfdata *, void *); 73 1.2.2.3 tron static void njs_pci_attach(struct device *, struct device *, void *); 74 1.2.2.3 tron static int njs_pci_detach(struct device *, int); 75 1.2.2.2 tron 76 1.2.2.2 tron CFATTACH_DECL(njs_pci, sizeof(struct njsc32_pci_softc), 77 1.2.2.2 tron njs_pci_match, njs_pci_attach, njs_pci_detach, NULL); 78 1.2.2.2 tron 79 1.2.2.3 tron static const struct njsc32_pci_product { 80 1.2.2.2 tron pci_vendor_id_t p_vendor; 81 1.2.2.2 tron pci_product_id_t p_product; 82 1.2.2.2 tron njsc32_model_t p_model; 83 1.2.2.2 tron int p_clk; /* one of NJSC32_CLK_* */ 84 1.2.2.2 tron } njsc32_pci_products[] = { 85 1.2.2.2 tron { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_IODATA, 86 1.2.2.2 tron NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M }, 87 1.2.2.2 tron { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_LOGITEC, 88 1.2.2.2 tron NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M }, 89 1.2.2.2 tron { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_LOGITEC2, 90 1.2.2.2 tron NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M }, 91 1.2.2.2 tron { PCI_VENDOR_WORKBIT, PCI_PRODUCT_WORKBIT_NJSC32UDE_BUFFALO, 92 1.2.2.2 tron NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE, NJSC32_CLK_40M }, 93 1.2.2.2 tron 94 1.2.2.2 tron { 0, 0, 95 1.2.2.2 tron NJSC32_MODEL_INVALID, 0 }, 96 1.2.2.2 tron }; 97 1.2.2.2 tron 98 1.2.2.3 tron static const struct njsc32_pci_product * 99 1.2.2.3 tron njs_pci_lookup(const struct pci_attach_args *pa) 100 1.2.2.2 tron { 101 1.2.2.2 tron const struct njsc32_pci_product *p; 102 1.2.2.2 tron 103 1.2.2.2 tron for (p = njsc32_pci_products; 104 1.2.2.2 tron p->p_model != NJSC32_MODEL_INVALID; p++) { 105 1.2.2.2 tron if (PCI_VENDOR(pa->pa_id) == p->p_vendor && 106 1.2.2.2 tron PCI_PRODUCT(pa->pa_id) == p->p_product) 107 1.2.2.2 tron return p; 108 1.2.2.2 tron } 109 1.2.2.2 tron 110 1.2.2.2 tron return NULL; 111 1.2.2.2 tron } 112 1.2.2.2 tron 113 1.2.2.3 tron static int 114 1.2.2.3 tron njs_pci_match(struct device *parent, struct cfdata *match, void *aux) 115 1.2.2.2 tron { 116 1.2.2.2 tron struct pci_attach_args *pa = aux; 117 1.2.2.2 tron 118 1.2.2.2 tron if (njs_pci_lookup(pa)) 119 1.2.2.2 tron return 1; 120 1.2.2.2 tron 121 1.2.2.2 tron return 0; 122 1.2.2.2 tron } 123 1.2.2.2 tron 124 1.2.2.3 tron static void 125 1.2.2.3 tron njs_pci_attach(struct device *parent, struct device *self, void *aux) 126 1.2.2.2 tron { 127 1.2.2.2 tron struct pci_attach_args *pa = aux; 128 1.2.2.2 tron struct njsc32_pci_softc *psc = (void *) self; 129 1.2.2.2 tron struct njsc32_softc *sc = &psc->sc_njsc32; 130 1.2.2.2 tron const struct njsc32_pci_product *prod; 131 1.2.2.2 tron pci_intr_handle_t ih; 132 1.2.2.2 tron pci_chipset_tag_t pc = pa->pa_pc; 133 1.2.2.2 tron pcireg_t reg; 134 1.2.2.2 tron const char *str_intr, *str_at; 135 1.2.2.2 tron 136 1.2.2.2 tron aprint_naive(": SCSI controller\n"); 137 1.2.2.2 tron if ((prod = njs_pci_lookup(pa)) == NULL) 138 1.2.2.2 tron panic("njs_pci_attach"); 139 1.2.2.2 tron 140 1.2.2.2 tron aprint_normal(": Workbit NinjaSCSI-32 SCSI adapter\n"); 141 1.2.2.2 tron sc->sc_model = prod->p_model; 142 1.2.2.2 tron sc->sc_clk = prod->p_clk; 143 1.2.2.2 tron 144 1.2.2.2 tron psc->sc_pc = pc; 145 1.2.2.2 tron 146 1.2.2.2 tron /* enable device and DMA */ 147 1.2.2.2 tron reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG); 148 1.2.2.2 tron reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE | 149 1.2.2.2 tron PCI_COMMAND_MASTER_ENABLE; 150 1.2.2.2 tron pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg); 151 1.2.2.2 tron 152 1.2.2.2 tron /* 153 1.2.2.2 tron * Map registers. 154 1.2.2.2 tron * Try memory map first, and then try I/O. 155 1.2.2.2 tron */ 156 1.2.2.2 tron if (pci_mapreg_map(pa, NJSC32_PCI_BASEADDR_MEM, 157 1.2.2.2 tron PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0, 158 1.2.2.2 tron &sc->sc_regt, &psc->sc_regmaph, NULL, &psc->sc_regmap_size) == 0) { 159 1.2.2.2 tron if (bus_space_subregion(sc->sc_regt, psc->sc_regmaph, 160 1.2.2.2 tron NJSC32_MEMOFFSET_REG, NJSC32_REGSIZE, &sc->sc_regh) != 0) { 161 1.2.2.2 tron /* failed -- undo map and try I/O */ 162 1.2.2.2 tron bus_space_unmap(sc->sc_regt, psc->sc_regmaph, 163 1.2.2.2 tron psc->sc_regmap_size); 164 1.2.2.2 tron goto try_io; 165 1.2.2.2 tron } 166 1.2.2.2 tron #ifdef NJSC32_DEBUG 167 1.2.2.2 tron printf("%s: memory space mapped\n", sc->sc_dev.dv_xname); 168 1.2.2.2 tron #endif 169 1.2.2.2 tron sc->sc_flags = NJSC32_MEM_MAPPED; 170 1.2.2.2 tron } else { 171 1.2.2.2 tron try_io: 172 1.2.2.2 tron if (pci_mapreg_map(pa, NJSC32_PCI_BASEADDR_IO, 173 1.2.2.2 tron PCI_MAPREG_TYPE_IO, 0, &sc->sc_regt, &sc->sc_regh, 174 1.2.2.2 tron NULL, &psc->sc_regmap_size) == 0) { 175 1.2.2.2 tron #ifdef NJSC32_DEBUG 176 1.2.2.2 tron printf("%s: io space mapped\n", sc->sc_dev.dv_xname); 177 1.2.2.2 tron #endif 178 1.2.2.2 tron sc->sc_flags = NJSC32_IO_MAPPED; 179 1.2.2.2 tron } else { 180 1.2.2.2 tron aprint_error("%s: unable to map device registers\n", 181 1.2.2.2 tron sc->sc_dev.dv_xname); 182 1.2.2.2 tron return; 183 1.2.2.2 tron } 184 1.2.2.2 tron } 185 1.2.2.2 tron 186 1.2.2.2 tron sc->sc_dmat = pa->pa_dmat; 187 1.2.2.2 tron 188 1.2.2.2 tron /* map interrupt */ 189 1.2.2.2 tron if (pci_intr_map(pa, &ih)) { 190 1.2.2.2 tron aprint_error("%s: couldn't map interrupt\n", 191 1.2.2.2 tron sc->sc_dev.dv_xname); 192 1.2.2.2 tron return; 193 1.2.2.2 tron } 194 1.2.2.2 tron 195 1.2.2.2 tron str_intr = pci_intr_string(pa->pa_pc, ih); 196 1.2.2.2 tron str_at = " at "; 197 1.2.2.2 tron if (str_intr == NULL) 198 1.2.2.2 tron str_at = str_intr = ""; 199 1.2.2.2 tron 200 1.2.2.2 tron /* setup interrupt handler */ 201 1.2.2.2 tron if ((sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, njsc32_intr, sc)) 202 1.2.2.2 tron == NULL) { 203 1.2.2.2 tron printf("%s: unable to establish interrupt%s%s\n", 204 1.2.2.2 tron sc->sc_dev.dv_xname, str_at, str_intr); 205 1.2.2.2 tron return; 206 1.2.2.2 tron } 207 1.2.2.2 tron printf("%s: interrupting%s%s\n", 208 1.2.2.2 tron sc->sc_dev.dv_xname, str_at, str_intr); 209 1.2.2.2 tron 210 1.2.2.2 tron /* attach */ 211 1.2.2.2 tron njsc32_attach(sc); 212 1.2.2.2 tron } 213 1.2.2.2 tron 214 1.2.2.3 tron static int 215 1.2.2.3 tron njs_pci_detach(struct device *self, int flags) 216 1.2.2.2 tron { 217 1.2.2.2 tron struct njsc32_pci_softc *psc = (void *) self; 218 1.2.2.2 tron struct njsc32_softc *sc = &psc->sc_njsc32; 219 1.2.2.2 tron int rv; 220 1.2.2.2 tron 221 1.2.2.2 tron rv = njsc32_detach(sc, flags); 222 1.2.2.2 tron if (rv) 223 1.2.2.2 tron return rv; 224 1.2.2.2 tron 225 1.2.2.2 tron if (sc->sc_ih) 226 1.2.2.2 tron pci_intr_disestablish(psc->sc_pc, sc->sc_ih); 227 1.2.2.2 tron 228 1.2.2.2 tron if (sc->sc_flags & NJSC32_IO_MAPPED) 229 1.2.2.2 tron bus_space_unmap(sc->sc_regt, sc->sc_regh, psc->sc_regmap_size); 230 1.2.2.2 tron if (sc->sc_flags & NJSC32_MEM_MAPPED) 231 1.2.2.2 tron bus_space_unmap(sc->sc_regt, psc->sc_regmaph, 232 1.2.2.2 tron psc->sc_regmap_size); 233 1.2.2.2 tron 234 1.2.2.2 tron return 0; 235 1.2.2.2 tron } 236
Indexes created Thu Oct 02 10:09:58 GMT 2025