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njs_pci.c revision 1.2.6.2
      1  1.2.6.2  he /*	$NetBSD: njs_pci.c,v 1.2.6.2 2004/11/11 23:21:34 he Exp $	*/
      2  1.2.6.2  he 
      3  1.2.6.2  he /*-
      4  1.2.6.2  he  * Copyright (c) 2004 The NetBSD Foundation, Inc.
      5  1.2.6.2  he  * All rights reserved.
      6  1.2.6.2  he  *
      7  1.2.6.2  he  * This code is derived from software contributed to The NetBSD Foundation
      8  1.2.6.2  he  * by ITOH Yasufumi.
      9  1.2.6.2  he  *
     10  1.2.6.2  he  * Redistribution and use in source and binary forms, with or without
     11  1.2.6.2  he  * modification, are permitted provided that the following conditions
     12  1.2.6.2  he  * are met:
     13  1.2.6.2  he  * 1. Redistributions of source code must retain the above copyright
     14  1.2.6.2  he  *    notice, this list of conditions and the following disclaimer.
     15  1.2.6.2  he  * 2. Redistributions in binary form must reproduce the above copyright
     16  1.2.6.2  he  *    notice, this list of conditions and the following disclaimer in the
     17  1.2.6.2  he  *    documentation and/or other materials provided with the distribution.
     18  1.2.6.2  he  * 3. All advertising materials mentioning features or use of this software
     19  1.2.6.2  he  *    must display the following acknowledgement:
     20  1.2.6.2  he  *	This product includes software developed by the NetBSD
     21  1.2.6.2  he  *	Foundation, Inc. and its contributors.
     22  1.2.6.2  he  * 4. Neither the name of The NetBSD Foundation nor the names of its
     23  1.2.6.2  he  *    contributors may be used to endorse or promote products derived
     24  1.2.6.2  he  *    from this software without specific prior written permission.
     25  1.2.6.2  he  *
     26  1.2.6.2  he  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     27  1.2.6.2  he  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     28  1.2.6.2  he  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     29  1.2.6.2  he  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     30  1.2.6.2  he  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     31  1.2.6.2  he  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     32  1.2.6.2  he  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     33  1.2.6.2  he  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     34  1.2.6.2  he  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     35  1.2.6.2  he  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     36  1.2.6.2  he  * POSSIBILITY OF SUCH DAMAGE.
     37  1.2.6.2  he  */
     38  1.2.6.2  he 
     39  1.2.6.2  he #include <sys/cdefs.h>
     40  1.2.6.2  he __KERNEL_RCSID(0, "$NetBSD: njs_pci.c,v 1.2.6.2 2004/11/11 23:21:34 he Exp $");
     41  1.2.6.2  he 
     42  1.2.6.2  he #include <sys/param.h>
     43  1.2.6.2  he #include <sys/systm.h>
     44  1.2.6.2  he #include <sys/kernel.h>
     45  1.2.6.2  he #include <sys/device.h>
     46  1.2.6.2  he 
     47  1.2.6.2  he #include <machine/bus.h>
     48  1.2.6.2  he #include <machine/intr.h>
     49  1.2.6.2  he 
     50  1.2.6.2  he #include <dev/scsipi/scsi_all.h>
     51  1.2.6.2  he #include <dev/scsipi/scsipi_all.h>
     52  1.2.6.2  he #include <dev/scsipi/scsiconf.h>
     53  1.2.6.2  he 
     54  1.2.6.2  he #include <dev/pci/pcivar.h>
     55  1.2.6.2  he #include <dev/pci/pcidevs.h>
     56  1.2.6.2  he 
     57  1.2.6.2  he #include <dev/ic/ninjascsi32reg.h>
     58  1.2.6.2  he #include <dev/ic/ninjascsi32var.h>
     59  1.2.6.2  he 
     60  1.2.6.2  he #define NJSC32_PCI_BASEADDR_IO		PCI_MAPREG_START
     61  1.2.6.2  he #define NJSC32_PCI_BASEADDR_MEM		(PCI_MAPREG_START + 4)
     62  1.2.6.2  he 
     63  1.2.6.2  he struct njsc32_pci_softc {
     64  1.2.6.2  he 	struct njsc32_softc	sc_njsc32;
     65  1.2.6.2  he 
     66  1.2.6.2  he 	pci_chipset_tag_t	sc_pc;
     67  1.2.6.2  he 
     68  1.2.6.2  he 	bus_space_handle_t	sc_regmaph;
     69  1.2.6.2  he 	bus_size_t		sc_regmap_size;
     70  1.2.6.2  he };
     71  1.2.6.2  he 
     72  1.2.6.2  he static int	njs_pci_match(struct device *, struct cfdata *, void *);
     73  1.2.6.2  he static void	njs_pci_attach(struct device *, struct device *, void *);
     74  1.2.6.2  he static int	njs_pci_detach(struct device *, int);
     75  1.2.6.2  he 
     76  1.2.6.2  he struct cfattach njs_pci_ca = {
     77  1.2.6.2  he 	sizeof(struct njsc32_pci_softc), njs_pci_match, njs_pci_attach,
     78  1.2.6.2  he 	njs_pci_detach
     79  1.2.6.2  he };
     80  1.2.6.2  he 
     81  1.2.6.2  he static const struct njsc32_pci_product {
     82  1.2.6.2  he 	pci_vendor_id_t		p_vendor;
     83  1.2.6.2  he 	pci_product_id_t	p_product;
     84  1.2.6.2  he 	njsc32_model_t		p_model;
     85  1.2.6.2  he 	int			p_clk;		/* one of NJSC32_CLK_* */
     86  1.2.6.2  he } njsc32_pci_products[] = {
     87  1.2.6.2  he 	{ PCI_VENDOR_WORKBIT,	PCI_PRODUCT_WORKBIT_NJSC32UDE_IODATA,
     88  1.2.6.2  he 	  NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE,	NJSC32_CLK_40M },
     89  1.2.6.2  he 	{ PCI_VENDOR_WORKBIT,	PCI_PRODUCT_WORKBIT_NJSC32UDE_LOGITEC,
     90  1.2.6.2  he 	  NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE,	NJSC32_CLK_40M },
     91  1.2.6.2  he 	{ PCI_VENDOR_WORKBIT,	PCI_PRODUCT_WORKBIT_NJSC32UDE_LOGITEC2,
     92  1.2.6.2  he 	  NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE,	NJSC32_CLK_40M },
     93  1.2.6.2  he 	{ PCI_VENDOR_WORKBIT,	PCI_PRODUCT_WORKBIT_NJSC32UDE_BUFFALO,
     94  1.2.6.2  he 	  NJSC32_MODEL_32UDE | NJSC32_FLAG_DUALEDGE,	NJSC32_CLK_40M },
     95  1.2.6.2  he 
     96  1.2.6.2  he 	{ 0,				0,
     97  1.2.6.2  he 	  NJSC32_MODEL_INVALID,		0 },
     98  1.2.6.2  he };
     99  1.2.6.2  he 
    100  1.2.6.2  he static const struct njsc32_pci_product *
    101  1.2.6.2  he njs_pci_lookup(const struct pci_attach_args *pa)
    102  1.2.6.2  he {
    103  1.2.6.2  he 	const struct njsc32_pci_product *p;
    104  1.2.6.2  he 
    105  1.2.6.2  he 	for (p = njsc32_pci_products;
    106  1.2.6.2  he 	    p->p_model != NJSC32_MODEL_INVALID; p++) {
    107  1.2.6.2  he 		if (PCI_VENDOR(pa->pa_id) == p->p_vendor &&
    108  1.2.6.2  he 		    PCI_PRODUCT(pa->pa_id) == p->p_product)
    109  1.2.6.2  he 			return p;
    110  1.2.6.2  he 	}
    111  1.2.6.2  he 
    112  1.2.6.2  he 	return NULL;
    113  1.2.6.2  he }
    114  1.2.6.2  he 
    115  1.2.6.2  he static int
    116  1.2.6.2  he njs_pci_match(struct device *parent, struct cfdata *match, void *aux)
    117  1.2.6.2  he {
    118  1.2.6.2  he 	struct pci_attach_args *pa = aux;
    119  1.2.6.2  he 
    120  1.2.6.2  he 	if (njs_pci_lookup(pa))
    121  1.2.6.2  he 		return 1;
    122  1.2.6.2  he 
    123  1.2.6.2  he 	return 0;
    124  1.2.6.2  he }
    125  1.2.6.2  he 
    126  1.2.6.2  he static void
    127  1.2.6.2  he njs_pci_attach(struct device *parent, struct device *self, void *aux)
    128  1.2.6.2  he {
    129  1.2.6.2  he 	struct pci_attach_args *pa = aux;
    130  1.2.6.2  he 	struct njsc32_pci_softc *psc = (void *) self;
    131  1.2.6.2  he 	struct njsc32_softc *sc = &psc->sc_njsc32;
    132  1.2.6.2  he 	const struct njsc32_pci_product *prod;
    133  1.2.6.2  he 	pci_intr_handle_t ih;
    134  1.2.6.2  he 	pci_chipset_tag_t pc = pa->pa_pc;
    135  1.2.6.2  he 	pcireg_t reg;
    136  1.2.6.2  he 	const char *str_intr, *str_at;
    137  1.2.6.2  he 
    138  1.2.6.2  he 	if ((prod = njs_pci_lookup(pa)) == NULL)
    139  1.2.6.2  he 		panic("njs_pci_attach");
    140  1.2.6.2  he 
    141  1.2.6.2  he 	printf(": Workbit NinjaSCSI-32 SCSI adapter\n");
    142  1.2.6.2  he 	sc->sc_model = prod->p_model;
    143  1.2.6.2  he 	sc->sc_clk = prod->p_clk;
    144  1.2.6.2  he 
    145  1.2.6.2  he 	psc->sc_pc = pc;
    146  1.2.6.2  he 
    147  1.2.6.2  he 	/* enable device and DMA */
    148  1.2.6.2  he 	reg = pci_conf_read(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG);
    149  1.2.6.2  he 	reg |= PCI_COMMAND_IO_ENABLE | PCI_COMMAND_MEM_ENABLE |
    150  1.2.6.2  he 	    PCI_COMMAND_MASTER_ENABLE;
    151  1.2.6.2  he 	pci_conf_write(pc, pa->pa_tag, PCI_COMMAND_STATUS_REG, reg);
    152  1.2.6.2  he 
    153  1.2.6.2  he 	/*
    154  1.2.6.2  he 	 * Map registers.
    155  1.2.6.2  he 	 * Try memory map first, and then try I/O.
    156  1.2.6.2  he 	 */
    157  1.2.6.2  he 	if (pci_mapreg_map(pa, NJSC32_PCI_BASEADDR_MEM,
    158  1.2.6.2  he 	    PCI_MAPREG_TYPE_MEM|PCI_MAPREG_MEM_TYPE_32BIT, 0,
    159  1.2.6.2  he 	    &sc->sc_regt, &psc->sc_regmaph, NULL, &psc->sc_regmap_size) == 0) {
    160  1.2.6.2  he 		if (bus_space_subregion(sc->sc_regt, psc->sc_regmaph,
    161  1.2.6.2  he 		    NJSC32_MEMOFFSET_REG, NJSC32_REGSIZE, &sc->sc_regh) != 0) {
    162  1.2.6.2  he 			/* failed -- undo map and try I/O */
    163  1.2.6.2  he 			bus_space_unmap(sc->sc_regt, psc->sc_regmaph,
    164  1.2.6.2  he 			    psc->sc_regmap_size);
    165  1.2.6.2  he 			goto try_io;
    166  1.2.6.2  he 		}
    167  1.2.6.2  he #ifdef NJSC32_DEBUG
    168  1.2.6.2  he 		printf("%s: memory space mapped\n", sc->sc_dev.dv_xname);
    169  1.2.6.2  he #endif
    170  1.2.6.2  he 		sc->sc_flags = NJSC32_MEM_MAPPED;
    171  1.2.6.2  he 	} else {
    172  1.2.6.2  he 	try_io:
    173  1.2.6.2  he 		if (pci_mapreg_map(pa, NJSC32_PCI_BASEADDR_IO,
    174  1.2.6.2  he 		    PCI_MAPREG_TYPE_IO, 0, &sc->sc_regt, &sc->sc_regh,
    175  1.2.6.2  he 		    NULL, &psc->sc_regmap_size) == 0) {
    176  1.2.6.2  he #ifdef NJSC32_DEBUG
    177  1.2.6.2  he 			printf("%s: io space mapped\n", sc->sc_dev.dv_xname);
    178  1.2.6.2  he #endif
    179  1.2.6.2  he 			sc->sc_flags = NJSC32_IO_MAPPED;
    180  1.2.6.2  he 		} else {
    181  1.2.6.2  he 			printf("%s: unable to map device registers\n",
    182  1.2.6.2  he 			    sc->sc_dev.dv_xname);
    183  1.2.6.2  he 			return;
    184  1.2.6.2  he 		}
    185  1.2.6.2  he 	}
    186  1.2.6.2  he 
    187  1.2.6.2  he 	sc->sc_dmat = pa->pa_dmat;
    188  1.2.6.2  he 
    189  1.2.6.2  he 	/* map interrupt */
    190  1.2.6.2  he 	if (pci_intr_map(pa, &ih)) {
    191  1.2.6.2  he 		printf("%s: couldn't map interrupt\n",
    192  1.2.6.2  he 		    sc->sc_dev.dv_xname);
    193  1.2.6.2  he 		return;
    194  1.2.6.2  he 	}
    195  1.2.6.2  he 
    196  1.2.6.2  he 	str_intr = pci_intr_string(pa->pa_pc, ih);
    197  1.2.6.2  he 	str_at = " at ";
    198  1.2.6.2  he 	if (str_intr == NULL)
    199  1.2.6.2  he 		str_at = str_intr = "";
    200  1.2.6.2  he 
    201  1.2.6.2  he 	/* setup interrupt handler */
    202  1.2.6.2  he 	if ((sc->sc_ih = pci_intr_establish(pc, ih, IPL_BIO, njsc32_intr, sc))
    203  1.2.6.2  he 	    == NULL) {
    204  1.2.6.2  he 		printf("%s: unable to establish interrupt%s%s\n",
    205  1.2.6.2  he 		    sc->sc_dev.dv_xname, str_at, str_intr);
    206  1.2.6.2  he 		return;
    207  1.2.6.2  he 	}
    208  1.2.6.2  he 	printf("%s: interrupting%s%s\n",
    209  1.2.6.2  he 		sc->sc_dev.dv_xname, str_at, str_intr);
    210  1.2.6.2  he 
    211  1.2.6.2  he 	/* attach */
    212  1.2.6.2  he 	njsc32_attach(sc);
    213  1.2.6.2  he }
    214  1.2.6.2  he 
    215  1.2.6.2  he static int
    216  1.2.6.2  he njs_pci_detach(struct device *self, int flags)
    217  1.2.6.2  he {
    218  1.2.6.2  he 	struct njsc32_pci_softc *psc = (void *) self;
    219  1.2.6.2  he 	struct njsc32_softc *sc = &psc->sc_njsc32;
    220  1.2.6.2  he 	int rv;
    221  1.2.6.2  he 
    222  1.2.6.2  he 	rv = njsc32_detach(sc, flags);
    223  1.2.6.2  he 	if (rv)
    224  1.2.6.2  he 		return rv;
    225  1.2.6.2  he 
    226  1.2.6.2  he 	if (sc->sc_ih)
    227  1.2.6.2  he 		pci_intr_disestablish(psc->sc_pc, sc->sc_ih);
    228  1.2.6.2  he 
    229  1.2.6.2  he 	if (sc->sc_flags & NJSC32_IO_MAPPED)
    230  1.2.6.2  he 		bus_space_unmap(sc->sc_regt, sc->sc_regh, psc->sc_regmap_size);
    231  1.2.6.2  he 	if (sc->sc_flags & NJSC32_MEM_MAPPED)
    232  1.2.6.2  he 		bus_space_unmap(sc->sc_regt, psc->sc_regmaph,
    233  1.2.6.2  he 		    psc->sc_regmap_size);
    234  1.2.6.2  he 
    235  1.2.6.2  he 	return 0;
    236  1.2.6.2  he }
    237