pci_map.c revision 1.4
1 /* $NetBSD: pci_map.c,v 1.4 1997/10/06 21:01:24 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1994, 1997 Charles M. Hannum. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Charles M. Hannum. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* 33 * PCI device mapping. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/device.h> 39 40 #include <dev/pci/pcireg.h> 41 #include <dev/pci/pcivar.h> 42 43 static int pci_io_find __P((pci_chipset_tag_t, pcitag_t, int, pcireg_t, 44 bus_addr_t *, bus_size_t *, int *)); 45 static int pci_mem_find __P((pci_chipset_tag_t, pcitag_t, int, pcireg_t, 46 bus_addr_t *, bus_size_t *, int *)); 47 48 static int 49 pci_io_find(pc, tag, reg, type, basep, sizep, flagsp) 50 pci_chipset_tag_t pc; 51 pcitag_t tag; 52 int reg; 53 pcireg_t type; 54 bus_addr_t *basep; 55 bus_size_t *sizep; 56 int *flagsp; 57 { 58 pcireg_t address, mask; 59 int s; 60 61 if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3)) 62 panic("pci_io_find: bad request"); 63 64 /* 65 * Section 6.2.5.1, `Address Maps', tells us that: 66 * 67 * 1) The builtin software should have already mapped the device in a 68 * reasonable way. 69 * 70 * 2) A device which wants 2^n bytes of memory will hardwire the bottom 71 * n bits of the address to 0. As recommended, we write all 1s and see 72 * what we get back. 73 */ 74 s = splhigh(); 75 address = pci_conf_read(pc, tag, reg); 76 pci_conf_write(pc, tag, reg, 0xffffffff); 77 mask = pci_conf_read(pc, tag, reg); 78 pci_conf_write(pc, tag, reg, address); 79 splx(s); 80 81 if (PCI_MAPREG_TYPE(address) != PCI_MAPREG_TYPE_IO) { 82 printf("pci_io_find: expected type i/o, found mem\n"); 83 return (1); 84 } 85 86 if (PCI_MAPREG_IO_SIZE(mask) == 0) { 87 printf("pci_io_find: void region\n"); 88 return (1); 89 } 90 91 if (basep != 0) 92 *basep = PCI_MAPREG_IO_ADDR(address); 93 if (sizep != 0) 94 *sizep = PCI_MAPREG_IO_SIZE(mask); 95 if (flagsp != 0) 96 *flagsp = 0; 97 98 return (0); 99 } 100 101 static int 102 pci_mem_find(pc, tag, reg, type, basep, sizep, flagsp) 103 pci_chipset_tag_t pc; 104 pcitag_t tag; 105 int reg; 106 pcireg_t type; 107 bus_addr_t *basep; 108 bus_size_t *sizep; 109 int *flagsp; 110 { 111 pcireg_t address, mask; 112 int s; 113 114 if (reg < PCI_MAPREG_START || reg >= PCI_MAPREG_END || (reg & 3)) 115 panic("pci_find_mem: bad request"); 116 117 /* 118 * Section 6.2.5.1, `Address Maps', tells us that: 119 * 120 * 1) The builtin software should have already mapped the device in a 121 * reasonable way. 122 * 123 * 2) A device which wants 2^n bytes of memory will hardwire the bottom 124 * n bits of the address to 0. As recommended, we write all 1s and see 125 * what we get back. 126 */ 127 s = splhigh(); 128 address = pci_conf_read(pc, tag, reg); 129 pci_conf_write(pc, tag, reg, 0xffffffff); 130 mask = pci_conf_read(pc, tag, reg); 131 pci_conf_write(pc, tag, reg, address); 132 splx(s); 133 134 if (PCI_MAPREG_TYPE(address) != PCI_MAPREG_TYPE_MEM) { 135 printf("pci_mem_find: expected type mem, found i/o\n"); 136 return (1); 137 } 138 if (PCI_MAPREG_MEM_TYPE(address) != PCI_MAPREG_MEM_TYPE(type)) { 139 printf("pci_mem_find: expected mem type %08x, found %08x\n", 140 PCI_MAPREG_MEM_TYPE(type), 141 PCI_MAPREG_MEM_TYPE(address)); 142 return (1); 143 } 144 145 if (PCI_MAPREG_MEM_SIZE(mask) == 0) { 146 printf("pci_mem_find: void region\n"); 147 return (1); 148 } 149 150 switch (PCI_MAPREG_MEM_TYPE(address)) { 151 case PCI_MAPREG_MEM_TYPE_32BIT: 152 case PCI_MAPREG_MEM_TYPE_32BIT_1M: 153 break; 154 case PCI_MAPREG_MEM_TYPE_64BIT: 155 printf("pci_mem_find: 64-bit memory mapping register\n"); 156 return (1); 157 default: 158 printf("pci_mem_find: reserved mapping register type\n"); 159 return (1); 160 } 161 162 if (basep != 0) 163 *basep = PCI_MAPREG_MEM_ADDR(address); 164 if (sizep != 0) 165 *sizep = PCI_MAPREG_MEM_SIZE(mask); 166 if (flagsp != 0) 167 *flagsp = PCI_MAPREG_MEM_CACHEABLE(address) ? 168 BUS_SPACE_MAP_CACHEABLE : 0; 169 170 return (0); 171 } 172 173 int 174 pci_mapreg_info(pc, tag, reg, type, basep, sizep, flagsp) 175 pci_chipset_tag_t pc; 176 pcitag_t tag; 177 int reg; 178 pcireg_t type; 179 bus_addr_t *basep; 180 bus_size_t *sizep; 181 int *flagsp; 182 { 183 184 if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) 185 return (pci_io_find(pc, tag, reg, type, basep, sizep, 186 flagsp)); 187 else 188 return (pci_mem_find(pc, tag, reg, type, basep, sizep, 189 flagsp)); 190 } 191 192 int 193 pci_mapreg_map(pa, reg, type, busflags, tagp, handlep, basep, sizep) 194 struct pci_attach_args *pa; 195 int reg, busflags; 196 pcireg_t type; 197 bus_space_tag_t *tagp; 198 bus_space_handle_t *handlep; 199 bus_addr_t *basep; 200 bus_size_t *sizep; 201 { 202 bus_space_tag_t tag; 203 bus_space_handle_t handle; 204 bus_addr_t base; 205 bus_size_t size; 206 int flags; 207 208 if (PCI_MAPREG_TYPE(type) == PCI_MAPREG_TYPE_IO) { 209 if ((pa->pa_flags & PCI_FLAGS_IO_ENABLED) == 0) 210 return (1); 211 if (pci_io_find(pa->pa_pc, pa->pa_tag, reg, type, &base, 212 &size, &flags)) 213 return (1); 214 tag = pa->pa_iot; 215 } else { 216 if ((pa->pa_flags & PCI_FLAGS_MEM_ENABLED) == 0) 217 return (1); 218 if (pci_mem_find(pa->pa_pc, pa->pa_tag, reg, type, &base, 219 &size, &flags)) 220 return (1); 221 tag = pa->pa_memt; 222 } 223 224 if (bus_space_map(tag, base, size, busflags | flags, &handle)) 225 return (1); 226 227 if (tagp != 0) 228 *tagp = tag; 229 if (handlep != 0) 230 *handlep = handle; 231 if (basep != 0) 232 *basep = base; 233 if (sizep != 0) 234 *sizep = size; 235 236 return (0); 237 } 238
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