| History log of /src/sys/dev/pci/pci_map.c |
| Revision | | Date | Author | Comments |
| 1.44 |
| 29-Dec-2020 |
skrll | KNF a comment
|
| 1.43 |
| 29-Dec-2020 |
skrll | More of the patch that adds support for Enhanced Allocations as seen in
the Cavium ThunderX based GIGABYTE MT30-GS2-00
From thorpej@. Thanks!
(botched the copying of this from a branch previously)
|
| 1.42 |
| 29-Dec-2020 |
skrll | Add support for Enhanced Allocations as seen in the Cavium ThunderX based
GIGABYTE MT30-GS2-00
From thorpej@. Thanks!
|
| 1.41 |
| 28-Dec-2020 |
skrll | Trailing whitespace
|
| 1.40 |
| 05-May-2020 |
bouyer | branches: 1.40.2;
disable I/O or mem decode before probing BAR size.
Bar size is probed writing 0xffffffff to the BAR and reading back; but while
doing this the decoding address is not guaranteed to be valid and could have
side effect.
Xen PVH enforces disabling decoding before writing to a BAR.
Proposed on tech-kern@, got positive comments
|
| 1.39 |
| 02-Dec-2019 |
riastradh | Leave it entirely up to the driver whether to map prefetchable.
We have only a few drivers that pass BUS_SPACE_MAP_PREFETCHABLE to
pci_mapreg_map -- dev/pci/if_hme_pci.c, dev/pci/igma.c,
dev/pci/radeonfb.c, dev/pci/wcfb.c -- and they all do it for ROM or
framebuffers.
Based on a subthread from macallan@ in the earlier discussion:
https://mail-index.NetBSD.org/tech-kern/2017/03/23/msg021685.html
The thrust is that:
- a driver not asking for prefetchable mappings shouldn't get it
- some devices are correctly used with prefetchable mappings, but for
some reason fail to set the prefetchable bit in the BAR
- nobody could identify any classes of device for which
(a) the driver asks for prefetchable mappings, but
(b) certain matching devices can't actually be used with
prefetchable mappings
This brings pci_mapreg_map in line with what the documentation says;
the documentation never advertised that the prefetchable bit in the
BAR could cause the bus_space mapping to be prefetchable.
|
| 1.38 |
| 02-Dec-2019 |
riastradh | Use BUS_SPACE_MAP_PREFETCHABLE only if BAR and driver agree on it.
- A driver that expects prefetchable memory and knows to issue the
needed bus_space_barrier calls can pass BUS_SPACE_MAP_PREFETCHABLE
to indicate a desire to map the memory prefetchable if the BAR
allows it.
(A driver that _really wants_ BUS_SPACE_MAP_PREFETCHABLE even if
the BAR claims _not_ to be prefetchable can use pci_mapreg_info and
bus_space_map explicitly -- this is not different from what we have
today.)
- For a driver that _does not_ expect prefetchable memory, the
appearance of the prefetchable bit in the BAR shouldn't cause it to
use BUS_SPACE_MAP_PREFETCHABLE, because the driver will not issue
the needed bus_space_barrier calls to get sensible results.
Note: `Prefetchable' here, sometimes called `write-combining', means
reads have no side effects, and writes are idempotent, so it is safe
to issue reads out of order and safe to combine writes.
Mappings with BUS_SPACE_MAP_PREFETCHABLE are often more weakly
ordered than normal memory -- e.g., on x86, in WC-type memory
regions, loads can be reordered with loads, stores can be reordered
with stores, which is not possible with any other type of memory
regions.
Discussed on tech-kern a while ago:
https://mail-index.NetBSD.org/tech-kern/2017/03/22/msg021678.html
This is option A, which received the most support. This should help
unconfuse drivers that do not expect prefetchable mappings, like
Yamaguchi-san tripped over recently:
https://mail-index.NetBSD.org/tech-kern/2019/12/02/msg025785.html
|
| 1.37 |
| 01-Mar-2019 |
msaitoh | No functional change:
- u_int* -> uint*
- KNF.
|
| 1.36 |
| 19-May-2018 |
jakllsch | branches: 1.36.2;
Re-enable PCI window decode enable in PCI Command Register upon
successful pci_mapreg_map().
Loosely related to PR #53286.
|
| 1.35 |
| 19-May-2018 |
jakllsch | Refine previous change to enable PCI window decoding in Command
Register upon mapping; conditionalize on a global variable, that is set
to true on x86 machines booting under EFI.
For now, initialize the global variable at compile time to false. This
is intended to limit potential problems for other NetBSD ports, should
this changeset be pulled up to netbsd-8.
Related to PR #53286.
|
| 1.34 |
| 16-May-2018 |
jakllsch | Enable the appropriate memory or I/O space decode in the PCI
Command/Status Register upon mapping a BAR.
This should fix PR #53286. It's also possible there are other similar
PRs that might be fixed by this.
|
| 1.33 |
| 17-Mar-2017 |
msaitoh | branches: 1.33.6; 1.33.12;
Modify some variables to make code more understandable.
|
| 1.32 |
| 26-Dec-2014 |
msaitoh | branches: 1.32.2; 1.32.4;
Fix a bug that ichlpcib(4) maps I/O area incorrectly and then fails to attach
gpio. It might also fix ACPI related problem described in PR#48960:
- The LPCIB_PCI_PMBASE and LPCIB_PCI_GPIO register are alike PCI BAR but not
completely compatible with it. It's ok because the registers' addresses are
out of BAR0-BAR5(0x10-0x24) and are located in the device-dependent header.
The PMBASE and GPIO registers define the base address and the type but not
describe the size. The size is fixed to 128bytes. So use
pci_mapreg_submap().
- Make pci_mapreg_submap() extern again.
- Fix the calculation of the map size in pci_mapreg_submap().
|
| 1.31 |
| 16-Oct-2014 |
riastradh | branches: 1.31.2;
Generalize pci_find_rom and use it to locate x86 video ROM in drm2.
- Make pci_find_rom take the ROM `BAR' size as a parameter, instead
of using pci_find_mem with the ROM `BAR' to detect the size.
- Use it to find the x86 video ROM in [0xc0000, 0xe0000) in drm2,
when nothing else reports that location.
- Adapt the one other caller in radeonfb, which already has the
maximum ROM size handy (romsz).
XXX pullup to netbsd-7
|
| 1.30 |
| 20-Oct-2012 |
matt | branches: 1.30.12;
Only probe the upper BAR of a mem64 BAR if bit 31 is readonly
|
| 1.29 |
| 17-May-2011 |
dyoung | branches: 1.29.4; 1.29.10; 1.29.14;
PCI_FLAGS_IO_ENABLED and PCI_FLAGS_MEM_ENABLED changed their functional
role in NetBSD (drivers are no longer supposed to write these to
pa_flags) without changing name. Correct that.
Rename PCI_FLAGS_IO_ENABLED to PCI_FLAGS_IO_OKAY and
PCI_FLAGS_MEM_ENABLED to PCI_FLAGS_MEM_OKAY, thus making their names
consistent with the other PCI flags and poisoning 3rd-party driver
sources that use the flags in the old bad way.
This patch produces no binary changes in this set of PCI kernels when
they are compiled w/o 'options DIAGNOSTIC' and w/ -V MKREPRO=yes:
algor P4032 P5064 P6032
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE
evbarm-el GUMSTIX HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321
evbarm-el IXDP425 IXM1200 KUROBOX_PRO
evbarm-el LUBBOCK MARVELL_NAS NAPPI NSLU2 SHEEVAPLUG SMDK2800 TEAMASA_NPWR
evbarm-el TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
evbppc OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
iyonix GENERIC
landisk GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sbmips-el GENERIC
sgimips GENERIC32_IP2x GENERIC32_IP3x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
|
| 1.28 |
| 04-Apr-2011 |
dyoung | Neither pci_dma64_available(), pci_probe_device(), pci_mapreg_map(9),
pci_find_rom(), pci_intr_map(9), pci_enumerate_bus(), nor the match
predicate passed to pciide_compat_intr_establish() should ever modify
their pci_attach_args argument, so make their pci_attach_args arguments
const and deal with the fallout throughout the kernel.
For the most part, these changes add a 'const' where there was no
'const' before, however, some drivers and MD code used to modify
pci_attach_args. Now those drivers either copy their pci_attach_args
and modify the copy, or refrain from modifying pci_attach_args:
Xen: according to Manuel Bouyer, writing to pci_attach_args in
pci_intr_map() was a leftover from Xen 2. Probably a bug. I
stopped writing it. I have not tested this change.
siside(4): sis_hostbr_match() needlessly wrote to pci_attach_args.
Probably a bug. I use a temporary variable. I have not tested this
change.
slide(4): sl82c105_chip_map() overwrote the caller's pci_attach_args.
Probably a bug. Use a local pci_attach_args. I have not tested
this change.
viaide(4): via_sata_chip_map() and via_sata_chip_map_new() overwrote the
caller's pci_attach_args. Probably a bug. Make a local copy of the
caller's pci_attach_args and modify the copy. I have not tested
this change.
While I'm here, make pci_mapreg_submap() static.
With these changes in place, I have tested the compilation of these
kernels:
alpha GENERIC
amd64 GENERIC XEN3_DOM0
arc GENERIC
atari HADES MILAN-PCIIDE
bebox GENERIC
cats GENERIC
cobalt GENERIC
evbarm-eb NSLU2
evbarm-el ADI_BRH ARMADILLO9 CP3100 GEMINI GEMINI_MASTER GEMINI_SLAVE GUMSTIX
HDL_G IMX31LITE INTEGRATOR IQ31244 IQ80310 IQ80321 IXDP425 IXM1200
KUROBOX_PRO LUBBOCK MARVELL_NAS NAPPI SHEEVAPLUG SMDK2800 TEAMASA_NPWR
TEAMASA_NPWR_FC TS7200 TWINTAIL ZAO425
evbmips-el AP30 DBAU1500 DBAU1550 MALTA MERAKI MTX-1 OMSAL400 RB153 WGT624V3
evbmips64-el XLSATX
evbppc EV64260 MPC8536DS MPC8548CDS OPENBLOCKS200 OPENBLOCKS266
OPENBLOCKS266_OPT P2020RDB PMPPC RB800 WALNUT
hp700 GENERIC
i386 ALL XEN3_DOM0 XEN3_DOMU
ibmnws GENERIC
macppc GENERIC
mvmeppc GENERIC
netwinder GENERIC
ofppc GENERIC
prep GENERIC
sandpoint GENERIC
sgimips GENERIC32_IP2x
sparc GENERIC_SUN4U KRUPS
sparc64 GENERIC
As of Sun Apr 3 15:26:26 CDT 2011, I could not compile these kernels
with or without my patches in place:
### evbmips-el GDIUM
nbmake: nbmake: don't know how to make /home/dyoung/pristine-nbsd/src/sys/arch/mips/mips/softintr.c. Stop
### evbarm-el MPCSA_GENERIC
src/sys/arch/evbarm/conf/MPCSA_GENERIC:318: ds1672rtc*: unknown device `ds1672rtc'
### ia64 GENERIC
/tmp/genassym.28085/assym.c: In function 'f111':
/tmp/genassym.28085/assym.c:67: error: invalid application of 'sizeof' to incomplete type 'struct pcb'
/tmp/genassym.28085/assym.c:76: error: dereferencing pointer to incomplete type
### sgimips GENERIC32_IP3x
crmfb.o: In function `crmfb_attach':
crmfb.c:(.text+0x2304): undefined reference to `ddc_read_edid'
crmfb.c:(.text+0x2304): relocation truncated to fit: R_MIPS_26 against `ddc_read_edid'
crmfb.c:(.text+0x234c): undefined reference to `edid_parse'
crmfb.c:(.text+0x234c): relocation truncated to fit: R_MIPS_26 against `edid_parse'
crmfb.c:(.text+0x2354): undefined reference to `edid_print'
crmfb.c:(.text+0x2354): relocation truncated to fit: R_MIPS_26 against `edid_print'
|
| 1.27 |
| 27-Feb-2011 |
jmcneill | revert previous; instead of commenting out the error message how about fixing
the code that causes it to be printed in the first place
|
| 1.26 |
| 27-Feb-2011 |
jruoho | Remove the following aprint_debug(9): "pci_mem_find: void region". I have
a system where this is printed about a hundred times. No functional change.
|
| 1.25 |
| 11-May-2010 |
dyoung | branches: 1.25.2;
Cosmetic: remove superfluous parentheses from return statements. Don't
test truth of pointers, or compare with 0, but compare with NULL,
instead.
The compiler generated the same assembly language before & after this
change.
|
| 1.24 |
| 22-Jul-2008 |
bjs | branches: 1.24.4; 1.24.12; 1.24.14; 1.24.16;
Add pci_mapreg_submap(): This function is pci_mapreg_map() with two
additional arguments, offset and maxsize. This new functionality
eases handling certain tasks within the direct rendering manager, though
I hope others will also find it useful.
pci_mapreg_map() is now merely a wrapper around pci_mapreg_submap();
the latter contains all of the code from the former.
ok christos@
|
| 1.23 |
| 28-Apr-2008 |
martin | branches: 1.23.2; 1.23.4; 1.23.6;
Remove clause 3 and 4 from TNF licenses
|
| 1.22 |
| 01-Dec-2007 |
jmcneill | branches: 1.22.14; 1.22.16; 1.22.18;
aprintify
|
| 1.21 |
| 20-Nov-2007 |
joerg | Merge from jmcneill-pm: XXX allow pci_find_mem to map a 64-bit BAR.
|
| 1.20 |
| 10-Apr-2007 |
macallan | branches: 1.20.8; 1.20.10; 1.20.14; 1.20.16;
turn the other 'void region' message into aprint_debug() as well
|
| 1.19 |
| 10-Apr-2007 |
macallan | demote 'pci_io_find: void region' to aprint_debug()
|
| 1.18 |
| 16-Nov-2006 |
christos | branches: 1.18.2; 1.18.4; 1.18.8; 1.18.10; 1.18.14;
__unused removal on arguments; approved by core.
|
| 1.17 |
| 12-Oct-2006 |
christos | - sprinkle __unused on function decls.
- fix a couple of unused bugs
- no more -Wno-unused for i386
|
| 1.16 |
| 01-Mar-2006 |
gdamore | branches: 1.16.14; 1.16.16;
Add pci_find_rom() API as discussed on tech-kern.
|
| 1.15 |
| 27-Feb-2006 |
gdamore | Add PCI_MAPREG_TYPE_ROM and allow it to be used with pci_mapreg_map().
Fix to configure (but do not enable) BARs for expansion ROMs.
Reviewed by briggs@
|
| 1.14 |
| 11-Dec-2005 |
christos | branches: 1.14.2; 1.14.4; 1.14.6;
merge ktrace-lwp.
|
| 1.13 |
| 27-Feb-2005 |
perry | branches: 1.13.4;
nuke trailing whitespace
|
| 1.12 |
| 30-May-2002 |
drochner | branches: 1.12.6; 1.12.14; 1.12.16;
implement a check whether a BAR is present at all at a given configuration
space address and use it where the mappings of the VGA card are registered
before descenting too deep into "memory" type specific code
(pci_mem_find() gets noisy if it doesn't like the register)
|
| 1.11 |
| 29-May-2002 |
bouyer | When testing for a void region, use PCI_MAPREG_MEM_SIZE() for 32bit memaddr.
If the 32bit mask read is 0, wmask will be 0xffffffff00000000, and
PCI_MAPREG_MEM64_SIZE() won't make this 0.
|
| 1.10 |
| 13-Nov-2001 |
lukem | branches: 1.10.8; 1.10.10;
add RCSID
|
| 1.9 |
| 29-Nov-2000 |
thorpej | branches: 1.9.2; 1.9.4;
ANSI'ify.
|
| 1.8 |
| 28-Jun-2000 |
thorpej | Don't check for a BAR address past PCI_MAPREG_END; some devices
have BARs way out in left field.
|
| 1.7 |
| 10-May-2000 |
thorpej | branches: 1.7.4;
Add support for mapping 64-bit PCI memory space. If the region
is mapped in a way that is inaccessible by a 32-bit bus_addr_t, then
print a message to that effect and return failure.
Original patches by Bill Studenmund, with a few small changes by me.
|
| 1.6 |
| 25-Jan-2000 |
drochner | use BUS_SPACE_MAP_PREFETCHABLE instead BUS_SPACE_MAP_CACHEABLE where the
PCI BAR bit is referred to
|
| 1.5 |
| 15-Aug-1998 |
mycroft | branches: 1.5.12;
Assign my copyrights to TNF.
|
| 1.4 |
| 06-Oct-1997 |
thorpej | Back out last change. (Partially my fault, for not reviewing it close
enough.)
|
| 1.3 |
| 03-Oct-1997 |
lonhyn | pci_mapreg_info() has been changed to take arguments like pci_mapreg_map()
|
| 1.2 |
| 23-Sep-1997 |
mycroft | If the region size turns out to be 0, return an error. This is what will
happen if we try to use a mapping register that's not actually defined.
|
| 1.1 |
| 30-Aug-1997 |
mycroft | branches: 1.1.2;
* Rewrite pci_io_find() and pci_mem_find() using my original pci_map_io() and
pci_map_mem(), with appropriate changes for bus_space.
* Add extra arguments for use by pci_mapreg_*(), and make the functions
static.
* Rewrite pci_mapreg_info() and pci_mapreg_map() as wrappers around
pci_*_find(), using the documented interface.
|
| 1.1.2.3 |
| 29-Sep-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.1.2.2 |
| 01-Sep-1997 |
thorpej | Update marc-pcmcia branch from trunk.
|
| 1.1.2.1 |
| 30-Aug-1997 |
thorpej | file pci_map.c was added on branch marc-pcmcia on 1997-09-01 20:29:44 +0000
|
| 1.5.12.2 |
| 08-Dec-2000 |
bouyer | Sync with HEAD.
|
| 1.5.12.1 |
| 20-Nov-2000 |
bouyer | Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
|
| 1.7.4.1 |
| 28-Jun-2000 |
thorpej | Pull up rev. 1.8:
Don't check for a BAR address past PCI_MAPREG_END; some devices
have BARs way out in left field.
|
| 1.9.4.2 |
| 23-Jun-2002 |
jdolecek | catch up with -current on kqueue branch
|
| 1.9.4.1 |
| 10-Jan-2002 |
thorpej | Sync kqueue branch with -current.
|
| 1.9.2.2 |
| 20-Jun-2002 |
nathanw | Catch up to -current.
|
| 1.9.2.1 |
| 14-Nov-2001 |
nathanw | Catch up to -current.
|
| 1.10.10.1 |
| 10-Oct-2003 |
tron | Pull up revision 1.11 (requested by kleink in ticket #1513):
When testing for a void region, use PCI_MAPREG_MEM_SIZE() for 32bit memaddr.
If the 32bit mask read is 0, wmask will be 0xffffffff00000000, and
PCI_MAPREG_MEM64_SIZE() won't make this 0.
|
| 1.10.8.2 |
| 20-Jun-2002 |
gehenna | catch up with -current.
|
| 1.10.8.1 |
| 30-May-2002 |
gehenna | Catch up with -current.
|
| 1.12.16.1 |
| 19-Mar-2005 |
yamt | sync with head. xen and whitespace. xen part is not finished.
|
| 1.12.14.1 |
| 29-Apr-2005 |
kent | sync with -current
|
| 1.12.6.1 |
| 04-Mar-2005 |
skrll | Sync with HEAD.
Hi Perry!
|
| 1.13.4.3 |
| 07-Dec-2007 |
yamt | sync with head
|
| 1.13.4.2 |
| 03-Sep-2007 |
yamt | sync with head.
|
| 1.13.4.1 |
| 21-Jun-2006 |
yamt | sync with head.
|
| 1.14.6.1 |
| 22-Apr-2006 |
simonb | Sync with head.
|
| 1.14.4.1 |
| 09-Sep-2006 |
rpaulo | sync with head
|
| 1.14.2.1 |
| 01-Mar-2006 |
yamt | sync with head.
|
| 1.16.16.2 |
| 10-Dec-2006 |
yamt | sync with head.
|
| 1.16.16.1 |
| 22-Oct-2006 |
yamt | sync with head
|
| 1.16.14.1 |
| 18-Nov-2006 |
ad | Sync with head.
|
| 1.18.14.1 |
| 03-Jun-2008 |
skrll | Sync with netbsd-4.
|
| 1.18.10.1 |
| 11-Jul-2007 |
mjf | Sync with head.
|
| 1.18.8.1 |
| 10-Apr-2007 |
ad | Sync with head.
|
| 1.18.4.1 |
| 15-Apr-2007 |
yamt | sync with head.
|
| 1.18.2.1 |
| 17-May-2008 |
bouyer | Pull up following revision(s) (requested by sborrill in ticket #1142):
sys/dev/pci/pci_map.c: revision 1.21
allow pci_find_mem to map a 64-bit BAR.
|
| 1.20.16.1 |
| 08-Dec-2007 |
mjf | Sync with HEAD.
|
| 1.20.14.1 |
| 21-Nov-2007 |
bouyer | Sync with HEAD
|
| 1.20.10.1 |
| 09-Jan-2008 |
matt | sync with HEAD
|
| 1.20.8.3 |
| 01-Dec-2007 |
jmcneill | Sync with HEAD.
|
| 1.20.8.2 |
| 20-Nov-2007 |
joerg | Change the XXX to actually explain what it is doing.
|
| 1.20.8.1 |
| 27-Aug-2007 |
jmcneill | XXX allow pci_find_mem to map a 64-bit BAR, needs revisiting.
|
| 1.22.18.3 |
| 11-Aug-2010 |
yamt | sync with head.
|
| 1.22.18.2 |
| 04-May-2009 |
yamt | sync with head.
|
| 1.22.18.1 |
| 16-May-2008 |
yamt | sync with head.
|
| 1.22.16.1 |
| 18-May-2008 |
yamt | sync with head.
|
| 1.22.14.2 |
| 28-Sep-2008 |
mjf | Sync with HEAD.
|
| 1.22.14.1 |
| 02-Jun-2008 |
mjf | Sync with HEAD.
|
| 1.23.6.1 |
| 19-Oct-2008 |
haad | Sync with HEAD.
|
| 1.23.4.1 |
| 28-Jul-2008 |
simonb | Sync with head.
|
| 1.23.2.1 |
| 18-Sep-2008 |
wrstuden | Sync with wrstuden-revivesa-base-2.
|
| 1.24.16.3 |
| 31-May-2011 |
rmind | sync with head
|
| 1.24.16.2 |
| 21-Apr-2011 |
rmind | sync with head
|
| 1.24.16.1 |
| 30-May-2010 |
rmind | sync with head
|
| 1.24.14.1 |
| 17-Aug-2010 |
uebayasi | Sync with HEAD.
|
| 1.24.12.1 |
| 03-Jan-2012 |
matt | Only probe the upper BAR of a mem64 if the bit31 of the lower BAR isn't
writable.
|
| 1.24.4.1 |
| 23-Jan-2015 |
martin | Pull up the following changes, requested by msaitoh in ticket #1942:
sys/arch/x86/pci/ichlpcib.c 1.40, 1.45 via patch
sys/dev/ic/i82801lpcreg.h 1.12
sys/dev/pci/pci_map.c 1.32 via patch
- Fix a bug that ichlpcib(4) maps I/O area incorrectly. It might also
fixes ACPI related problem described in PR#48960:
- The LPCIB_PCI_PMBASE and LPCIB_PCI_GPIO register are alike PCI BAR
but not completely compatible with it. It's ok because the
registers' addresses are out of BAR0-BAR5(0x10-0x24) and are
located in the device-dependent header. The PMBASE and GPIO
registers define the base address and the type but not describe
the size. The size is fixed to 128bytes. So use
pci_mapreg_submap().
- Fix the calculation of the map size in pci_mapreg_submap().
- Use '\n' at the end of aprint_error_dev() format strings.
|
| 1.25.2.1 |
| 06-Jun-2011 |
jruoho | Sync with HEAD.
|
| 1.29.14.2 |
| 03-Dec-2017 |
jdolecek | update from HEAD
|
| 1.29.14.1 |
| 20-Nov-2012 |
tls | Resync to 2012-11-19 00:00:00 UTC
|
| 1.29.10.1 |
| 16-Jan-2015 |
snj | Pull up following revision(s) (requested by msaitoh in ticket #1229):
sys/arch/x86/pci/ichlpcib.c: revision 1.40, 1.45
sys/dev/pci/pcivar.h: revision 1.101
sys/dev/pci/pci_map.c: revision 1.32
sys/dev/ic/i82801lpcreg.h: revision 1.12
Use '\n' at the end of all aprint_error_dev() format strings.
--
Fix a bug that ichlpcib(4) maps I/O area incorrectly and then fails to attach
gpio. It might also fixes ACPI related problem described in PR#48960:
- The LPCIB_PCI_PMBASE and LPCIB_PCI_GPIO register are alike PCI BAR but not
completely compatible with it. It's ok because the registers' addresses are
out of BAR0-BAR5(0x10-0x24) and are located in the device-dependent header.
The PMBASE and GPIO registers define the base address and the type but not
describe the size. The size is fixed to 128bytes. So use
pci_mapreg_submap().
- Make pci_mapreg_submap() extern again.
- Fix the calculation of the map size in pci_mapreg_submap().
|
| 1.29.4.1 |
| 30-Oct-2012 |
yamt | sync with head
|
| 1.30.12.2 |
| 08-Jan-2015 |
martin | Pull up following revision(s) (requested by msaitoh in ticket #394):
sys/dev/pci/pcivar.h: revision 1.101
sys/dev/pci/pci_map.c: revision 1.32
sys/dev/ic/i82801lpcreg.h: revision 1.12
sys/arch/x86/pci/ichlpcib.c: revision 1.45
Fix a bug that ichlpcib(4) maps I/O area incorrectly and then fails to attach
gpio. It might also fix ACPI related problem described in PR#48960:
- The LPCIB_PCI_PMBASE and LPCIB_PCI_GPIO register are alike PCI BAR but not
completely compatible with it. It's ok because the registers' addresses are
out of BAR0-BAR5(0x10-0x24) and are located in the device-dependent header.
The PMBASE and GPIO registers define the base address and the type but not
describe the size. The size is fixed to 128bytes. So use
pci_mapreg_submap().
- Make pci_mapreg_submap() extern again.
- Fix the calculation of the map size in pci_mapreg_submap().
|
| 1.30.12.1 |
| 17-Oct-2014 |
martin | Pull up following revision(s) (requested by riastradh in ticket #144):
sys/dev/pci/radeonfb.c: revision 1.85
sys/dev/pci/pcivar.h: revision 1.100
sys/dev/pci/pci_map.c: revision 1.31
sys/external/bsd/drm2/include/linux/pci.h: revision 1.9
Generalize pci_find_rom and use it to locate x86 video ROM in drm2.
- Make pci_find_rom take the ROM `BAR' size as a parameter, instead
of using pci_find_mem with the ROM `BAR' to detect the size.
- Use it to find the x86 video ROM in [0xc0000, 0xe0000) in drm2,
when nothing else reports that location.
- Adapt the one other caller in radeonfb, which already has the
maximum ROM size handy (romsz).
XXX pullup to netbsd-7
|
| 1.31.2.2 |
| 28-Aug-2017 |
skrll | Sync with HEAD
|
| 1.31.2.1 |
| 06-Apr-2015 |
skrll | Sync with HEAD
|
| 1.32.4.1 |
| 21-Apr-2017 |
bouyer | Sync with HEAD
|
| 1.32.2.1 |
| 20-Mar-2017 |
pgoyette | Sync with HEAD
|
| 1.33.12.1 |
| 21-May-2018 |
pgoyette | Sync with HEAD
|
| 1.33.6.1 |
| 07-Jun-2018 |
martin | Pull up following revision(s) (requested by jakllsch in ticket #832):
sys/dev/pci/pcivar.h: revision 1.112
sys/dev/pci/pci_map.c: revision 1.34,1.35
sys/arch/x86/x86/efi.c: revision 1.15
Enable the appropriate memory or I/O space decode in the PCI
Command/Status Register upon mapping a BAR.
This should fix PR #53286. It's also possible there are other similar
PRs that might be fixed by this.
-
Refine previous change to enable PCI window decoding in Command
Register upon mapping; conditionalize on a global variable, that is set
to true on x86 machines booting under EFI.
For now, initialize the global variable at compile time to false. This
is intended to limit potential problems for other NetBSD ports, should
this changeset be pulled up to netbsd-8.
Related to PR #53286.
|
| 1.36.2.2 |
| 08-Apr-2020 |
martin | Merge changes from current as of 20200406
|
| 1.36.2.1 |
| 10-Jun-2019 |
christos | Sync with HEAD
|
| 1.40.2.1 |
| 03-Jan-2021 |
thorpej | Sync w/ HEAD.
|
