pciide_apollo_reg.h revision 1.5 1 /* $NetBSD: pciide_apollo_reg.h,v 1.5 2000/01/18 13:30:32 bouyer Exp $ */
2
3 /*
4 * Copyright (c) 1998 Manuel Bouyer.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by the University of
17 * California, Berkeley and its contributors.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 */
35
36 /*
37 * Registers definitions for VIA technologies's Apollo controllers (VT82V580VO,
38 * VT82C586A and VT82C586B). Available from http://www.via.com.tw/ or
39 * http://www.viatech.com/
40 */
41
42 /* misc. configuration registers */
43 #define APO_IDECONF 0x40
44 #define APO_IDECONF_EN(channel) (0x00000001 << (1 - (channel)))
45 #define APO_IDECONF_SERR_EN 0x00000100 /* 580 only */
46 #define APO_IDECONF_DS_SOURCE 0x00000200 /* 580 only */
47 #define APO_IDECONF_ALT_INTR_EN 0x00000400 /* 580 only */
48 #define APO_IDECONF_PERR_EN 0x00000800 /* 580 only */
49 #define APO_IDECONF_WR_BUFF_EN(channel) (0x00001000 << ((1 - (channel)) << 1))
50 #define APO_IDECONF_RD_PREF_EN(channel) (0x00002000 << ((1 - (channel)) << 1))
51 #define APO_IDECONF_DEVSEL_TME 0x00010000 /* 580 only */
52 #define APO_IDECONF_MAS_CMD_MON 0x00020000 /* 580 only */
53 #define APO_IDECONF_IO_NAT(channel) \
54 (0x00400000 << (1 - (channel))) /* 580 only */
55 #define APO_IDECONF_FIFO_TRSH(channel, x) \
56 ((x) & 0x3) << ((1 - (channel)) << 1 + 24)
57 #define APO_IDECONF_FIFO_CONF_MASK 0x60000000
58
59 /* Misc. controls register */
60 #define APO_CTLMISC 0x44
61 #define APO_CTLMISC_BM_STS_RTY 0x00000008
62 #define APO_CTLMISC_FIFO_HWS 0x00000010
63 #define APO_CTLMISC_WR_IRDY_WS 0x00000020
64 #define APO_CTLMISC_RD_IRDY_WS 0x00000040
65 #define APO_CTLMISC_INTR_SWP 0x00004000
66 #define APO_CTLMISC_DRDY_TIME_MASK 0x00030000
67 #define APO_CTLMISC_FIFO_FLSH_RD(channel) (0x00100000 << (1 - (channel)))
68 #define APO_CTLMISC_FIFO_FLSH_DMA(channel) (0x00400000 << (1 - (channel)))
69
70 /* data port timings controls */
71 #define APO_DATATIM 0x48
72 #define APO_DATATIM_MASK(channel) (0xffff << ((1 - (channel)) << 4))
73 #define APO_DATATIM_RECOV(channel, drive, x) (((x) & 0xf) << \
74 (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
75 #define APO_DATATIM_PULSE(channel, drive, x) (((x) & 0xf) << \
76 (((1 - (channel)) << 4) + ((1 - (drive)) << 3) + 4))
77
78 /* misc timings control */
79 #define APO_MISCTIM 0x4c
80
81 /* Ultra-DMA/33 control (586A/B only) */
82 #define APO_UDMA 0x50
83 #define AP0_UDMA_MASK(channel) (0xffff << ((1 - (channel)) << 4))
84 #define APO_UDMA_TIME(channel, drive, x) (((x) & 0x3) << \
85 (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
86 #define APO_UDMA_PIO_MODE(channel, drive) (0x20 << \
87 (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
88 #define APO_UDMA_EN(channel, drive) (0x40 << \
89 (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
90 #define APO_UDMA_EN_MTH(channel, drive) (0x80 << \
91 (((1 - (channel)) << 4) + ((1 - (drive)) << 3)))
92
93 static int8_t apollo_udma_tim[] = {0x03, 0x02, 0x00};
94 static int8_t apollo_pio_set[] = {0x0a, 0x0a, 0x0a, 0x02, 0x02};
95 static int8_t apollo_pio_rec[] = {0x08, 0x08, 0x08, 0x02, 0x00};
96