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History log of /src/sys/dev/pci/pciide_apollo_reg.h
RevisionDateAuthorComments
 1.21  03-Apr-2025  andvar viaide(4): Add support for VIA VT6415/VT6330 single-channel IDE controllers.

Beyond adding the usual identification code, several adjustments were required:

1) Introduced 'single_channel` to set 'nchannels` to 1 for this controller.

2) Added 'APO_IDECONF_ALWAYS_EN` definition and the 'no_ideconf` flag to mimic
enabled channel bits, as this controller's enable chip register is unset.
Applied the same to VT6410, following OpenBSD and Linux, since some
controllers are known to not set this register as well.

3) Combined all VIA controllers identified by PCI ID (not ISA bus) using switch
fallthrough, as they currently share the same UDMA setting. Consequently,
the VX900 name printing was moved to the device description and adjusted
to better reflect the device.

4) Moved setting interface bits for RAID controllers under the RAID capability
check, enabling the above fallthrough and paving the way for support of other
RAID-capable controllers in upcoming changes.

5) The VT6330 is a combo FireWire/IDE controller. Added its FireWire controller
PCI ID to pcidevs.

Tested on ASRock P5B-DE.

Reviewed by jak and bad.

Addresses PR kern/45917
 1.20  10-Jul-2011  jakllsch branches: 1.20.60; 1.20.86;
Add complete support for all channels on VT6421A SATA/PATA controller to
viaide(4).
 1.19  30-Jun-2011  wiz dependant -> dependent
 1.18  19-Oct-2009  bouyer Remove closes 3 & 4 from my licence. Lots of thanks to Soren Jacobsen
for the booring work !
 1.17  25-Dec-2007  perry branches: 1.17.10;
Convert many of the uses of __attribute__ to equivalent
__packed, __unused and __dead macros from cdefs.h
 1.16  11-Dec-2005  christos branches: 1.16.46; 1.16.52; 1.16.56; 1.16.60;
merge ktrace-lwp.
 1.15  27-Feb-2005  perry branches: 1.15.4;
nuke trailing whitespace
 1.14  08-Oct-2003  bouyer branches: 1.14.8; 1.14.10;
Split pciide in per-chip family driver, as proposed in
http://mail-index.netbsd.org/tech-kern/2003/09/25/0007.html
We now have:
acardide* at pci? dev ? function ? # Acard IDE controllers
aceride* at pci? dev ? function ? # Acer Lab IDE controllers
cmdide* at pci? dev ? function ? # CMD tech IDE controllers
cypide* at pci? dev ? function ? # Cypress IDE controllers
hptide* at pci? dev ? function ? # Triones/HighPoint IDE controllers
optiide* at pci? dev ? function ? # Opti IDE controllers
piixide* at pci? dev ? function ? # Intel IDE controllers
pdcide* at pci? dev ? function ? # Promise IDE controllers
siside* at pci? dev ? function ? # SiS IDE controllers
slide* at pci? dev ? function ? # Symphony Labs IDE controllers
viaide* at pci? dev ? function ? # VIA/AMD/Nvidia IDE controllers
pciide* at pci? dev ? function ? flags 0x0000 # GENERIC pciide driver

serverworks driver not commited yet; there are still copyright issues about
it.
 1.13  05-Oct-2003  bouyer Remove references to University of California from my copyright notices.
 1.12  25-Aug-2002  bouyer branches: 1.12.6;
Correct setup for Ultra133 capable VIA chipsets, From Matthias Drochner
on current-users, with cross-check and some improvement from linux-2.4.19
and FreeBSD-current.
Also don't set the APO_UDMA_CLK66 bit for Ultra/100 capable chipset, and
support Ultra/133 for the VT8233A.
 1.11  23-Apr-2002  bouyer branches: 1.11.2; 1.11.4;
More copyright fixes, pointed out by Thomas. Thanks !
 1.10  21-Oct-2001  thorpej Make the various timing, etc. tables const, and add the __unused__
attribute to them, just in case something other than the pciide driver
proper needs to pull in the header.
 1.9  04-May-2001  bouyer branches: 1.9.2;
Better support for VIA chipsets: look at the product/rev ID of the ISA bridge
to guess the pciide capabilities, rather than trying to guess it by ourselve.
Add preliminary support for the 686b (Ultra/100) guessed from FreeBSD/linux
driver (datasheet not publically available, I contacted via).
Let chip-specific map routine do the autoconf printf if ide_name is NULL
(they may have more details about the controller than we have in pciide_attach)
 1.8  05-Jan-2001  bouyer branches: 1.8.2;
Run at Ultra/66 on VIA controllers that can do it. PCI vendor/device/revision
is the same for the Ultra/33 and Ultra/66 version, so test writability of
the U66 enable bit (idea from Chris Cappuccio).
Thanks to David Carrel for testings.
 1.7  29-Dec-2000  tsutsui s/AP0_UDMA_MASK/APO_UDMA_MASK/
 1.6  15-May-2000  bouyer branches: 1.6.4;
Sync my copyrigth notice.
 1.5  18-Jan-2000  bouyer Correct URLs.
 1.4  16-Dec-1998  bouyer branches: 1.4.2; 1.4.8;
Rearange the modes setup to allow these to be dyanmically changed. Fill
in the new "set_mode" callback.
 1.3  19-Oct-1998  bouyer Fix a comment.
 1.2  12-Oct-1998  bouyer Merge bouyer-ide
 1.1  25-Jun-1998  bouyer branches: 1.1.2;
file pciide_apollo_reg.h was initially added on branch bouyer-ide.
 1.1.2.1  25-Jun-1998  bouyer Add support for VIA's apollo VP chipset.
 1.4.8.3  18-Jan-2001  bouyer Sync with head (for UBC+NFS fixes, mostly).
 1.4.8.2  05-Jan-2001  bouyer Sync with HEAD
 1.4.8.1  20-Nov-2000  bouyer Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
 1.4.2.1  07-Jul-2000  he Apply patch (requested by bouyer):
Add support for the following PCIIDE controllers:
o AMD 756
o CMD PCI0648 and PCI0649
o Hightpoint HPT366
o OPTi 82c621 (and a few of its derivatives)
o Promise Ultra/33 and Ultra/66
o Intel 82801 (ICH/ICH0)
Also fix PR#10437 (detect more ATAPI devices).
 1.6.4.2  15-May-2001  he Pull up revision 1.9 (via patch, requested by bouyer):
Add support for newer VIA pciide controllers.
Add support for the AMD 766 pciide controller.
Properly distinguish between HPT366 and HPT370 controllers.
 1.6.4.1  04-Feb-2001  he Pull up revision 1.8 (requested by bouyer):
Run at Ultra/66 on VIA controllers that can do it.
 1.8.2.4  27-Aug-2002  nathanw Catch up to -current.
 1.8.2.3  20-Jun-2002  nathanw Catch up to -current.
 1.8.2.2  22-Oct-2001  nathanw Catch up to -current.
 1.8.2.1  21-Jun-2001  nathanw Catch up to -current.
 1.9.2.3  06-Sep-2002  jdolecek sync kqueue branch with HEAD
 1.9.2.2  23-Jun-2002  jdolecek catch up with -current on kqueue branch
 1.9.2.1  10-Jan-2002  thorpej Sync kqueue branch with -current.
 1.11.4.1  01-Nov-2002  tron Pull up revision 1.12 (requested by bouyer in ticket #727):
Correct setup for Ultra133 capable VIA chipsets, From Matthias Drochner
on current-users, with cross-check and some improvement from linux-2.4.19
and FreeBSD-current.
Also don't set the APO_UDMA_CLK66 bit for Ultra/100 capable chipset, and
support Ultra/133 for the VT8233A.
 1.11.2.1  29-Aug-2002  gehenna catch up with -current.
 1.12.6.4  04-Mar-2005  skrll Sync with HEAD.

Hi Perry!
 1.12.6.3  21-Sep-2004  skrll Fix the sync with head I botched.
 1.12.6.2  18-Sep-2004  skrll Sync with HEAD.
 1.12.6.1  03-Aug-2004  skrll Sync with HEAD
 1.14.10.1  19-Mar-2005  yamt sync with head. xen and whitespace. xen part is not finished.
 1.14.8.1  29-Apr-2005  kent sync with -current
 1.15.4.1  21-Jan-2008  yamt sync with head
 1.16.60.1  02-Jan-2008  bouyer Sync with HEAD
 1.16.56.1  26-Dec-2007  ad Sync with head.
 1.16.52.1  18-Feb-2008  mjf Sync with HEAD.
 1.16.46.1  09-Jan-2008  matt sync with HEAD
 1.17.10.1  11-Mar-2010  yamt sync with head
 1.20.86.1  09-May-2025  martin Pull up following revision(s) (requested by andvar in ticket #1101):

sys/dev/pci/viaide.c: revision 1.90
sys/dev/pci/ahcisata_pci.c: revision 1.72
sys/dev/pci/pciide_apollo_reg.h: revision 1.21
sys/dev/pci/viaide.c: revision 1.91
sys/dev/pci/viaide.c: revision 1.92
sys/dev/pci/viaide.c: revision 1.93
sys/dev/pci/viaide.c: revision 1.94
sys/dev/pci/viaide.c: revision 1.96
sys/dev/pci/viaide.c: revision 1.97
sys/dev/pci/viaide.c: revision 1.98
share/man/man4/viaide.4: revision 1.11
share/man/man4/viaide.4: revision 1.12

Use the chipset name to describe the IDE controller in order to avoid confusion.
VT800->VX800 and VT855->VX855.
Add VIA VT8261 southbridge SATA controller IDs and PCIB.
viaide(4): use via_chip_map() instead of via_sata_chip_map_new() to attach
CX700/VX800 IDE/SATA RAID controllers and set interface flags the same way as
the VT6410_RAID case for native interrupts required by RAID mode.
Device descriptions were moved to pciide_via_products and updated to cascade
VT6410_RAID and CX700_IDE options.
via_sata_chip_map_new previously worked more by "accident," as it did not
return early on failure to map SATA registers and defaulted to the generic
drive probe function. However, it failed to attach PATA drives (endless
timeouts) and incorrectly detected "three" channels as VT6421, despite the
controller having only two.
Fixes PR kern/59010.
Reviewed and approved by jakllsch@.

Update CX700_IDE and CX700M2_IDE descriptions to better reflect their actual
purpose.
These are not separate IDE controllers for CX700 and CX700M2 but rather the
IDE and RAID modes of the same controller in these chipsets (and few more).
viaide(4): check and add ATA RAID capability in via_sata_chip_map_new() used
by VT6241(A) RAID controller.
This is required for ataraid(4) to attach on this controller if RAID was
configured using its firwmare.
The conditions may be redundant for this controller, but it is uncertain what
variations exist in the wild.

viaide(4): add IDE controller identification by the VT8237S ISA bridge.
The controller's PATA interface uses PCI ID 0x0571, which is shared among
many VIA southbridges. The ISA bridge is used to identify capabilities,
including for the VT8237S.
Unknown PATA controllers disable UDMA by default. This change ensures PATA
drives attach at full speed.

viaide(4): Add support for VIA VT8261 IDE/SATA integrated controller.

The VT8261 southbridge, paired with the VN1000 chipset, is obscure and hard to
find. Besides some evaluation boards surfacing after Centaurs demise, at least
one rare production motherboard is known to exist.

Despite its rarity, the VT8261 is very similar to the VT8251. It uses separate
PCI IDs for PATA and SATA (IDE/RAID modes) with 4 SATA ports in total, 2 ports
sharing one channel, and maps registers through BAR5. This similarity made
adding basic support relatively simple (sharing same issues too).

Tested briefly on VIA VT8591B eval board.


viaide(4): Add RAID mode support for VIA VX900/VX11 SATA controllers.
The BIOS option to enable RAID is uncommon on systems using these chipsets;
however, at least two motherboards mention it in their manuals. The RAID
firmware does not provide management features, but it can recognize and boot
from preconfigured VIA RAID arrays.
Tested on ECS VX900-I.
Also add the VX11 chipset to the controller name, as it shares the same PCI ID.
viaide(4): Improve VT8251 integrated SATA controller support in IDE/RAID modes.
Use via_chip_map() to attach this controller in IDE and RAID modes, similarly
to VX800. This allows drives to be identified and attached successfully on all
four ports (two channels with master/slave ports).
Switch channel setup to sata_setup_channel(), replacing via_setup_channel().
This avoids writes to the 0x50 register, which is only relevant for IDE
controllers. Writes to SATA controller registers caused drives on the IDE
controller (0x0571) to fail to attach. Apply this fix also to VX900 and VT8261.
Rename VT8237R_SATA to VT8251_SATA (0x3349 is not used for VT8237R, AFAIK).
This PCI ID is used in RAID mode on newer (CE) chipset revision and in all
modes (IDE/RAID/AHCI) on older revision.
Add the 0x5287 PCI ID, used in IDE mode on newer (CE) chipset revision.
Rename VT8251_SATA to VT8251_AHCI (0x6287 is used only in AHCI mode).
Add VT8251_AHCI to the ahcisata(4) quirk list, same as VT8251_SATA.
For more details, see the tech-kern thread:
https://mail-index.netbsd.org/tech-kern/2025/04/13/msg030365.html
Should fix and close PR kern/37517.
Tested on Asus A8V-VM (CD) and MSI MS-7318 (CE) motherboards.
Reviewed by bad.
viaide(4): check if chip enable register returns 0 before emulating enable
bits.
At least some VT6410 controllers have register exposed. In fact, some
motherboards allow to control IDE channels (enable/disable them).
viaide(4): update the list of supported VIA controllers.
viaide(4): remove notes section about VT6421, it is not currently required to
setup RAID/JBOD sets to access drives.
 1.20.60.1  09-May-2025  martin Pull up following revision(s) (requested by andvar in ticket #1944):

sys/dev/pci/viaide.c: revision 1.90
sys/dev/pci/ahcisata_pci.c: revision 1.72
sys/dev/pci/pciide_apollo_reg.h: revision 1.21
sys/dev/pci/viaide.c: revision 1.91
sys/dev/pci/viaide.c: revision 1.92
sys/dev/pci/viaide.c: revision 1.93
sys/dev/pci/viaide.c: revision 1.94
sys/dev/pci/viaide.c: revision 1.96
sys/dev/pci/viaide.c: revision 1.97
sys/dev/pci/viaide.c: revision 1.98
share/man/man4/viaide.4: revision 1.11
share/man/man4/viaide.4: revision 1.12

Use the chipset name to describe the IDE controller in order to avoid confusion.
VT800->VX800 and VT855->VX855.
Add VIA VT8261 southbridge SATA controller IDs and PCIB.
viaide(4): use via_chip_map() instead of via_sata_chip_map_new() to attach
CX700/VX800 IDE/SATA RAID controllers and set interface flags the same way as
the VT6410_RAID case for native interrupts required by RAID mode.
Device descriptions were moved to pciide_via_products and updated to cascade
VT6410_RAID and CX700_IDE options.
via_sata_chip_map_new previously worked more by "accident," as it did not
return early on failure to map SATA registers and defaulted to the generic
drive probe function. However, it failed to attach PATA drives (endless
timeouts) and incorrectly detected "three" channels as VT6421, despite the
controller having only two.
Fixes PR kern/59010.
Reviewed and approved by jakllsch@.

Update CX700_IDE and CX700M2_IDE descriptions to better reflect their actual
purpose.
These are not separate IDE controllers for CX700 and CX700M2 but rather the
IDE and RAID modes of the same controller in these chipsets (and few more).
viaide(4): check and add ATA RAID capability in via_sata_chip_map_new() used
by VT6241(A) RAID controller.
This is required for ataraid(4) to attach on this controller if RAID was
configured using its firwmare.
The conditions may be redundant for this controller, but it is uncertain what
variations exist in the wild.

viaide(4): add IDE controller identification by the VT8237S ISA bridge.
The controller's PATA interface uses PCI ID 0x0571, which is shared among
many VIA southbridges. The ISA bridge is used to identify capabilities,
including for the VT8237S.
Unknown PATA controllers disable UDMA by default. This change ensures PATA
drives attach at full speed.

viaide(4): Add support for VIA VT8261 IDE/SATA integrated controller.

The VT8261 southbridge, paired with the VN1000 chipset, is obscure and hard to
find. Besides some evaluation boards surfacing after Centaurs demise, at least
one rare production motherboard is known to exist.

Despite its rarity, the VT8261 is very similar to the VT8251. It uses separate
PCI IDs for PATA and SATA (IDE/RAID modes) with 4 SATA ports in total, 2 ports
sharing one channel, and maps registers through BAR5. This similarity made
adding basic support relatively simple (sharing same issues too).

Tested briefly on VIA VT8591B eval board.


viaide(4): Add RAID mode support for VIA VX900/VX11 SATA controllers.
The BIOS option to enable RAID is uncommon on systems using these chipsets;
however, at least two motherboards mention it in their manuals. The RAID
firmware does not provide management features, but it can recognize and boot
from preconfigured VIA RAID arrays.
Tested on ECS VX900-I.
Also add the VX11 chipset to the controller name, as it shares the same PCI ID.
viaide(4): Improve VT8251 integrated SATA controller support in IDE/RAID modes.
Use via_chip_map() to attach this controller in IDE and RAID modes, similarly
to VX800. This allows drives to be identified and attached successfully on all
four ports (two channels with master/slave ports).
Switch channel setup to sata_setup_channel(), replacing via_setup_channel().
This avoids writes to the 0x50 register, which is only relevant for IDE
controllers. Writes to SATA controller registers caused drives on the IDE
controller (0x0571) to fail to attach. Apply this fix also to VX900 and VT8261.
Rename VT8237R_SATA to VT8251_SATA (0x3349 is not used for VT8237R, AFAIK).
This PCI ID is used in RAID mode on newer (CE) chipset revision and in all
modes (IDE/RAID/AHCI) on older revision.
Add the 0x5287 PCI ID, used in IDE mode on newer (CE) chipset revision.
Rename VT8251_SATA to VT8251_AHCI (0x6287 is used only in AHCI mode).
Add VT8251_AHCI to the ahcisata(4) quirk list, same as VT8251_SATA.
For more details, see the tech-kern thread:
https://mail-index.netbsd.org/tech-kern/2025/04/13/msg030365.html
Should fix and close PR kern/37517.
Tested on Asus A8V-VM (CD) and MSI MS-7318 (CE) motherboards.
Reviewed by bad.
viaide(4): check if chip enable register returns 0 before emulating enable
bits.
At least some VT6410 controllers have register exposed. In fact, some
motherboards allow to control IDE channels (enable/disable them).
viaide(4): update the list of supported VIA controllers.
viaide(4): remove notes section about VT6421, it is not currently required to
setup RAID/JBOD sets to access drives.

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