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pm2reg.h revision 1.5
      1 /*	$NetBSD: pm2reg.h,v 1.5 2011/11/24 03:23:08 macallan Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2009 Michael Lorenz
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     20  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     21  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     22  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     23  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     24  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     25  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     26  */
     27 
     28 /*
     29  * register definitions for Permedia 2 graphics controllers
     30  */
     31 
     32 
     33 #ifndef PM2_REG_H
     34 #define PM2_REG_H
     35 
     36 #define PM2_RESET	0x00000000	/* any write initiates a chip reset */
     37 #define		PM2_RESET_BUSY	0x80000000	/* reset in progress */
     38 
     39 #define PM2_INPUT_FIFO_SPACE	0x00000018
     40 #define PM2_OUTPUT_FIFO_WORDS	0x00000020
     41 
     42 #define PM2_APERTURE1_CONTROL	0x00000050
     43 #define PM2_APERTURE2_CONTROL	0x00000058
     44 #define		PM2_AP_BYTESWAP		0x00000001
     45 #define		PM2_AP_HALFWORDSWAP	0x00000002
     46 #define		PM2_AP_PACKED16_EN	0x00000008
     47 #define		PM2_AP_PACKED16_READ_B	0x00000010 /* Buffer A otherwise */
     48 #define		PM2_AP_PACKED16_WRITE_B	0x00000020 /* A otherwise */
     49 #define		PM2_AP_PACKED16_WRT_DBL	0x00000040
     50 #define		PM2_AP_PACKED16_R31	0x00000080 /* read buffer selected by
     51 						    * visibility bit in memory
     52 						    */
     53 #define		PM2_AP_SVGA		0x00000100
     54 #define		PM2_AP_ROM		0x00000200
     55 
     56 #define PM2_BYPASS_MASK		0x00001100
     57 #define PM2_FB_WRITE_MASK	0x00001140
     58 
     59 #define PM2_OUTPUT_FIFO		0x00002000
     60 
     61 #define PM2_SCREEN_BASE		0x00003000 /* in 64bit units */
     62 #define PM2_SCREEN_STRIDE	0x00003008 /* in 64bit units */
     63 
     64 #define PM2_DISPLAY_DATA	0x00003068
     65 #define		PM2_DD_SDA_IN		0x00000001
     66 #define		PM2_DD_SCL_IN		0x00000002
     67 #define		PM2_DD_SDA_OUT		0x00000004
     68 #define		PM2_DD_SCL_OUT		0x00000008
     69 #define		PM2_DD_LATCHED_DATA	0x00000010
     70 #define		PM2_DD_DATA_VALID	0x00000020	/* clear by 1 */
     71 #define		PM2_DD_START		0x00000040	/* START detected */
     72 #define		PM2_DD_STOP		0x00000080	/* STOP detected */
     73 #define		PM2_DD_INSERT_WAITS	0x00000100
     74 #define		PM2_DD_USE_MONID	0x00000200	/* DDC2 otherwise */
     75 #define		PM2_DD_MONID_IN_MASK	0x00001c00
     76 #define		PM2_DD_MONID_OUT_MASK	0x0000e000
     77 
     78 /* RAMDAC */
     79 #define PM2_DAC_PAL_WRITE_IDX	0x00004000
     80 #define PM2_DAC_DATA		0x00004008
     81 #define PM2_DAC_MASK		0x00004010
     82 #define PM2_DAC_PAL_READ	0x00004018
     83 #define PM2_DAC_CURSOR_PAL	0x00004020
     84 #define PM2_DAC_CURSOR_DATA	0x00004028
     85 #define PM2_DAC_INDEX_DATA	0x00004050
     86 #define PM2_DAC_CURSOR_RAM	0x00004058
     87 #define PM2_DAC_CURSOR_X_LOW	0x00004060
     88 #define PM2_DAC_CURSOR_X_HIGH	0x00004068
     89 #define PM2_DAC_CURSOR_Y_LOW	0x00004070
     90 #define PM2_DAC_CURSOR_Y_HIGH	0x00004078
     91 
     92 /* drawing engine */
     93 #define PM2_RE_STARTXDOM	0x00008000
     94 #define	PM2_RE_DXDOM		0x00008008
     95 #define PM2_RE_STARTXSUB	0x00008010
     96 #define PM2_RE_STARTY		0x00008020
     97 #define PM2_RE_DY		0x00008028
     98 #define PM2_RE_COUNT		0x00008030
     99 #define PM2_RE_BITMASK		0x00008068 /* for colour expansion */
    100 #define PM2_RE_COLOUR		0x000087f0
    101 #define PM2_RE_CONFIG		0x00008d90
    102 #define		PM2RECFG_READ_SRC	0x00000001
    103 #define		PM2RECFG_READ_DST	0x00000002
    104 #define		PM2RECFG_PACKED		0x00000004
    105 #define		PM2RECFG_WRITE_EN	0x00000008
    106 #define		PM2RECFG_DDA_EN		0x00000010
    107 #define		PM2RECFG_ROP_EN		0x00000020
    108 #define		PM2RECFG_ROP_MASK	0x000003c0
    109 #define		PM2RECFG_ROP_SHIFT	6
    110 
    111 #define PM2_RE_CONST_COLOUR	0x000087e8
    112 #define PM2_RE_BUFFER_OFFSET	0x00008a90 /* distance between src and dst */
    113 #define PM2_RE_SOURCE_BASE	0x00008d80 /* write after windowbase */
    114 #define PM2_RE_SOURCE_DELTA	0x00008d88 /* offset in coordinates */
    115 #define PM2_RE_SOURCE_OFFSET	0x00008a88 /* same in pixels */
    116 #define PM2_RE_WINDOW_BASE	0x00008ab0
    117 #define PM2_RE_WINDOW_ORIGIN	0x000081c8
    118 #define PM2_RE_WRITE_MODE	0x00008ab8
    119 #define		PM2WM_WRITE_EN		0x00000001
    120 #define		PM2WM_TO_HOST		0x00000008
    121 
    122 #define PM2_RE_MODE		0x000080a0
    123 #define		PM2RM_MASK_MIRROR	0x00000001 /* mask is right-to-left */
    124 #define		PM2RM_MASK_INVERT	0x00000002
    125 #define		PM2RM_MASK_OPAQUE	0x00000040 /* BG in TEXEL0 */
    126 #define		PM2RM_MASK_SWAP		0x00000180
    127 #define		PM2RM_MASK_PAD		0x00000200 /* new line new mask */
    128 #define		PM2RM_MASK_OFFSET	0x00007c00
    129 #define		PM2RM_HOST_SWAP		0x00018000
    130 #define		PM2RM_LIMITS_EN		0x00040000
    131 #define		PM2RM_MASK_REL_X	0x00080000
    132 
    133 #define PM2_RE_RECT_START	0x000080d0
    134 #define PM2_RE_RECT_SIZE	0x000080d8
    135 #define PM2_RE_RENDER		0x00008038 /* write starts command */
    136 #define		PM2RE_STIPPLE		0x00000001
    137 #define		PM2RE_FASTFILL		0x00000008
    138 #define		PM2RE_LINE		0x00000000
    139 #define		PM2RE_TRAPEZOID		0x00000040
    140 #define		PM2RE_POINT		0x00000080
    141 #define		PM2RE_RECTANGLE		0x000000c0
    142 #define		PM2RE_SYNC_ON_MASK	0x00000800 /* wait for write to bitmask
    143 						      register */
    144 #define		PM2RE_SYNC_ON_HOST	0x00001000 /* wait for host data */
    145 #define		PM2RE_TEXTURE_EN	0x00002000
    146 #define		PM2RE_INC_X		0x00200000 /* drawing direction */
    147 #define		PM2RE_INC_Y		0x00400000
    148 #define	PM2_RE_TEXEL0		0x00008600 /* background colour */
    149 #define PM2_RE_STATUS		0x00000068
    150 #define		PM2ST_BUSY	0x80000000
    151 #define PM2_RE_SYNC		0x00008c40
    152 #define PM2_RE_FILTER_MODE	0x00008c00
    153 #define		PM2FLT_PASS_SYNC	0x00000400
    154 #define PM2_RE_DDA_MODE		0x000087e0
    155 #define		PM2DDA_ENABLE		0x00000001
    156 #define		PM2DDA_GOURAUD		0x00000002 /* flat otherwise */
    157 #define PM2_RE_BLOCK_COLOUR	0x00008ac8
    158 #define PM2_RE_STIPPLE_MODE	0x000081a0
    159 #define 	PM2ST_ENABLE		0x00000001
    160 #define 	PM2ST_XOFFSET_MASK	0x00000380
    161 #define 	PM2ST_YOFFSET_MASK	0x00007000
    162 #define 	PM2ST_INVERT		0x00020000
    163 #define 	PM2ST_MIRROR_X		0x00040000
    164 #define 	PM2ST_MIRROR_Y		0x00080000
    165 #define 	PM2ST_OPAQUE		0x00100000
    166 #define PM2_HW_WRITEMASK	0x00008ac0
    167 #define PM2_SW_WRITEMASK	0x00008820
    168 #define PM2_FB_READMODE		0x00008a80
    169 #define		PM2FB_PP0_MASK	0x00000007
    170 #define		PM2FB_PP1_MASK	0x00000038
    171 #define		PM2FB_PP2_MASK	0x000001c0
    172 #define		PM2FB_READ_SRC	0x00000200
    173 #define		PM2FB_READ_DST	0x00000400
    174 #define		PM2FB_FBCOLOR	0x00008000 /* for uploads */
    175 #define		PM2FB_ORIGIN_BL	0x00010000 /* window origin, TL otherwise */
    176 #define		PM2FB_PATCH_EN	0x00020000
    177 #define		PM2FB_PACKED	0x00040000
    178 #define		PM2FB_OFFSET_M	0x00380000
    179 #define		PM2FB_PM_PATCH	0x00000000
    180 #define		PM2FB_PM_SUB	0x02000000
    181 #define		PM2FB_PM_SUBP	0x04000000
    182 
    183 #define PM2_RE_SCISSOR_MODE	0x00008180
    184 #define		PM2SC_USER_EN		0x00000001 /* from scissor reg */
    185 #define		PM2SC_SCREEN_EN		0x00000002 /* screensize reg */
    186 #define PM2_RE_SCREENSIZE	0x00008198
    187 #define PM2_RE_SCISSOR_MINYX	0x00008188
    188 #define PM2_RE_SCISSOR_MAXYX	0x00008190
    189 #define PM2_RE_TEXMAP_FORMAT	0x00008588
    190 #define PM2_RE_DITHER_MODE	0x00008818
    191 #define PM2_RE_ALPHA_MODE	0x00008810
    192 #define PM2_RE_TEX_COLOUR_MODE	0x00008680
    193 #define PM2_RE_TEX_READ_MODE	0x00008670
    194 #define PM2_RE_TEX_LUT_MODE	0x00008678
    195 #define PM2_RE_TEX_ADDRESS_MODE	0x00008380
    196 #define PM2_RE_YUV_MODE		0x00008f00
    197 #define PM2_RE_DEPTH_MODE	0x000089a0
    198 #define PM2_RE_DEPTH		0x000089a8
    199 #define PM2_RE_STENCIL_MODE	0x00008988
    200 #define PM2_RE_ROP_MODE		0x00008828
    201 
    202 #endif /* PM2_REG_H */
    203