ppb.c revision 1.43 1 1.43 matt /* $NetBSD: ppb.c,v 1.43 2010/12/11 18:25:02 matt Exp $ */
2 1.1 cgd
3 1.1 cgd /*
4 1.17 cgd * Copyright (c) 1996, 1998 Christopher G. Demetriou. All rights reserved.
5 1.1 cgd *
6 1.1 cgd * Redistribution and use in source and binary forms, with or without
7 1.1 cgd * modification, are permitted provided that the following conditions
8 1.1 cgd * are met:
9 1.1 cgd * 1. Redistributions of source code must retain the above copyright
10 1.1 cgd * notice, this list of conditions and the following disclaimer.
11 1.1 cgd * 2. Redistributions in binary form must reproduce the above copyright
12 1.1 cgd * notice, this list of conditions and the following disclaimer in the
13 1.1 cgd * documentation and/or other materials provided with the distribution.
14 1.1 cgd * 3. All advertising materials mentioning features or use of this software
15 1.1 cgd * must display the following acknowledgement:
16 1.1 cgd * This product includes software developed by Christopher G. Demetriou
17 1.1 cgd * for the NetBSD Project.
18 1.1 cgd * 4. The name of the author may not be used to endorse or promote products
19 1.1 cgd * derived from this software without specific prior written permission
20 1.1 cgd *
21 1.1 cgd * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 1.1 cgd * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 1.1 cgd * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 1.1 cgd * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 1.1 cgd * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 1.1 cgd * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 1.1 cgd * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 1.1 cgd * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 1.1 cgd * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 1.1 cgd * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 1.1 cgd */
32 1.20 lukem
33 1.20 lukem #include <sys/cdefs.h>
34 1.43 matt __KERNEL_RCSID(0, "$NetBSD: ppb.c,v 1.43 2010/12/11 18:25:02 matt Exp $");
35 1.1 cgd
36 1.1 cgd #include <sys/param.h>
37 1.1 cgd #include <sys/systm.h>
38 1.1 cgd #include <sys/kernel.h>
39 1.1 cgd #include <sys/device.h>
40 1.1 cgd
41 1.1 cgd #include <dev/pci/pcireg.h>
42 1.1 cgd #include <dev/pci/pcivar.h>
43 1.1 cgd #include <dev/pci/ppbreg.h>
44 1.36 jmcneill #include <dev/pci/pcidevs.h>
45 1.1 cgd
46 1.21 thorpej struct ppb_softc {
47 1.39 cegger device_t sc_dev; /* generic device glue */
48 1.21 thorpej pci_chipset_tag_t sc_pc; /* our PCI chipset... */
49 1.21 thorpej pcitag_t sc_tag; /* ...and tag. */
50 1.36 jmcneill
51 1.36 jmcneill pcireg_t sc_pciconfext[48];
52 1.21 thorpej };
53 1.21 thorpej
54 1.42 dyoung static bool ppb_resume(device_t, const pmf_qual_t *);
55 1.42 dyoung static bool ppb_suspend(device_t, const pmf_qual_t *);
56 1.36 jmcneill
57 1.31 thorpej static int
58 1.39 cegger ppbmatch(device_t parent, cfdata_t match, void *aux)
59 1.1 cgd {
60 1.1 cgd struct pci_attach_args *pa = aux;
61 1.1 cgd
62 1.1 cgd /*
63 1.1 cgd * Check the ID register to see that it's a PCI bridge.
64 1.1 cgd * If it is, we assume that we can deal with it; it _should_
65 1.1 cgd * work in a standardized way...
66 1.1 cgd */
67 1.1 cgd if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
68 1.1 cgd PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_PCI)
69 1.39 cegger return 1;
70 1.1 cgd
71 1.43 matt #ifdef __powerpc__
72 1.43 matt if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PROCESSOR &&
73 1.43 matt PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PROCESSOR_POWERPC) {
74 1.43 matt pcireg_t bhlc = pci_conf_read(pa->pa_pc, pa->pa_tag,
75 1.43 matt PCI_BHLC_REG);
76 1.43 matt if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_FREESCALE
77 1.43 matt && PCI_HDRTYPE(bhlc) == PCI_HDRTYPE_RC)
78 1.43 matt return 1;
79 1.43 matt }
80 1.43 matt #endif
81 1.43 matt
82 1.39 cegger return 0;
83 1.1 cgd }
84 1.1 cgd
85 1.31 thorpej static void
86 1.36 jmcneill ppb_fix_pcix(device_t self)
87 1.35 joerg {
88 1.36 jmcneill struct ppb_softc *sc = device_private(self);
89 1.35 joerg pcireg_t reg;
90 1.35 joerg int off;
91 1.35 joerg
92 1.36 jmcneill if (!pci_get_capability(sc->sc_pc, sc->sc_tag, PCI_CAP_PCIEXPRESS,
93 1.35 joerg &off, ®))
94 1.35 joerg return; /* Not a PCIe device */
95 1.35 joerg
96 1.35 joerg if ((reg & 0x000f0000) != 0x00010000) {
97 1.38 cegger aprint_normal_dev(self, "unsupported PCI Express version\n");
98 1.35 joerg return;
99 1.35 joerg }
100 1.36 jmcneill reg = pci_conf_read(sc->sc_pc, sc->sc_tag, off + 0x18);
101 1.35 joerg if (reg & 0x003f) {
102 1.35 joerg aprint_normal_dev(self, "disabling notification events\n");
103 1.35 joerg reg &= ~0x003f;
104 1.36 jmcneill pci_conf_write(sc->sc_pc, sc->sc_tag, off + 0x18, reg);
105 1.35 joerg }
106 1.35 joerg }
107 1.35 joerg
108 1.35 joerg static void
109 1.37 dyoung ppbattach(device_t parent, device_t self, void *aux)
110 1.1 cgd {
111 1.37 dyoung struct ppb_softc *sc = device_private(self);
112 1.1 cgd struct pci_attach_args *pa = aux;
113 1.7 cgd pci_chipset_tag_t pc = pa->pa_pc;
114 1.1 cgd struct pcibus_attach_args pba;
115 1.7 cgd pcireg_t busdata;
116 1.1 cgd char devinfo[256];
117 1.1 cgd
118 1.28 itojun pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
119 1.27 briggs aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
120 1.27 briggs PCI_REVISION(pa->pa_class));
121 1.27 briggs aprint_naive("\n");
122 1.1 cgd
123 1.21 thorpej sc->sc_pc = pc;
124 1.21 thorpej sc->sc_tag = pa->pa_tag;
125 1.39 cegger sc->sc_dev = self;
126 1.21 thorpej
127 1.7 cgd busdata = pci_conf_read(pc, pa->pa_tag, PPB_REG_BUSINFO);
128 1.1 cgd
129 1.7 cgd if (PPB_BUSINFO_SECONDARY(busdata) == 0) {
130 1.37 dyoung aprint_normal_dev(self, "not configured by system firmware\n");
131 1.1 cgd return;
132 1.1 cgd }
133 1.1 cgd
134 1.36 jmcneill ppb_fix_pcix(self);
135 1.35 joerg
136 1.1 cgd #if 0
137 1.1 cgd /*
138 1.1 cgd * XXX can't do this, because we're not given our bus number
139 1.7 cgd * (we shouldn't need it), and because we've no way to
140 1.7 cgd * decompose our tag.
141 1.1 cgd */
142 1.1 cgd /* sanity check. */
143 1.7 cgd if (pa->pa_bus != PPB_BUSINFO_PRIMARY(busdata))
144 1.1 cgd panic("ppbattach: bus in tag (%d) != bus in reg (%d)",
145 1.7 cgd pa->pa_bus, PPB_BUSINFO_PRIMARY(busdata));
146 1.1 cgd #endif
147 1.1 cgd
148 1.36 jmcneill if (!pmf_device_register(self, ppb_suspend, ppb_resume))
149 1.36 jmcneill aprint_error_dev(self, "couldn't establish power handler\n");
150 1.36 jmcneill
151 1.1 cgd /*
152 1.1 cgd * Attach the PCI bus than hangs off of it.
153 1.19 thorpej *
154 1.19 thorpej * XXX Don't pass-through Memory Read Multiple. Should we?
155 1.19 thorpej * XXX Consult the spec...
156 1.1 cgd */
157 1.12 thorpej pba.pba_iot = pa->pa_iot;
158 1.12 thorpej pba.pba_memt = pa->pa_memt;
159 1.15 mycroft pba.pba_dmat = pa->pa_dmat;
160 1.26 fvdl pba.pba_dmat64 = pa->pa_dmat64;
161 1.7 cgd pba.pba_pc = pc;
162 1.19 thorpej pba.pba_flags = pa->pa_flags & ~PCI_FLAGS_MRM_OKAY;
163 1.7 cgd pba.pba_bus = PPB_BUSINFO_SECONDARY(busdata);
164 1.21 thorpej pba.pba_bridgetag = &sc->sc_tag;
165 1.7 cgd pba.pba_intrswiz = pa->pa_intrswiz;
166 1.7 cgd pba.pba_intrtag = pa->pa_intrtag;
167 1.1 cgd
168 1.29 drochner config_found_ia(self, "pcibus", &pba, pcibusprint);
169 1.1 cgd }
170 1.31 thorpej
171 1.37 dyoung static int
172 1.37 dyoung ppbdetach(device_t self, int flags)
173 1.37 dyoung {
174 1.37 dyoung int rc;
175 1.37 dyoung
176 1.37 dyoung if ((rc = config_detach_children(self, flags)) != 0)
177 1.37 dyoung return rc;
178 1.37 dyoung pmf_device_deregister(self);
179 1.37 dyoung return 0;
180 1.37 dyoung }
181 1.37 dyoung
182 1.36 jmcneill static bool
183 1.42 dyoung ppb_resume(device_t dv, const pmf_qual_t *qual)
184 1.36 jmcneill {
185 1.36 jmcneill struct ppb_softc *sc = device_private(dv);
186 1.36 jmcneill int off;
187 1.36 jmcneill pcireg_t val;
188 1.36 jmcneill
189 1.36 jmcneill for (off = 0x40; off <= 0xff; off += 4) {
190 1.36 jmcneill val = pci_conf_read(sc->sc_pc, sc->sc_tag, off);
191 1.36 jmcneill if (val != sc->sc_pciconfext[(off - 0x40) / 4])
192 1.36 jmcneill pci_conf_write(sc->sc_pc, sc->sc_tag, off,
193 1.36 jmcneill sc->sc_pciconfext[(off - 0x40)/4]);
194 1.36 jmcneill }
195 1.36 jmcneill
196 1.36 jmcneill ppb_fix_pcix(dv);
197 1.36 jmcneill
198 1.36 jmcneill return true;
199 1.36 jmcneill }
200 1.36 jmcneill
201 1.36 jmcneill static bool
202 1.42 dyoung ppb_suspend(device_t dv, const pmf_qual_t *qual)
203 1.36 jmcneill {
204 1.36 jmcneill struct ppb_softc *sc = device_private(dv);
205 1.36 jmcneill int off;
206 1.36 jmcneill
207 1.36 jmcneill for (off = 0x40; off <= 0xff; off += 4)
208 1.36 jmcneill sc->sc_pciconfext[(off - 0x40) / 4] =
209 1.36 jmcneill pci_conf_read(sc->sc_pc, sc->sc_tag, off);
210 1.36 jmcneill
211 1.36 jmcneill return true;
212 1.36 jmcneill }
213 1.36 jmcneill
214 1.37 dyoung static void
215 1.37 dyoung ppbchilddet(device_t self, device_t child)
216 1.37 dyoung {
217 1.37 dyoung /* we keep no references to child devices, so do nothing */
218 1.37 dyoung }
219 1.37 dyoung
220 1.40 dyoung CFATTACH_DECL3_NEW(ppb, sizeof(struct ppb_softc),
221 1.40 dyoung ppbmatch, ppbattach, ppbdetach, NULL, NULL, ppbchilddet,
222 1.40 dyoung DVF_DETACH_SHUTDOWN);
223