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History log of /src/sys/dev/pci/ppb.c
RevisionDateAuthorComments
 1.76  29-Aug-2024  andvar improve grammar in the comment.
 1.75  26-Nov-2023  rin branches: 1.75.2;
ppb(4): Print out PCIe Gen5 link speed correctly
 1.74  10-Oct-2021  msaitoh branches: 1.74.4;
Use PCI-SIG official acronyms:

- RP stands for Root Port.
- RC stands for Root Complex.
- RCIEP stands for Root Complex Integrated End Point.
 1.73  07-Aug-2021  thorpej Merge thorpej-cfargs2.
 1.72  11-May-2021  thorpej branches: 1.72.4;
Forward the bridge's devhandle to the downstream bus.
 1.71  24-Apr-2021  thorpej branches: 1.71.2; 1.71.4;
Merge thorpej-cfargs branch:

Simplify and make extensible the config_search() / config_found() /
config_attach() interfaces: rather than having different variants for
which arguments you want pass along, just have a single call that
takes a variadic list of tag-value arguments.

Adjust all call sites:
- Simplify wherever possible; don't pass along arguments that aren't
actually needed.
- Don't be explicit about what interface attribute is attaching if
the device only has one. (More simplification.)
- Add a config_probe() function to be used in indirect configuiration
situations, making is visibly easier to see when indirect config is
in play, and allowing for future change in semantics. (As of now,
this is just a wrapper around config_match(), but that is an
implementation detail.)

Remove unnecessary or redundant interface attributes where they're not
needed.

There are currently 5 "cfargs" defined:
- CFARG_SUBMATCH (submatch function for direct config)
- CFARG_SEARCH (search function for indirect config)
- CFARG_IATTR (interface attribte)
- CFARG_LOCATORS (locators array)
- CFARG_DEVHANDLE (devhandle_t - wraps OFW, ACPI, etc. handles)

...and a sentinel value CFARG_EOL.

Add some extra sanity checking to ensure that interface attributes
aren't ambiguous.

Use CFARG_DEVHANDLE in MI FDT, OFW, and ACPI code, and macppc and shark
ports to associate those device handles with device_t instance. This
will trickle trough to more places over time (need back-end for pre-OFW
Sun OBP; any others?).
 1.70  12-Jul-2020  rin branches: 1.70.4;
Remove duplicate include of opt_ppb.h.
No binary changes.
 1.69  09-Jul-2019  msaitoh branches: 1.69.2;
Identify 16GT/s.
 1.68  01-Mar-2019  msaitoh - Almost all ppbreg.h's definitions are also in pcireg.h. Remove duplicated
definitions from ppbreg.h and move some definitions from ppbreg.h to
pcireg.h.
- Change fast back-to-back "capable" to "enable" in pci_subr.c.
- Print Primary Discard Timer, Secondary Discard Timer, Discard Timer Status
and Discard Timer SERR# Enable bit in pci_subr.c.
- PCI_BRIDGE_PREFETCHBASE32_REG and PCI_BRIDGE_PREFETCHLIMIT32_REG are
"upper" 32bit registers, rename to *UP32_REG to avoid confusion.
- Use macro.
 1.67  29-Jan-2019  msaitoh If the secondary bus is configured and the bus mastering is not enabled,
enable it. Suggested by thorpej@.
 1.66  28-Jan-2019  msaitoh Explicitly enable bus masterling in case BIOS, UEFI or firmware don't enable
it. Might fix PR kern/53811.
 1.65  27-Jan-2019  pgoyette Merge the [pgoyette-compat] branch
 1.64  07-Dec-2018  msaitoh - defflag PPB_USEINTR
- Print "interrupting at "
 1.63  10-May-2017  msaitoh branches: 1.63.2; 1.63.8; 1.63.10;
Fix typos.
 1.62  09-May-2017  msaitoh - Fix a bug that a device which has no PCIe capability incorrectly
accessess the PCI config area in ppbdetach().
- Don't add event counters if slot interrupt isn't used.
 1.61  27-Apr-2017  msaitoh Make ppb(4) interrupt support stable:
- Disable all interrupts in the beginning of attach. Without this, interrupt
storm occurs while cold == 1 on some environment.
- Disable command complete interrput for a while to prevent hangup on some
enviroment. I'm sorry, I don't know what this bit is :-|
- Check all status bits and return 0 if an interrupt is not for me. It's
required for INTx. Tested on XEN3_DOM0 because it doesn't support MSI yet.
- Return 1 when a interrupt is processed.
 1.60  26-Apr-2017  msaitoh branches: 1.60.2;
Disable ppb(4)'s interrupt for a while. It causes hangup on some environment.
Define PPB_USEINTR if you'd like to use interrupt.
 1.59  26-Apr-2017  msaitoh Disable and disestablish interrupt in ppbdetach().
 1.58  24-Apr-2017  chs in ppbdetach(), try to detach the children before tearing down our own state,
to avoid trouble if detaching the children fails.
 1.57  18-Apr-2017  msaitoh Enable PCIe's interrupt as much as possilbe in ppb(4) to detect and count
status change event. HotPlug function itself have not implemented yet.

- Interrupt and each event are counted by evcnt(9). Example:

ppb0 Interrupt 0 0 intr
ppb0 Attention Button Pressed 0 0 misc
ppb0 Power Fault Detected 0 0 misc
ppb0 MRL Sensor Changed 0 0 misc
ppb0 Presence Detect Changed 0 0 misc
ppb0 Command Completed 0 0 misc
ppb0 Data Link Layer State Changed 0 0 misc

- Print message if ppb_printevent is not zero. The default vaule is 0.
The output messages:

Attention Button Pressed
Power Fault Detected
MRL Sensor Changed
Presence Detect Changed
Command Completed
Data Link Layer State Changed

- Remove workaround code to disable interrupt (ppb.c rev. 1.35).

Tested with Dell Latitude 2120 without if_bge.c rev. 1.304's workaround.
dmesg when bge's device timeout occured:

ppb3: Presence Detect Changed
ppb3: Data Link Layer State Changed
ppb3: Presence Detect Changed

vmstat -e |grep ppb

ppb3 Interrupt 2 0 intr
ppb3 Presence Detect Changed 2 0 misc
ppb3 Data Link Layer State Changed 1 0 misc
 1.56  05-Apr-2017  msaitoh Move struct ppb_softc into ppbvar.h.
 1.55  16-Nov-2015  msaitoh branches: 1.55.2; 1.55.4;
Define PCIE_XCAP_{VER,TYPE}(x) and use them.
 1.54  24-Sep-2014  msaitoh branches: 1.54.2;
Rename PCIE_XCAP_VER_* macros to avoid confusion.
 1.53  24-Sep-2014  msaitoh - Modify message of PCIe capability version. This field (PCIE_XCAP_VER_MASK)
is not specification's version number but the capability structure's version
number. To avoid confusion, print "PCI Express capability version x".
- The max number of PCIe lane is not 16 but 32. Fix the bug using with macro.
- Use macro instead of magic number.
- Gb/s -> GT/s
 1.52  21-Apr-2013  msaitoh branches: 1.52.10;
Delete "PCI_" from PCIX and PICE capability registers.
 1.51  06-Mar-2013  yamt ppb: fix link speed print
 1.50  20-Oct-2012  matt Print out negotiated link width and speed for PCIe (merged from
matt-nb5-mips64).
 1.49  29-Jan-2012  drochner branches: 1.49.6;
extend the pci_aprint_devinfo slightly to cover the cases commonly
used by drivers: a short name for the quiet/naive case and a string
to override the "pcidevs" based name by one provided by the driver,
ride on yesterday's kernel minor version bump
 1.48  26-Jan-2012  drochner put printing of the pci_devinfo into its own function (not inlined
by purpose) - this is a stack hog, and with this change my uTCA amd64
system boots again
a lot of similar code can be eliminated from pci device drivers this way,
but before doing so (and making the new function part of the module API)
I'd like to consider a modification to make it work with drivers which
prefer to print names from other sources (like pciide)
 1.47  21-Oct-2011  dyoung branches: 1.47.2; 1.47.6;
Tell a pci(4) instance its subordinate PCI buses using a new member
in the pcibus_attach_args, pba_sub. pciN attaches to pba_bus itself.
If pba_bus < pba_sub, then [pba_bus + 1, pba_sub] are subordinate to
pba_bus.

On i386, make mainbus0 attach pci0 with pba_sub = 255 because all buses
1 and up must be subordinate to pci0.

XXX Deal with other architectures.
 1.46  17-Aug-2011  dyoung Redefine PCI_MSI_* and PCI_PCIE_* constants in terms of bits(3).

Use named constants and more conventional variable names in
pci_msi_establish() and pci_msi_disestablish(). Fix a couple of bugs:
pci_msi_establish() returned a pointer to the struct intrhand instead of
to the struct msi_hdl as it was intended to, and pci_msi_disestablish()
did not free(9) the msi_hdl.
 1.45  10-Jan-2011  cegger add missing break
 1.44  10-Jan-2011  jmcneill ppb_fix_pcix changes:
- rename to ppb_fix_pcie
- support version PCI-E 2.0
- print version and device/port type information
- use constants from pcireg.h instead of magic numbers

changes:

ppb2 at pci0 dev 21 function 0: vendor 0x15ad product 0x07a0 (rev. 0x01)
ppb2: unsupported PCI Express version

to:

ppb2 at pci0 dev 21 function 0: vendor 0x15ad product 0x07a0 (rev. 0x01)
ppb2: PCI Express 2.0 <Root Port of PCI-E Root Complex>
 1.43  11-Dec-2010  matt On powerpc, recognize PCI Express RC root bridges.
 1.42  24-Feb-2010  dyoung branches: 1.42.2;
A pointer typedef entails trading too much flexibility to declare const
and non-const types, and the kernel uses both const and non-const
PMF qualifiers and device suspensors, so change the pmf_qual_t and
device_suspensor_t typedefs from "pointers to const" to non-pointer,
non-const types.
 1.41  08-Jan-2010  dyoung branches: 1.41.2;
Expand PMF_FN_* macros.
 1.40  02-Apr-2009  dyoung During shutdown, detach devices in an orderly fashion.

Call the detach routine for every device in the device tree, starting
with the leaves and moving toward the root, expecting that each
(pseudo-)device driver will use the opportunity to gracefully commit
outstandings transactions to the underlying (pseudo-)device and to
relinquish control of the hardware to the system BIOS.

Detaching devices is not suitable for every shutdown: in an emergency,
or if the system state is inconsistent, we should resort to a fast,
simple shutdown that uses only the pmf(9) shutdown hooks and the
(deprecated) shutdownhooks. For now, if the flag RB_NOSYNC is set in
boothowto, opt for the fast, simple shutdown.

Add a device flag, DVF_DETACH_SHUTDOWN, that indicates by its presence
that it is safe to detach a device during shutdown. Introduce macros
CFATTACH_DECL3() and CFATTACH_DECL3_NEW() for creating autoconf
attachments with default device flags. Add DVF_DETACH_SHUTDOWN
to configuration attachments for atabus(4), atw(4) at cardbus(4),
cardbus(4), cardslot(4), com(4) at isa(4), elanpar(4), elanpex(4),
elansc(4), gpio(4), npx(4) at isa(4), nsphyter(4), pci(4), pcib(4),
pcmcia(4), ppb(4), sip(4), wd(4), and wdc(4) at isa(4).

Add a device-detachment "reason" flag, DETACH_SHUTDOWN, that tells the
autoconf code and a device driver that the reason for detachment is
system shutdown.

Add a sysctl, kern.detachall, that tells the system to try to detach
every device at shutdown, regardless of any device's DVF_DETACH_SHUTDOWN
flag. The default for kern.detachall is 0. SET IT TO 1, PLEASE, TO
HELP TEST AND DEBUG DEVICE DETACHMENT AT SHUTDOWN.

This is a work in progress. In future work, I aim to treat
pseudo-devices more thoroughly, and to gracefully tear down a stack of
(pseudo-)disk drivers and filesystems, including cgd(4), vnd(4), and
raid(4) instances at shutdown.

Also commit some changes that are not easily untangled from the rest:

(1) begin to simplify device_t locking: rename struct pmf_private to
device_lock, and incorporate device_lock into struct device.

(2) #include <sys/device.h> in sys/pmf.h in order to get some
definitions that it needs. Stop unnecessarily #including <sys/device.h>
in sys/arch/x86/include/pic.h to keep the amd64, xen, and i386 releases
building.
 1.39  03-May-2008  cegger branches: 1.39.8; 1.39.10; 1.39.14; 1.39.18; 1.39.22;
device_t / softc split. Tested on amd64.
"looks good" spz
 1.38  03-May-2008  cegger unuspported -> unsupported
 1.37  22-Feb-2008  dyoung branches: 1.37.2; 1.37.4;
Add methods for detaching self and for detaching children.

Use device_t and accessors. Use aprint_*_dev().
 1.36  09-Dec-2007  jmcneill branches: 1.36.6; 1.36.10;
Merge jmcneill-pm branch.
 1.35  16-Oct-2007  joerg branches: 1.35.6; 1.35.8;
Merge 1.34.22.7 from jmcneill-pm:
Next attempt at trying to fix the irregular interrupt storms on my
Thinkpad: when we find a PCI Express device, check the list of
notification events and if any are sets, clear them. We can't handle
them ATM anyway.
 1.34  16-Nov-2006  christos branches: 1.34.8; 1.34.22; 1.34.24; 1.34.26;
__unused removal on arguments; approved by core.
 1.33  12-Oct-2006  christos - sprinkle __unused on function decls.
- fix a couple of unused bugs
- no more -Wno-unused for i386
 1.32  11-Dec-2005  christos branches: 1.32.20; 1.32.22;
merge ktrace-lwp.
 1.31  28-Jun-2005  thorpej branches: 1.31.2;
Use ANSI function decls and static.
 1.30  04-Feb-2005  perry de-__P
 1.29  30-Aug-2004  drochner branches: 1.29.4; 1.29.6;
Phase out the use of a string as first "attach args" member to control
which bustype should be attached with a specific call to config_found()
(from a "mainbus" or a bus bridge).
Do it for isa/eisa/mca and pci/agp for now. These buses all attach to
an mi interface attribute "isabus", "eisabus" etc., and the autoconf
framework now allows to specify an interface attribute on config_found()
and config_search(), which limits the search of matching config data
to these which attach to that specific attribute.
So we basically have to call config_found_ia(..., "foobus", ...) where
such a bus is attached.
As a consequence, where a "mainbus" or alike also attaches other
devices (eg CPUs) which do not attach to a specific attribute yet,
we need at least pass an attribute name (different from "foobus") so
that the foo bus is not found at these places. This made some minor
changes necessary which are not obviously related to the mentioned buses.
 1.28  23-Apr-2004  itojun pass string length (= boundary info) to pci_devinfo so that we do not run over
the end of memory region
 1.27  09-Dec-2003  briggs Use aprint_*()
 1.26  15-Jun-2003  fvdl branches: 1.26.2;
Handle 64bit DMA addresses on PCI for platforms that can (currently only
enabled on amd64). Add a dmat64 field to various PCI attach structures,
and pass it down where needed. Implement a simple new function called
pci_dma64_available(pa) to test if 64bit DMA addresses may be used.
This returns 1 iff _PCI_HAVE_DMA64 is defined in <machine/pci_machdep.h>,
and there is more than 4G of memory.
 1.25  01-Jan-2003  thorpej Use aprint_normal() in cfprint routines.
 1.24  02-Oct-2002  thorpej Add trailing ; to CFATTACH_DECL.
 1.23  30-Sep-2002  thorpej Use CFATTACH_DECL().
 1.22  27-Sep-2002  thorpej Declare all cfattach structures const.
 1.21  16-May-2002  thorpej branches: 1.21.2;
* Add "pcitag_t *pba_bridgetag" to pci_attach_args. This is set to
NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
uses OFW device nodes to enumerate the bus. When a PCI bus that is
behind a bridge is attached, pci_attach_hook() allocates a new PCI
chipset tag for the new bus and sets it's "curnode" to the OFW node
of the bridge. This is used as a starting point when enumerating
that bus. Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
 1.20  13-Nov-2001  lukem add RCSID
 1.19  04-Nov-1999  thorpej branches: 1.19.6; 1.19.8;
Don't pass rd/mult capability though a PCI-PCI bridge. The bridge would
have to break it up into mutliple rd/line's anyhow, so why bother letting
the device issue it in the first place.
 1.18  08-Jun-1998  thorpej branches: 1.18.14; 1.18.16; 1.18.20;
Nuke __BROKEN_INDIRECT_CONFIG.
 1.17  04-Mar-1998  cgd clean up slightly, correct a few comments
 1.16  12-Jan-1998  thorpej branches: 1.16.2;
Update for config changes.
 1.15  30-Aug-1997  mycroft branches: 1.15.2; 1.15.4;
Pass down bus_dma_tag_t's as appropriate (per Jason's bus_dma code).
 1.14  30-Aug-1997  mycroft Pass the I/O and memory enable flags through the bridge.
 1.13  05-Dec-1996  cgd update these so they compile whether or not __BROKEN_INDIRECT_CONFIG
is defined.
 1.12  21-Oct-1996  thorpej New bus.h implementation/interface:
- No more distinction between i/o-mapped and memory-mapped
devices. It's all "bus space" now, and space tags
differentiate the space with finer grain than the
bus chipset tag.
- Add memory barrier methods.
- Implement space alloc/free methods.
- Implement region read/write methods (like memcpy to/from
bus space).
This interface provides a better abstraction for dealing with
machine-independent chipset drivers.
 1.11  13-Oct-1996  christos backout kprintf changes
 1.10  10-Oct-1996  christos printf -> kprintf, sprintf -> ksprintf
 1.9  27-Aug-1996  cgd change cfprint_t type definition to take a const char *, rather than
a char *, because that's what was really intended, and because
if the print function modifies the string, various things could become
unhappy (so the string should _not_ be modified).
 1.8  03-May-1996  christos remove unused variables
 1.7  27-Mar-1996  cgd modify these to provide a new, better-specified PCI interface
(soon to be documented on mailing lists; eventually in section 9 manual
pages), most importantly:
(1) support interrupt pin swizzling on non-i386 systems with
PCI-PCI bridges (per PPB spec; done, but meaningless, on i386).
(2) provide pci_{io,mem}_find(), to determine what I/O or memory
space is described by a given PCI configuration space
mapping register.
(3) provide pci_intr_map(), pci_intr_string(), and
pci_intr_{,dis}establish() to manipulate and print info about
PCI interrupts.
(4) make pci functions take as an argument a machine-dependent
cookie, to allow more flexibility in implementation.
 1.6  17-Mar-1996  cgd spacing nit
 1.5  17-Mar-1996  thorpej New device attachment scheme:

- split softc size and match/attach out from cfdriver into
a new struct cfattach.

- new "attach" directive for files.*. May specify the name of
the cfattach structure, so that devices may be easily attached
to parents with different autoconfiguration semantics.
 1.4  14-Mar-1996  cgd These devices don't actually need softc's that are supersets of 'struct
device.' No point in adding that complexity + space if they're not needed,
so axe them.
 1.3  14-Mar-1996  cgd (1) provide #defines for cf_loc[] entries for devices that attach to
pcibus and pci.
(2) remove the #ifdef i386 from pci.c, and provide a machine-dependent
hook (pci_md_attach_hook()) to do any machine-dependent attachment
gunk, e.g. on the i386 printing out the configuration mode (if bus 0)
(3) don't pass max device number for a given bus in, use
PCI_MAX_DEVICE_NUMBER, which can be defined on a per-machine basis.
(defaults to 32. on i386, it's 32 if pci conf mode == 1, 16 if 2.)
 1.2  04-Mar-1996  cgd fix aux argument to config_found() for secondary bus.
 1.1  28-Feb-1996  cgd Preliminary support for PCI-PCI bridges. Recognize a PCI-PCI bridge
and attach the secondary pci bus as a 'pci' device. Note that this support
is incomplete and will not yet work for ports other than that i386. (The
i386 can rely on the PCI interrupt 'line' information to determine
interrupt mapping, which is not necessarily possible on other systems.)
 1.15.4.2  01-Sep-1997  thorpej Update marc-pcmcia branch from trunk.
 1.15.4.1  30-Aug-1997  thorpej file ppb.c was added on branch marc-pcmcia on 1997-09-01 20:29:55 +0000
 1.15.2.2  30-Aug-1997  mycroft Pass down bus_dma_tag_t's as appropriate (per Jason's bus_dma code).
 1.15.2.1  30-Aug-1997  mycroft file ppb.c was added on branch thorpej-bus-dma on 1997-08-30 06:53:59 +0000
 1.16.2.2  12-Jan-1998  thorpej Update for config changes.
 1.16.2.1  12-Jan-1998  thorpej file ppb.c was added on branch bouyer-scsipi on 1998-01-12 09:40:13 +0000
 1.18.20.1  27-Dec-1999  wrstuden Pull up to last week's -current.
 1.18.16.1  15-Nov-1999  fvdl Sync with -current
 1.18.14.1  20-Nov-2000  bouyer Update thorpej_scsipi to -current as of a month ago
A i386 GENERIC kernel compiles without the siop, ahc and bha drivers
(will be updated later). i386 IDE/ATAPI and ncr work, as well as
sparc/esp_sbus. alpha should work as well (untested yet).
siop, ahc and bha will be updated once I've updated the branch to current
-current, as well as machine-dependant code.
 1.19.8.3  10-Oct-2002  jdolecek sync kqueue with -current; this includes merge of gehenna-devsw branch,
merge of i386 MP branch, and part of autoconf rototil work
 1.19.8.2  23-Jun-2002  jdolecek catch up with -current on kqueue branch
 1.19.8.1  10-Jan-2002  thorpej Sync kqueue branch with -current.
 1.19.6.4  03-Jan-2003  thorpej Sync with HEAD.
 1.19.6.3  18-Oct-2002  nathanw Catch up to -current.
 1.19.6.2  20-Jun-2002  nathanw Catch up to -current.
 1.19.6.1  14-Nov-2001  nathanw Catch up to -current.
 1.21.2.2  16-May-2002  thorpej * Add "pcitag_t *pba_bridgetag" to pci_attach_args. This is set to
NULL for root PCI busses. For busses behind a bridge, it points to
a persistent copy of the bridge's pcitag_t. This can be very useful
for machine-dependent PCI bus enumeration code.
* Implement a machine-dependent pci_enumerate_bus() for sparc64 which
uses OFW device nodes to enumerate the bus. When a PCI bus that is
behind a bridge is attached, pci_attach_hook() allocates a new PCI
chipset tag for the new bus and sets it's "curnode" to the OFW node
of the bridge. This is used as a starting point when enumerating
that bus. Root busses get the OFW node of the host bridge (psycho).
* Garbage-collect "ofpci" and "ofppb" from the sparc64 port.
 1.21.2.1  16-May-2002  thorpej file ppb.c was added on branch gehenna-devsw on 2002-05-16 01:01:31 +0000
 1.26.2.6  10-Nov-2005  skrll Sync with HEAD. Here we go again...
 1.26.2.5  04-Feb-2005  skrll Sync with HEAD.
 1.26.2.4  21-Sep-2004  skrll Fix the sync with head I botched.
 1.26.2.3  18-Sep-2004  skrll Sync with HEAD.
 1.26.2.2  03-Sep-2004  skrll Sync with HEAD
 1.26.2.1  03-Aug-2004  skrll Sync with HEAD
 1.29.6.1  12-Feb-2005  yamt sync with head.
 1.29.4.1  29-Apr-2005  kent sync with -current
 1.31.2.4  27-Feb-2008  yamt sync with head.
 1.31.2.3  21-Jan-2008  yamt sync with head
 1.31.2.2  27-Oct-2007  yamt sync with head.
 1.31.2.1  30-Dec-2006  yamt sync with head.
 1.32.22.2  10-Dec-2006  yamt sync with head.
 1.32.22.1  22-Oct-2006  yamt sync with head
 1.32.20.1  18-Nov-2006  ad Sync with head.
 1.34.26.1  18-Oct-2007  yamt sync with head.
 1.34.24.3  23-Mar-2008  matt sync with HEAD
 1.34.24.2  09-Jan-2008  matt sync with HEAD
 1.34.24.1  06-Nov-2007  matt sync with HEAD
 1.34.22.10  08-Dec-2007  jmcneill Rename pnp(9) -> pmf(9), as requested by many.
 1.34.22.9  06-Nov-2007  joerg Refactor PNP API:
- Make suspend/resume directly a device functionality. It consists of
three layers (class logic, device logic, bus logic), all of them being
optional. This replaces D0/D3 transitions.
- device_is_active returns true if the device was not disabled and was
not suspended (even partially), device_is_enabled returns true if the
device was enabled.
- Change pnp_global_transition into pnp_system_suspend and
pnp_system_resume. Before running any suspend/resume handlers, check
that all currently attached devices support power management and bail
out otherwise. The latter is not done for the shutdown/panic case.
- Make the former bus-specific generic network handlers a class handler.
- Make PNP message like volume up/down/toogle PNP events. Each device
can register what events they are interested in and whether the handler
should be global or not.
- Introduce device_active API for devices to mark themselve in use from
either the system or the device. Use this to implement the idle handling
for audio and input devices. This is intended to replace most ad-hoc
watchdogs as well.
- Fix somes situations in which audio resume would lose mixer settings.
- Make USB host controllers better deal with suspend in the light of
shared interrupts.
- Flush filesystem cache on suspend.
- Flush disk caches on suspend. Put ATA disks into standby on suspend as
well.
- Adopt drivers to use the new PNP API.
- Fix a critical bug in the generic cardbus layer that made D0->D3
break.
- Fix ral(4) to set if_stop.
- Convert cbb(4) to the new PNP API.
- Apply the PCI Express SCI fix on resume again.
 1.34.22.8  26-Oct-2007  joerg Sync with HEAD.

Follow the merge of pmap.c on i386 and amd64 and move
pmap_init_tmp_pgtbl into arch/x86/x86/pmap.c. Modify the ACPI wakeup
code to restore CR4 before jumping back into kernel space as the large
page option might cover that.
 1.34.22.7  08-Oct-2007  joerg Next attempt at trying to fix the irregular interrupt storms on my
Thinkpad: when we find a PCI Express device, check the list of
notification events and if any are sets, clear them. We can't handle
them ATM anyway.
 1.34.22.6  04-Oct-2007  joerg Remove SCI hack as the ACPI EC issues are fixed and those were the
likely source of this problem.
 1.34.22.5  01-Oct-2007  joerg Extend device API by device_power_private and device_power_set_private.
The latter is a temporary mean until the pnp_register API itself is
overhault. This functions allow a generic power handler to store its
state independent of the driver.

Use this and revamp the PCI power handling. Pretty much all PCI devices
had power handlers that did the same thing, generalize this in
pci_generic_power_register/deregister and the handler. This interface
offers callbacks for the drivers to save and restore state on
transistions. After a long discussion with jmcneill@ it was considered
to be powerful enough until evidence is shown that devices can handle
D1/D2 with less code and higher speed than without the full
save/restore. The generic code is carefully written to handle device
without PCI-PM support and ensure that the correct registers are written
to when D3 loses all state.

Reimplement the generic PCI network device handling on
top of PCI generic power handling.

Introduce pci_disable_retry as used and implemented locally at least by
ath(4) and iwi(4). Use it in this drivers to restore behaviour from
before the introduction of generic PCI network handling.

Convert all PCI drivers that were using pnp_register to the new
framework. The only exception is vga(4) as it is commonly used as
console device. Add a note therein that this should be fixed later.
 1.34.22.4  04-Sep-2007  joerg Disable PCI-E SCI on all ICH6+ chipsets.
 1.34.22.3  21-Aug-2007  joerg Disable SCI on the ICH6 PCI Express Ports -- if the BIOS enabled it
and such an event happened, the resulting interrupt storm would at
best keep the CPU over 40% busy and otherwise hang the box.

This is a bandaid until proper PCI Express support exists.
 1.34.22.2  08-Aug-2007  jmcneill Improve ppb power management support.
 1.34.22.1  03-Aug-2007  jmcneill Pull in power management changes from private branch.
 1.34.8.1  23-Oct-2007  ad Sync with head.
 1.35.8.1  11-Dec-2007  yamt sync with head.
 1.35.6.1  26-Dec-2007  ad Sync with head.
 1.36.10.2  02-Jun-2008  mjf Sync with HEAD.
 1.36.10.1  03-Apr-2008  mjf Sync with HEAD.
 1.36.6.1  24-Mar-2008  keiichi sync with head.
 1.37.4.3  11-Mar-2010  yamt sync with head
 1.37.4.2  04-May-2009  yamt sync with head.
 1.37.4.1  16-May-2008  yamt sync with head.
 1.37.2.1  18-May-2008  yamt sync with head.
 1.39.22.1  07-Jan-2011  matt On powerpc systems, match powerpc processors which are really PCIe PPBs.
 1.39.18.4  15-Feb-2014  matt sync pcireg.h with HEAD.
update if_wm.c and ppb.c accordingly.
 1.39.18.3  24-Dec-2011  matt Pull latest from -HEAD.
Add printing bus lanes and speed.
 1.39.18.2  28-Jan-2010  matt Change ppb_fix_pcix to ppb_fix_pcie since pcix is usually PCI-X while
pcie is PCI-Express.
 1.39.18.1  21-Jan-2010  matt Support the SB1250 LDT HB.
 1.39.14.1  13-May-2009  jym Sync with HEAD.

Commit is split, to avoid a "too many arguments" protocol error.
 1.39.10.1  11-May-2013  riz Applied patch (requested by msaitoh in ticket #1844):

sys/dev/pci/pcireg.h 1.69
sys/dev/pci/ppb.c 1.44-1.45

Support PCI Express 2.0.
Print version and device/port type information
[msaitoh, ticket #1844]
 1.39.8.1  28-Apr-2009  skrll Sync with HEAD.
 1.41.2.1  30-Apr-2010  uebayasi Sync with HEAD.
 1.42.2.1  05-Mar-2011  rmind sync with head
 1.47.6.1  18-Feb-2012  mrg merge to -current.
 1.47.2.3  22-May-2014  yamt sync with head.

for a reference, the tree before this commit was tagged
as yamt-pagecache-tag8.

this commit was splitted into small chunks to avoid
a limitation of cvs. ("Protocol error: too many arguments")
 1.47.2.2  30-Oct-2012  yamt sync with head
 1.47.2.1  17-Apr-2012  yamt sync with head
 1.49.6.3  03-Dec-2017  jdolecek update from HEAD
 1.49.6.2  23-Jun-2013  tls resync from head
 1.49.6.1  20-Nov-2012  tls Resync to 2012-11-19 00:00:00 UTC
 1.52.10.1  12-Dec-2014  martin Pull up following revision(s) (requested by msaitoh in ticket #311):
sys/dev/pci/ppb.c: revision 1.53
sys/dev/pci/ppb.c: revision 1.54
sys/dev/pci/pcireg.h: revision 1.96
- Modify message of PCIe capability version. This field (PCIE_XCAP_VER_MASK)
is not specification's version number but the capability structure's version
number. To avoid confusion, print "PCI Express capability version x".
- The max number of PCIe lane is not 16 but 32. Fix the bug using with macro.
- Use macro instead of magic number.
- Gb/s -> GT/s
Rename PCIE_XCAP_VER_* macros to avoid confusion.
 1.54.2.2  28-Aug-2017  skrll Sync with HEAD
 1.54.2.1  27-Dec-2015  skrll Sync with HEAD (as of 26th Dec)
 1.55.4.1  21-Apr-2017  bouyer Sync with HEAD
 1.55.2.1  26-Apr-2017  pgoyette Sync with HEAD
 1.60.2.2  11-May-2017  pgoyette Sync with HEAD
 1.60.2.1  02-May-2017  pgoyette Sync with HEAD - tag prg-localcount2-base1
 1.63.10.2  13-Apr-2020  martin Mostly merge changes from HEAD upto 20200411
 1.63.10.1  10-Jun-2019  christos Sync with HEAD
 1.63.8.1  26-Dec-2018  pgoyette Sync with HEAD, resolve a few conflicts
 1.63.2.3  03-Dec-2021  martin Pull up the following revisions, requested by msaitoh in ticket #1714:

sys/dev/pci/pcireg.h 1.148-1.154, 1.156-1.161
sys/dev/pci/pci_subr.c 1.217-1.222, 1.224, 1.227-1.232
via patch
sys/dev/pci/nvme_pci.c 1.31
sys/dev/pci/pci.c 1.158
sys/dev/pci/ppb.c 1.74

- Print Bridge Config Retry Enable bit and Retimer Presence Detect
Supported bit.
- Add PCIe 4.0 stuff a little:
- 10-bit Tag Requester/Completer.
- Add Data link Feature extended capability.
- Add Physical Layer 16.0 GT/s extended capability. Not decode yet.
- Change pci_conf_print() to allocate memory for the regs dynamically
instead of on-stack.
- Print some DPC register values not with %04x but with %08x because
those are 32bit.
- Fix a bug that the virtual channel extended configuration's
arbitration phase register can't be decoded correctly.
- When parsing Enhanced Allocation entries, use the correct calculation
for finding the next entry.
- Add 32.0GT/s to the list of pcie speeds (PCIe 5.x.).
- Add Some PCI config information:
- Lane Margining at the Receiver
- NVME admin interface
- UFSHCI
- InfiniBand
- Host fabric
- HDA 1.0 with vendor ext
- USB4 HCI
- MIPI I3C
- Cellular controller/modem (+ Ethernet)
- Change PCI_VENDOR_MASK and PCI_PRODUCT_MASK to unsigned values, to
prevent sign extension of product ID when shifted up into place in
PCI_ID_CODE(). Fixes PR kern/56176.
- Add LCAP & LCAP2 definitions.
- Use PCI-SIG official acronyms for some macros.
- Remove unused shift and mask definitions.
- Fix typo in some messages.
- Fix typo in comments.
- Whitespace fixes.
 1.63.2.2  17-Jul-2019  martin Pull up following revision(s) (requested by msaitoh in ticket #1295):

sys/dev/pci/pci_subr.c: revision 1.213
sys/dev/pci/ppb.c: revision 1.69

Identify 16GT/s.
 1.63.2.1  01-Feb-2019  martin Pull up following revision(s) (requested by msaitoh in ticket #1181):

sys/dev/pci/ppb.c: revision 1.66
sys/dev/pci/ppb.c: revision 1.67

Explicitly enable bus masterling in case BIOS, UEFI or firmware don't enable
it. Might fix PR kern/53811.

-

If the secondary bus is configured and the bus mastering is not enabled,
enable it. Suggested by thorpej@.
 1.69.2.1  03-Dec-2021  martin Pull up the following revisions, requested by msaitoh in ticket #1384:

sys/dev/pci/pcireg.h 1.152-1.154, 1.156-1.161
sys/dev/pci/pci_subr.c 1.222, 1.227-1.232 via patch
sys/dev/pci/nvme_pci.c 1.31
sys/dev/pci/pci.c 1.158, 1.163
sys/dev/pci/ppb.c 1.74

- When parsing Enhanced Allocation entries, use the correct calculation
for finding the next entry.
- Add 32.0GT/s to the list of pcie speeds (PCIe 5.x.).
- Add Some PCI config information:
- Lane Margining at the Receiver
- NVME admin interface
- UFSHCI
- InfiniBand
- Host fabric
- HDA 1.0 with vendor ext
- USB4 HCI
- MIPI I3C
- Cellular controller/modem (+ Ethernet)
- Change PCI_VENDOR_MASK and PCI_PRODUCT_MASK to unsigned values, to
prevent sign extension of product ID when shifted up into place in
PCI_ID_CODE(). Fixes PR kern/56176.
- Add LCAP & LCAP2 definitions.
- Use PCI-SIG official acronyms for some macros.
- Fix typo in some messages.
- Fix typo in comments.
- Whitespace fixes.
 1.70.4.1  23-Mar-2021  thorpej Convert config_found_ia() call sites where the device only carries
a single interface attribute to bare config_found() calls.
 1.71.4.1  31-May-2021  cjep sync with head
 1.71.2.1  13-May-2021  thorpej Sync with HEAD.
 1.72.4.1  04-Aug-2021  thorpej Adapt to CFARGS().
 1.74.4.1  06-Feb-2024  martin Pull up following revision(s) (requested by rin in ticket #588):

sys/dev/pci/ppb.c: revision 1.75

ppb(4): Print out PCIe Gen5 link speed correctly
 1.75.2.1  02-Aug-2025  perseant Sync with HEAD

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