ppb.c revision 1.34.22.1
1 /* $NetBSD: ppb.c,v 1.34.22.1 2007/08/03 22:17:21 jmcneill Exp $ */ 2 3 /* 4 * Copyright (c) 1996, 1998 Christopher G. Demetriou. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Christopher G. Demetriou 17 * for the NetBSD Project. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: ppb.c,v 1.34.22.1 2007/08/03 22:17:21 jmcneill Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 41 #include <dev/pci/pcireg.h> 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/ppbreg.h> 44 45 struct ppb_softc { 46 struct device sc_dev; /* generic device glue */ 47 pci_chipset_tag_t sc_pc; /* our PCI chipset... */ 48 pcitag_t sc_tag; /* ...and tag. */ 49 50 struct pci_conf_state sc_pciconf; 51 }; 52 53 static pnp_status_t ppb_power(device_t, pnp_request_t, void *); 54 55 static int 56 ppbmatch(struct device *parent, struct cfdata *match, 57 void *aux) 58 { 59 struct pci_attach_args *pa = aux; 60 61 /* 62 * Check the ID register to see that it's a PCI bridge. 63 * If it is, we assume that we can deal with it; it _should_ 64 * work in a standardized way... 65 */ 66 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE && 67 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_PCI) 68 return (1); 69 70 return (0); 71 } 72 73 static void 74 ppbattach(struct device *parent, struct device *self, void *aux) 75 { 76 struct ppb_softc *sc = (void *) self; 77 struct pci_attach_args *pa = aux; 78 pci_chipset_tag_t pc = pa->pa_pc; 79 struct pcibus_attach_args pba; 80 pcireg_t busdata; 81 char devinfo[256]; 82 83 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 84 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 85 PCI_REVISION(pa->pa_class)); 86 aprint_naive("\n"); 87 88 sc->sc_pc = pc; 89 sc->sc_tag = pa->pa_tag; 90 91 busdata = pci_conf_read(pc, pa->pa_tag, PPB_REG_BUSINFO); 92 93 if (PPB_BUSINFO_SECONDARY(busdata) == 0) { 94 aprint_normal("%s: not configured by system firmware\n", 95 self->dv_xname); 96 return; 97 } 98 99 #if 0 100 /* 101 * XXX can't do this, because we're not given our bus number 102 * (we shouldn't need it), and because we've no way to 103 * decompose our tag. 104 */ 105 /* sanity check. */ 106 if (pa->pa_bus != PPB_BUSINFO_PRIMARY(busdata)) 107 panic("ppbattach: bus in tag (%d) != bus in reg (%d)", 108 pa->pa_bus, PPB_BUSINFO_PRIMARY(busdata)); 109 #endif 110 111 if (pnp_register(self, ppb_power) != PNP_STATUS_SUCCESS) 112 aprint_error("%s: couldn't establish power handler\n", 113 device_xname(self)); 114 115 /* 116 * Attach the PCI bus than hangs off of it. 117 * 118 * XXX Don't pass-through Memory Read Multiple. Should we? 119 * XXX Consult the spec... 120 */ 121 pba.pba_iot = pa->pa_iot; 122 pba.pba_memt = pa->pa_memt; 123 pba.pba_dmat = pa->pa_dmat; 124 pba.pba_dmat64 = pa->pa_dmat64; 125 pba.pba_pc = pc; 126 pba.pba_flags = pa->pa_flags & ~PCI_FLAGS_MRM_OKAY; 127 pba.pba_bus = PPB_BUSINFO_SECONDARY(busdata); 128 pba.pba_bridgetag = &sc->sc_tag; 129 pba.pba_intrswiz = pa->pa_intrswiz; 130 pba.pba_intrtag = pa->pa_intrtag; 131 132 config_found_ia(self, "pcibus", &pba, pcibusprint); 133 } 134 135 static pnp_status_t 136 ppb_power(device_t dv, pnp_request_t req, void *opaque) 137 { 138 struct ppb_softc *sc; 139 pnp_capabilities_t *pcaps; 140 pnp_state_t *pstate; 141 142 sc = (struct ppb_softc *)dv; 143 switch (req) { 144 case PNP_REQUEST_GET_CAPABILITIES: 145 pcaps = opaque; 146 pcaps->state = PNP_STATE_D0 | PNP_STATE_D3; 147 break; 148 case PNP_REQUEST_GET_STATE: 149 pstate = opaque; 150 *pstate = PNP_STATE_D0; /* XXX */ 151 break; 152 case PNP_REQUEST_SET_STATE: 153 pstate = opaque; 154 switch (*pstate) { 155 case PNP_STATE_D0: 156 pci_conf_restore(sc->sc_pc, sc->sc_tag, 157 &sc->sc_pciconf); 158 break; 159 case PNP_STATE_D3: 160 pci_conf_capture(sc->sc_pc, sc->sc_tag, 161 &sc->sc_pciconf); 162 break; 163 default: 164 return PNP_STATUS_UNSUPPORTED; 165 } 166 break; 167 default: 168 return PNP_STATUS_UNSUPPORTED; 169 } 170 171 return PNP_STATUS_SUCCESS; 172 } 173 174 CFATTACH_DECL(ppb, sizeof(struct ppb_softc), 175 ppbmatch, ppbattach, NULL, NULL); 176
Indexes created Tue Oct 14 15:09:51 GMT 2025