ppb.c revision 1.34.22.8 1 /* $NetBSD: ppb.c,v 1.34.22.8 2007/10/26 15:46:53 joerg Exp $ */
2
3 /*
4 * Copyright (c) 1996, 1998 Christopher G. Demetriou. All rights reserved.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by Christopher G. Demetriou
17 * for the NetBSD Project.
18 * 4. The name of the author may not be used to endorse or promote products
19 * derived from this software without specific prior written permission
20 *
21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
31 */
32
33 #include <sys/cdefs.h>
34 __KERNEL_RCSID(0, "$NetBSD: ppb.c,v 1.34.22.8 2007/10/26 15:46:53 joerg Exp $");
35
36 #include <sys/param.h>
37 #include <sys/systm.h>
38 #include <sys/kernel.h>
39 #include <sys/device.h>
40
41 #include <dev/pci/pcireg.h>
42 #include <dev/pci/pcivar.h>
43 #include <dev/pci/ppbreg.h>
44 #include <dev/pci/pcidevs.h>
45
46 struct ppb_softc {
47 struct device sc_dev; /* generic device glue */
48 pci_chipset_tag_t sc_pc; /* our PCI chipset... */
49 pcitag_t sc_tag; /* ...and tag. */
50
51 pcireg_t sc_pciconfext[48];
52 };
53
54 static void ppb_resume(device_t);
55 static void ppb_suspend(device_t);
56
57 static int
58 ppbmatch(struct device *parent, struct cfdata *match,
59 void *aux)
60 {
61 struct pci_attach_args *pa = aux;
62
63 /*
64 * Check the ID register to see that it's a PCI bridge.
65 * If it is, we assume that we can deal with it; it _should_
66 * work in a standardized way...
67 */
68 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE &&
69 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_PCI)
70 return (1);
71
72 return (0);
73 }
74
75 static void
76 ppb_fix_pcix(device_t self, struct pci_attach_args *pa)
77 {
78 pcireg_t reg;
79 int off;
80
81 if (!pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_PCIEXPRESS,
82 &off, ®))
83 return; /* Not a PCIe device */
84
85 if ((reg & 0x000f0000) != 0x00010000) {
86 aprint_normal_dev(self, "unuspported PCI Express version\n");
87 return;
88 }
89 reg = pci_conf_read(pa->pa_pc, pa->pa_tag, off + 0x18);
90 if (reg & 0x003f) {
91 aprint_normal_dev(self, "disabling notification events\n");
92 reg &= ~0x003f;
93 pci_conf_write(pa->pa_pc, pa->pa_tag, off + 0x18, reg);
94 }
95 }
96
97 static void
98 ppbattach(struct device *parent, struct device *self, void *aux)
99 {
100 struct ppb_softc *sc = (void *) self;
101 struct pci_attach_args *pa = aux;
102 pci_chipset_tag_t pc = pa->pa_pc;
103 struct pcibus_attach_args pba;
104 pcireg_t busdata;
105 char devinfo[256];
106 pnp_status_t pnp_status;
107
108 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo));
109 aprint_normal(": %s (rev. 0x%02x)\n", devinfo,
110 PCI_REVISION(pa->pa_class));
111 aprint_naive("\n");
112
113 sc->sc_pc = pc;
114 sc->sc_tag = pa->pa_tag;
115
116 busdata = pci_conf_read(pc, pa->pa_tag, PPB_REG_BUSINFO);
117
118 if (PPB_BUSINFO_SECONDARY(busdata) == 0) {
119 aprint_normal("%s: not configured by system firmware\n",
120 self->dv_xname);
121 return;
122 }
123
124 ppb_fix_pcix(self, pa);
125
126 ppb_fix_pcix(self, pa);
127
128 #if 0
129 /*
130 * XXX can't do this, because we're not given our bus number
131 * (we shouldn't need it), and because we've no way to
132 * decompose our tag.
133 */
134 /* sanity check. */
135 if (pa->pa_bus != PPB_BUSINFO_PRIMARY(busdata))
136 panic("ppbattach: bus in tag (%d) != bus in reg (%d)",
137 pa->pa_bus, PPB_BUSINFO_PRIMARY(busdata));
138 #endif
139
140 pnp_status = pci_generic_power_register(self, pa->pa_pc, pa->pa_tag,
141 ppb_suspend, ppb_resume);
142 if (pnp_status != PNP_STATUS_SUCCESS) {
143 aprint_error("%s: couldn't establish power handler\n",
144 device_xname(self));
145 }
146
147 /*
148 * Attach the PCI bus than hangs off of it.
149 *
150 * XXX Don't pass-through Memory Read Multiple. Should we?
151 * XXX Consult the spec...
152 */
153 pba.pba_iot = pa->pa_iot;
154 pba.pba_memt = pa->pa_memt;
155 pba.pba_dmat = pa->pa_dmat;
156 pba.pba_dmat64 = pa->pa_dmat64;
157 pba.pba_pc = pc;
158 pba.pba_flags = pa->pa_flags & ~PCI_FLAGS_MRM_OKAY;
159 pba.pba_bus = PPB_BUSINFO_SECONDARY(busdata);
160 pba.pba_bridgetag = &sc->sc_tag;
161 pba.pba_intrswiz = pa->pa_intrswiz;
162 pba.pba_intrtag = pa->pa_intrtag;
163
164 config_found_ia(self, "pcibus", &pba, pcibusprint);
165 }
166
167 static void
168 ppb_resume(device_t dv)
169 {
170 struct ppb_softc *sc = device_private(dv);
171 int off;
172 pcireg_t val;
173
174 for (off = 0x40; off <= 0xff; off += 4) {
175 val = pci_conf_read(sc->sc_pc, sc->sc_tag, off);
176 if (val != sc->sc_pciconfext[(off - 0x40) / 4])
177 pci_conf_write(sc->sc_pc, sc->sc_tag, off,
178 sc->sc_pciconfext[(off - 0x40)/4]);
179 }
180 }
181
182 static void
183 ppb_suspend(device_t dv)
184 {
185 struct ppb_softc *sc = device_private(dv);
186 int off;
187
188 for (off = 0x40; off <= 0xff; off += 4)
189 sc->sc_pciconfext[(off - 0x40) / 4] =
190 pci_conf_read(sc->sc_pc, sc->sc_tag, off);
191 }
192
193 CFATTACH_DECL(ppb, sizeof(struct ppb_softc),
194 ppbmatch, ppbattach, NULL, NULL);
195