ppb.c revision 1.39.18.2
1 /* $NetBSD: ppb.c,v 1.39.18.2 2010/01/28 17:42:37 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1996, 1998 Christopher G. Demetriou. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Christopher G. Demetriou 17 * for the NetBSD Project. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: ppb.c,v 1.39.18.2 2010/01/28 17:42:37 matt Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 41 #include <dev/pci/pcireg.h> 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/ppbreg.h> 44 #include <dev/pci/pcidevs.h> 45 46 struct ppb_softc { 47 device_t sc_dev; /* generic device glue */ 48 pci_chipset_tag_t sc_pc; /* our PCI chipset... */ 49 pcitag_t sc_tag; /* ...and tag. */ 50 51 pcireg_t sc_pciconfext[48]; 52 }; 53 54 static bool ppb_resume(device_t PMF_FN_PROTO); 55 static bool ppb_suspend(device_t PMF_FN_PROTO); 56 57 static int 58 ppbmatch(device_t parent, cfdata_t match, void *aux) 59 { 60 struct pci_attach_args *pa = aux; 61 62 /* 63 * Check the ID register to see that it's a PCI bridge. 64 * If it is, we assume that we can deal with it; it _should_ 65 * work in a standardized way... 66 */ 67 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE && 68 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_PCI) 69 return 1; 70 71 #ifdef _MIPS_PADDR_T_64BIT 72 /* The LDT HB acts just like a PPB. */ 73 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_SIBYTE && 74 PCI_PRODUCT(pa->pa_id) == PCI_PRODUCT_SIBYTE_BCM1250_LDTHB) 75 return 1; 76 #endif 77 78 return 0; 79 } 80 81 static void 82 ppb_fix_pcie(device_t self) 83 { 84 struct ppb_softc *sc = device_private(self); 85 pcireg_t reg; 86 int off; 87 88 if (!pci_get_capability(sc->sc_pc, sc->sc_tag, PCI_CAP_PCIEXPRESS, 89 &off, ®)) 90 return; /* Not a PCIe device */ 91 92 if ((reg & 0x000f0000) != 0x00010000) { 93 aprint_normal_dev(self, "unsupported PCI Express version\n"); 94 return; 95 } 96 reg = pci_conf_read(sc->sc_pc, sc->sc_tag, off + 0x18); 97 if (reg & 0x003f) { 98 aprint_normal_dev(self, "disabling notification events\n"); 99 reg &= ~0x003f; 100 pci_conf_write(sc->sc_pc, sc->sc_tag, off + 0x18, reg); 101 } 102 } 103 104 static void 105 ppbattach(device_t parent, device_t self, void *aux) 106 { 107 struct ppb_softc *sc = device_private(self); 108 struct pci_attach_args *pa = aux; 109 pci_chipset_tag_t pc = pa->pa_pc; 110 struct pcibus_attach_args pba; 111 pcireg_t busdata; 112 char devinfo[256]; 113 114 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 115 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 116 PCI_REVISION(pa->pa_class)); 117 aprint_naive("\n"); 118 119 sc->sc_pc = pc; 120 sc->sc_tag = pa->pa_tag; 121 sc->sc_dev = self; 122 123 busdata = pci_conf_read(pc, pa->pa_tag, PPB_REG_BUSINFO); 124 125 if (PPB_BUSINFO_SECONDARY(busdata) == 0) { 126 aprint_normal_dev(self, "not configured by system firmware\n"); 127 return; 128 } 129 130 ppb_fix_pcie(self); 131 132 #if 0 133 /* 134 * XXX can't do this, because we're not given our bus number 135 * (we shouldn't need it), and because we've no way to 136 * decompose our tag. 137 */ 138 /* sanity check. */ 139 if (pa->pa_bus != PPB_BUSINFO_PRIMARY(busdata)) 140 panic("ppbattach: bus in tag (%d) != bus in reg (%d)", 141 pa->pa_bus, PPB_BUSINFO_PRIMARY(busdata)); 142 #endif 143 144 if (!pmf_device_register(self, ppb_suspend, ppb_resume)) 145 aprint_error_dev(self, "couldn't establish power handler\n"); 146 147 /* 148 * Attach the PCI bus than hangs off of it. 149 * 150 * XXX Don't pass-through Memory Read Multiple. Should we? 151 * XXX Consult the spec... 152 */ 153 pba.pba_iot = pa->pa_iot; 154 pba.pba_memt = pa->pa_memt; 155 pba.pba_dmat = pa->pa_dmat; 156 pba.pba_dmat64 = pa->pa_dmat64; 157 pba.pba_pc = pc; 158 pba.pba_flags = pa->pa_flags & ~PCI_FLAGS_MRM_OKAY; 159 pba.pba_bus = PPB_BUSINFO_SECONDARY(busdata); 160 pba.pba_bridgetag = &sc->sc_tag; 161 pba.pba_intrswiz = pa->pa_intrswiz; 162 pba.pba_intrtag = pa->pa_intrtag; 163 164 config_found_ia(self, "pcibus", &pba, pcibusprint); 165 } 166 167 static int 168 ppbdetach(device_t self, int flags) 169 { 170 int rc; 171 172 if ((rc = config_detach_children(self, flags)) != 0) 173 return rc; 174 pmf_device_deregister(self); 175 return 0; 176 } 177 178 static bool 179 ppb_resume(device_t dv PMF_FN_ARGS) 180 { 181 struct ppb_softc *sc = device_private(dv); 182 int off; 183 pcireg_t val; 184 185 for (off = 0x40; off <= 0xff; off += 4) { 186 val = pci_conf_read(sc->sc_pc, sc->sc_tag, off); 187 if (val != sc->sc_pciconfext[(off - 0x40) / 4]) 188 pci_conf_write(sc->sc_pc, sc->sc_tag, off, 189 sc->sc_pciconfext[(off - 0x40)/4]); 190 } 191 192 ppb_fix_pcie(dv); 193 194 return true; 195 } 196 197 static bool 198 ppb_suspend(device_t dv PMF_FN_ARGS) 199 { 200 struct ppb_softc *sc = device_private(dv); 201 int off; 202 203 for (off = 0x40; off <= 0xff; off += 4) 204 sc->sc_pciconfext[(off - 0x40) / 4] = 205 pci_conf_read(sc->sc_pc, sc->sc_tag, off); 206 207 return true; 208 } 209 210 static void 211 ppbchilddet(device_t self, device_t child) 212 { 213 /* we keep no references to child devices, so do nothing */ 214 } 215 216 CFATTACH_DECL2_NEW(ppb, sizeof(struct ppb_softc), 217 ppbmatch, ppbattach, ppbdetach, NULL, NULL, ppbchilddet); 218
Indexes created Mon Oct 13 16:09:52 GMT 2025