ppb.c revision 1.43
1 /* $NetBSD: ppb.c,v 1.43 2010/12/11 18:25:02 matt Exp $ */ 2 3 /* 4 * Copyright (c) 1996, 1998 Christopher G. Demetriou. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Christopher G. Demetriou 17 * for the NetBSD Project. 18 * 4. The name of the author may not be used to endorse or promote products 19 * derived from this software without specific prior written permission 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 22 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 23 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 24 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 25 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 26 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 27 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 28 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 29 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 30 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 31 */ 32 33 #include <sys/cdefs.h> 34 __KERNEL_RCSID(0, "$NetBSD: ppb.c,v 1.43 2010/12/11 18:25:02 matt Exp $"); 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/device.h> 40 41 #include <dev/pci/pcireg.h> 42 #include <dev/pci/pcivar.h> 43 #include <dev/pci/ppbreg.h> 44 #include <dev/pci/pcidevs.h> 45 46 struct ppb_softc { 47 device_t sc_dev; /* generic device glue */ 48 pci_chipset_tag_t sc_pc; /* our PCI chipset... */ 49 pcitag_t sc_tag; /* ...and tag. */ 50 51 pcireg_t sc_pciconfext[48]; 52 }; 53 54 static bool ppb_resume(device_t, const pmf_qual_t *); 55 static bool ppb_suspend(device_t, const pmf_qual_t *); 56 57 static int 58 ppbmatch(device_t parent, cfdata_t match, void *aux) 59 { 60 struct pci_attach_args *pa = aux; 61 62 /* 63 * Check the ID register to see that it's a PCI bridge. 64 * If it is, we assume that we can deal with it; it _should_ 65 * work in a standardized way... 66 */ 67 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_BRIDGE && 68 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_BRIDGE_PCI) 69 return 1; 70 71 #ifdef __powerpc__ 72 if (PCI_CLASS(pa->pa_class) == PCI_CLASS_PROCESSOR && 73 PCI_SUBCLASS(pa->pa_class) == PCI_SUBCLASS_PROCESSOR_POWERPC) { 74 pcireg_t bhlc = pci_conf_read(pa->pa_pc, pa->pa_tag, 75 PCI_BHLC_REG); 76 if (PCI_VENDOR(pa->pa_id) == PCI_VENDOR_FREESCALE 77 && PCI_HDRTYPE(bhlc) == PCI_HDRTYPE_RC) 78 return 1; 79 } 80 #endif 81 82 return 0; 83 } 84 85 static void 86 ppb_fix_pcix(device_t self) 87 { 88 struct ppb_softc *sc = device_private(self); 89 pcireg_t reg; 90 int off; 91 92 if (!pci_get_capability(sc->sc_pc, sc->sc_tag, PCI_CAP_PCIEXPRESS, 93 &off, ®)) 94 return; /* Not a PCIe device */ 95 96 if ((reg & 0x000f0000) != 0x00010000) { 97 aprint_normal_dev(self, "unsupported PCI Express version\n"); 98 return; 99 } 100 reg = pci_conf_read(sc->sc_pc, sc->sc_tag, off + 0x18); 101 if (reg & 0x003f) { 102 aprint_normal_dev(self, "disabling notification events\n"); 103 reg &= ~0x003f; 104 pci_conf_write(sc->sc_pc, sc->sc_tag, off + 0x18, reg); 105 } 106 } 107 108 static void 109 ppbattach(device_t parent, device_t self, void *aux) 110 { 111 struct ppb_softc *sc = device_private(self); 112 struct pci_attach_args *pa = aux; 113 pci_chipset_tag_t pc = pa->pa_pc; 114 struct pcibus_attach_args pba; 115 pcireg_t busdata; 116 char devinfo[256]; 117 118 pci_devinfo(pa->pa_id, pa->pa_class, 0, devinfo, sizeof(devinfo)); 119 aprint_normal(": %s (rev. 0x%02x)\n", devinfo, 120 PCI_REVISION(pa->pa_class)); 121 aprint_naive("\n"); 122 123 sc->sc_pc = pc; 124 sc->sc_tag = pa->pa_tag; 125 sc->sc_dev = self; 126 127 busdata = pci_conf_read(pc, pa->pa_tag, PPB_REG_BUSINFO); 128 129 if (PPB_BUSINFO_SECONDARY(busdata) == 0) { 130 aprint_normal_dev(self, "not configured by system firmware\n"); 131 return; 132 } 133 134 ppb_fix_pcix(self); 135 136 #if 0 137 /* 138 * XXX can't do this, because we're not given our bus number 139 * (we shouldn't need it), and because we've no way to 140 * decompose our tag. 141 */ 142 /* sanity check. */ 143 if (pa->pa_bus != PPB_BUSINFO_PRIMARY(busdata)) 144 panic("ppbattach: bus in tag (%d) != bus in reg (%d)", 145 pa->pa_bus, PPB_BUSINFO_PRIMARY(busdata)); 146 #endif 147 148 if (!pmf_device_register(self, ppb_suspend, ppb_resume)) 149 aprint_error_dev(self, "couldn't establish power handler\n"); 150 151 /* 152 * Attach the PCI bus than hangs off of it. 153 * 154 * XXX Don't pass-through Memory Read Multiple. Should we? 155 * XXX Consult the spec... 156 */ 157 pba.pba_iot = pa->pa_iot; 158 pba.pba_memt = pa->pa_memt; 159 pba.pba_dmat = pa->pa_dmat; 160 pba.pba_dmat64 = pa->pa_dmat64; 161 pba.pba_pc = pc; 162 pba.pba_flags = pa->pa_flags & ~PCI_FLAGS_MRM_OKAY; 163 pba.pba_bus = PPB_BUSINFO_SECONDARY(busdata); 164 pba.pba_bridgetag = &sc->sc_tag; 165 pba.pba_intrswiz = pa->pa_intrswiz; 166 pba.pba_intrtag = pa->pa_intrtag; 167 168 config_found_ia(self, "pcibus", &pba, pcibusprint); 169 } 170 171 static int 172 ppbdetach(device_t self, int flags) 173 { 174 int rc; 175 176 if ((rc = config_detach_children(self, flags)) != 0) 177 return rc; 178 pmf_device_deregister(self); 179 return 0; 180 } 181 182 static bool 183 ppb_resume(device_t dv, const pmf_qual_t *qual) 184 { 185 struct ppb_softc *sc = device_private(dv); 186 int off; 187 pcireg_t val; 188 189 for (off = 0x40; off <= 0xff; off += 4) { 190 val = pci_conf_read(sc->sc_pc, sc->sc_tag, off); 191 if (val != sc->sc_pciconfext[(off - 0x40) / 4]) 192 pci_conf_write(sc->sc_pc, sc->sc_tag, off, 193 sc->sc_pciconfext[(off - 0x40)/4]); 194 } 195 196 ppb_fix_pcix(dv); 197 198 return true; 199 } 200 201 static bool 202 ppb_suspend(device_t dv, const pmf_qual_t *qual) 203 { 204 struct ppb_softc *sc = device_private(dv); 205 int off; 206 207 for (off = 0x40; off <= 0xff; off += 4) 208 sc->sc_pciconfext[(off - 0x40) / 4] = 209 pci_conf_read(sc->sc_pc, sc->sc_tag, off); 210 211 return true; 212 } 213 214 static void 215 ppbchilddet(device_t self, device_t child) 216 { 217 /* we keep no references to child devices, so do nothing */ 218 } 219 220 CFATTACH_DECL3_NEW(ppb, sizeof(struct ppb_softc), 221 ppbmatch, ppbattach, ppbdetach, NULL, NULL, ppbchilddet, 222 DVF_DETACH_SHUTDOWN); 223
Indexes created Wed Sep 24 02:09:48 GMT 2025