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if_eireg.h revision 1.1
      1  1.1  bjh21 /* $NetBSD: if_eireg.h,v 1.1 2001/03/19 23:58:12 bjh21 Exp $ */
      2  1.1  bjh21 
      3  1.1  bjh21 /*
      4  1.1  bjh21  * 2000 Ben Harris
      5  1.1  bjh21  *
      6  1.1  bjh21  * This file is in the public domain.
      7  1.1  bjh21  */
      8  1.1  bjh21 
      9  1.1  bjh21 /*
     10  1.1  bjh21  * if_eireg.h - register definitions etc for the Acorn Ether1 card
     11  1.1  bjh21  */
     12  1.1  bjh21 
     13  1.1  bjh21 #ifndef _IF_EIREG_H_
     14  1.1  bjh21 #define _IF_EIREG_H_
     15  1.1  bjh21 
     16  1.1  bjh21 /*
     17  1.1  bjh21  * My understanding of this card is as follows.  Note that this is
     18  1.1  bjh21  * mostly derived from reading other people's code, so it may be
     19  1.1  bjh21  * hideously inaccurate.
     20  1.1  bjh21  *
     21  1.1  bjh21  * The card has three address spaces.  The ROM is mapped into the
     22  1.1  bjh21  * bottom n (16?) bytes of SYNC address space, and contains the
     23  1.1  bjh21  * expansion card ID information and the Ethernet address.  There is a
     24  1.1  bjh21  * (write only?) set of registers at the start of the FAST address
     25  1.1  bjh21  * space.  One of these performs miscellaneous control functions, and
     26  1.1  bjh21  * the other acts as a page selector for the board memory.  The board
     27  1.1  bjh21  * has 64k of RAM, and 4k pages of this can be mapped at offset 0x2000
     28  1.1  bjh21  * in the FAST space by writing the page number to the page register.
     29  1.1  bjh21  * The 82586 has access to the whole of this memory and (I believe)
     30  1.1  bjh21  * sees it as the top 64k of its address space.
     31  1.1  bjh21  */
     32  1.1  bjh21 
     33  1.1  bjh21 /* Registers in the board's control space */
     34  1.1  bjh21 #define EI_PAGE		0
     35  1.1  bjh21 #define EI_CONTROL	1
     36  1.1  bjh21 #define EI_CTL_RESET	0x01
     37  1.1  bjh21 #define EI_CTL_LOOP	0x02
     38  1.1  bjh21 #define EI_CTL_ATTN	0x04
     39  1.1  bjh21 #define EI_CTL_CLI	0x08
     40  1.1  bjh21 
     41  1.1  bjh21 /* Offset of base of memory in bus_addr_t units */
     42  1.1  bjh21 #define EI_MEMOFF	0x2000
     43  1.1  bjh21 
     44  1.1  bjh21 /*
     45  1.1  bjh21  * All addresses within board RAM are in bytes of actual RAM.  RAM is
     46  1.1  bjh21  * 16 bis wide, and can only be accessed by word transfers
     47  1.1  bjh21  * (bus_space_xxx_2).
     48  1.1  bjh21  */
     49  1.1  bjh21 #define EI_MEMSIZE	0x10000
     50  1.1  bjh21 #define EI_MEMBASE	(0x1000000 - EI_MEMSIZE)
     51  1.1  bjh21 #define EI_PAGESIZE	0x1000
     52  1.1  bjh21 #define EI_NPAGES	(EI_MEMSIZE / EI_PAGESIZE)
     53  1.1  bjh21 #define ei_atop(a)	(((a) % EI_MEMSIZE) / EI_PAGESIZE)
     54  1.1  bjh21 #define ei_atopo(a)	((a) % EI_PAGESIZE)
     55  1.1  bjh21 
     56  1.1  bjh21 #define EI_SCP_ADDR	IE_SCP_ADDR % EI_MEMSIZE
     57  1.1  bjh21 
     58  1.1  bjh21 #define EI_ROMSIZE	16
     59  1.1  bjh21 #define EI_ROM_HWREV	8
     60  1.1  bjh21 #define EI_ROM_EADDR	9
     61  1.1  bjh21 
     62  1.1  bjh21 #endif
     63