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      1 /*	$NetBSD: qec.c,v 1.55 2022/09/25 18:03:04 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Paul Kranenburg.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: qec.c,v 1.55 2022/09/25 18:03:04 thorpej Exp $");
     34 
     35 #include <sys/param.h>
     36 #include <sys/systm.h>
     37 #include <sys/kernel.h>
     38 #include <sys/errno.h>
     39 #include <sys/device.h>
     40 
     41 #include <sys/bus.h>
     42 #include <sys/intr.h>
     43 #include <machine/autoconf.h>
     44 
     45 #include <dev/sbus/sbusvar.h>
     46 #include <dev/sbus/qecreg.h>
     47 #include <dev/sbus/qecvar.h>
     48 
     49 static int	qecprint(void *, const char *);
     50 static int	qecmatch(device_t, cfdata_t, void *);
     51 static void	qecattach(device_t, device_t, void *);
     52 void		qec_init(struct qec_softc *);
     53 
     54 static int qec_bus_map(
     55 		bus_space_tag_t,
     56 		bus_addr_t,		/*coded slot+offset*/
     57 		bus_size_t,		/*size*/
     58 		int,			/*flags*/
     59 		vaddr_t,		/*preferred virtual address */
     60 		bus_space_handle_t *);
     61 static void *qec_intr_establish(
     62 		bus_space_tag_t,
     63 		int,			/*bus interrupt priority*/
     64 		int,			/*`device class' interrupt level*/
     65 		int (*)(void *),	/*handler*/
     66 		void *,			/*arg*/
     67 		void (*)(void));	/*optional fast trap handler*/
     68 
     69 CFATTACH_DECL_NEW(qec, sizeof(struct qec_softc),
     70     qecmatch, qecattach, NULL, NULL);
     71 
     72 int
     73 qecprint(void *aux, const char *busname)
     74 {
     75 	struct sbus_attach_args *sa = aux;
     76 	bus_space_tag_t t = sa->sa_bustag;
     77 	struct qec_softc *sc = t->cookie;
     78 
     79 	sa->sa_bustag = sc->sc_bustag;	/* XXX */
     80 	sbus_print(aux, busname);	/* XXX */
     81 	sa->sa_bustag = t;		/* XXX */
     82 	return (UNCONF);
     83 }
     84 
     85 int
     86 qecmatch(device_t parent, cfdata_t cf, void *aux)
     87 {
     88 	struct sbus_attach_args *sa = aux;
     89 
     90 	return (strcmp(cf->cf_name, sa->sa_name) == 0);
     91 }
     92 
     93 /*
     94  * Attach all the sub-devices we can find
     95  */
     96 void
     97 qecattach(device_t parent, device_t self, void *aux)
     98 {
     99 	struct sbus_attach_args *sa = aux;
    100 	struct qec_softc *sc = device_private(self);
    101 	struct sbus_softc *sbsc = device_private(parent);
    102 	int node;
    103 	int sbusburst;
    104 	bus_space_tag_t sbt;
    105 	bus_space_handle_t bh;
    106 	int error;
    107 
    108 	sc->sc_dev = self;
    109 	sc->sc_bustag = sa->sa_bustag;
    110 	sc->sc_dmatag = sa->sa_dmatag;
    111 	node = sa->sa_node;
    112 
    113 	if (sa->sa_nreg < 2) {
    114 		printf("%s: only %d register sets\n",
    115 			device_xname(self), sa->sa_nreg);
    116 		return;
    117 	}
    118 
    119 	if (sbus_bus_map(sa->sa_bustag,
    120 			 sa->sa_reg[0].oa_space,
    121 			 sa->sa_reg[0].oa_base,
    122 			 sa->sa_reg[0].oa_size,
    123 			 0, &sc->sc_regs) != 0) {
    124 		aprint_error_dev(self, "attach: cannot map registers\n");
    125 		return;
    126 	}
    127 
    128 	/*
    129 	 * This device's "register space 1" is just a buffer where the
    130 	 * Lance ring-buffers can be stored. Note the buffer's location
    131 	 * and size, so the child driver can pick them up.
    132 	 */
    133 	if (sbus_bus_map(sa->sa_bustag,
    134 			 sa->sa_reg[1].oa_space,
    135 			 sa->sa_reg[1].oa_base,
    136 			 sa->sa_reg[1].oa_size,
    137 			 BUS_SPACE_MAP_LINEAR, &bh) != 0) {
    138 		aprint_error_dev(self, "attach: cannot map registers\n");
    139 		return;
    140 	}
    141 	sc->sc_buffer = (void *)bus_space_vaddr(sa->sa_bustag, bh);
    142 	sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].oa_size;
    143 
    144 	/* Get number of on-board channels */
    145 	sc->sc_nchannels = prom_getpropint(node, "#channels", -1);
    146 	if (sc->sc_nchannels == -1) {
    147 		printf(": no channels\n");
    148 		return;
    149 	}
    150 
    151 	/*
    152 	 * Get transfer burst size from PROM
    153 	 */
    154 	sbusburst = sbsc->sc_burst;
    155 	if (sbusburst == 0)
    156 		sbusburst = SBUS_BURST_32 - 1; /* 1->16 */
    157 
    158 	sc->sc_burst = prom_getpropint(node, "burst-sizes", -1);
    159 	if (sc->sc_burst == -1)
    160 		/* take SBus burst sizes */
    161 		sc->sc_burst = sbusburst;
    162 
    163 	/* Clamp at parent's burst sizes */
    164 	sc->sc_burst &= sbusburst;
    165 
    166 	/* Allocate a bus tag */
    167 	sbt = bus_space_tag_alloc(sc->sc_bustag, sc);
    168 	if (sbt == NULL) {
    169 		aprint_error_dev(self, "attach: out of memory\n");
    170 		return;
    171 	}
    172 
    173 	sbt->sparc_bus_map = qec_bus_map;
    174 	sbt->sparc_intr_establish = qec_intr_establish;
    175 
    176 	/*
    177 	 * Collect address translations from the OBP.
    178 	 */
    179 	error = prom_getprop(node, "ranges", sizeof(struct openprom_range),
    180 			 &sbt->nranges, &sbt->ranges);
    181 	switch (error) {
    182 	case 0:
    183 		break;
    184 	case ENOENT:
    185 	default:
    186 		panic("%s: error getting ranges property", device_xname(self));
    187 	}
    188 
    189 	/*
    190 	 * Save interrupt information for use in our qec_intr_establish()
    191 	 * function below. Apparently, the intr level for the quad
    192 	 * ethernet board (qe) is stored in the QEC node rather than
    193 	 * separately in each of the QE nodes.
    194 	 *
    195 	 * XXX - qe.c should call bus_intr_establish() with `level = 0'..
    196 	 * XXX - maybe we should have our own attach args for all that.
    197 	 */
    198 	sc->sc_intr = sa->sa_intr;
    199 
    200 	printf(": %dK memory\n", sc->sc_bufsiz / 1024);
    201 
    202 	qec_init(sc);
    203 
    204 	/* search through children */
    205 	devhandle_t selfh = device_handle(self);
    206 	for (node = firstchild(node); node; node = nextsibling(node)) {
    207 		struct sbus_attach_args sax;
    208 		sbus_setup_attach_args(sbsc,
    209 				       sbt, sc->sc_dmatag, node, &sax);
    210 		(void)config_found(self, (void *)&sax, qecprint,
    211 		    CFARGS(.devhandle = prom_node_to_devhandle(selfh, node)));
    212 		sbus_destroy_attach_args(&sax);
    213 	}
    214 }
    215 
    216 int
    217 qec_bus_map(bus_space_tag_t t, bus_addr_t ba, bus_size_t size, int flags,
    218     vaddr_t va, bus_space_handle_t *hp)
    219 	/* va:	 Ignored */
    220 {
    221 	int error;
    222 
    223 	if ((error = bus_space_translate_address_generic(
    224 				t->ranges, t->nranges, &ba)) != 0)
    225 		return (error);
    226 
    227 	return (bus_space_map(t->parent, ba, size, flags, hp));
    228 }
    229 
    230 void *
    231 qec_intr_establish(bus_space_tag_t t, int pri, int level,
    232     int (*handler)(void *), void *arg, void (*fastvec)(void))
    233 	/* (*fastvec)(void): ignored */
    234 {
    235 	struct qec_softc *sc = t->cookie;
    236 
    237 	if (pri == 0) {
    238 		/*
    239 		 * qe.c calls bus_intr_establish() with `pri == 0'
    240 		 * XXX - see also comment in qec_attach().
    241 		 */
    242 		if (sc->sc_intr == NULL) {
    243 			printf("%s: warning: no interrupts\n",
    244 				device_xname(sc->sc_dev));
    245 			return (NULL);
    246 		}
    247 		pri = sc->sc_intr->oi_pri;
    248 	}
    249 
    250 	return (bus_intr_establish(t->parent, pri, level, handler, arg));
    251 }
    252 
    253 void
    254 qec_init(struct qec_softc *sc)
    255 {
    256 	bus_space_tag_t t = sc->sc_bustag;
    257 	bus_space_handle_t qr = sc->sc_regs;
    258 	uint32_t v, burst = 0, psize;
    259 	int i;
    260 
    261 	/* First, reset the controller */
    262 	bus_space_write_4(t, qr, QEC_QRI_CTRL, QEC_CTRL_RESET);
    263 	for (i = 0; i < 1000; i++) {
    264 		DELAY(100);
    265 		v = bus_space_read_4(t, qr, QEC_QRI_CTRL);
    266 		if ((v & QEC_CTRL_RESET) == 0)
    267 			break;
    268 	}
    269 
    270 	/*
    271 	 * Cut available buffer size into receive and transmit buffers.
    272 	 * XXX - should probably be done in be & qe driver...
    273 	 */
    274 	v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels;
    275 	bus_space_write_4(t, qr, QEC_QRI_MSIZE, v);
    276 
    277 	v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2);
    278 	bus_space_write_4(t, qr, QEC_QRI_RSIZE, v);
    279 	bus_space_write_4(t, qr, QEC_QRI_TSIZE, v);
    280 
    281 	psize = sc->sc_nchannels == 1 ? QEC_PSIZE_2048 : 0;
    282 	bus_space_write_4(t, qr, QEC_QRI_PSIZE, psize);
    283 
    284 	if (sc->sc_burst & SBUS_BURST_64)
    285 		burst = QEC_CTRL_B64;
    286 	else if (sc->sc_burst & SBUS_BURST_32)
    287 		burst = QEC_CTRL_B32;
    288 	else
    289 		burst = QEC_CTRL_B16;
    290 
    291 	v = bus_space_read_4(t, qr, QEC_QRI_CTRL);
    292 	v = (v & QEC_CTRL_MODEMASK) | burst;
    293 	bus_space_write_4(t, qr, QEC_QRI_CTRL, v);
    294 }
    295 
    296 /*
    297  * Common routine to initialize the QEC packet ring buffer.
    298  * Called from be & qe drivers.
    299  */
    300 void
    301 qec_meminit(struct qec_ring *qr, unsigned int pktbufsz)
    302 {
    303 	bus_addr_t txbufdma, rxbufdma;
    304 	bus_addr_t dma;
    305 	uint8_t *p;
    306 	unsigned int ntbuf, nrbuf, i;
    307 
    308 	p   = qr->rb_membase;
    309 	dma = qr->rb_dmabase;
    310 
    311 	ntbuf = qr->rb_ntbuf;
    312 	nrbuf = qr->rb_nrbuf;
    313 
    314 	/*
    315 	 * Allocate transmit descriptors
    316 	 */
    317 	qr->rb_txd = (struct qec_xd *)p;
    318 	qr->rb_txddma = dma;
    319 	p   += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
    320 	dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
    321 
    322 	/*
    323 	 * Allocate receive descriptors
    324 	 */
    325 	qr->rb_rxd = (struct qec_xd *)p;
    326 	qr->rb_rxddma = dma;
    327 	p   += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
    328 	dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
    329 
    330 
    331 	/*
    332 	 * Allocate transmit buffers
    333 	 */
    334 	qr->rb_txbuf = p;
    335 	txbufdma = dma;
    336 	p   += ntbuf * pktbufsz;
    337 	dma += ntbuf * pktbufsz;
    338 
    339 	/*
    340 	 * Allocate receive buffers
    341 	 */
    342 	qr->rb_rxbuf = p;
    343 	rxbufdma = dma;
    344 	p   += nrbuf * pktbufsz;
    345 	dma += nrbuf * pktbufsz;
    346 
    347 	/*
    348 	 * Initialize transmit buffer descriptors
    349 	 */
    350 	for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
    351 		qr->rb_txd[i].xd_addr =
    352 		    (uint32_t)(txbufdma + (i % ntbuf) * pktbufsz);
    353 		qr->rb_txd[i].xd_flags = 0;
    354 	}
    355 
    356 	/*
    357 	 * Initialize receive buffer descriptors
    358 	 */
    359 	for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
    360 		qr->rb_rxd[i].xd_addr =
    361 		    (uint32_t)(rxbufdma + (i % nrbuf) * pktbufsz);
    362 		qr->rb_rxd[i].xd_flags = (i < nrbuf)
    363 			? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH)
    364 			: 0;
    365 	}
    366 
    367 	qr->rb_tdhead = qr->rb_tdtail = 0;
    368 	qr->rb_td_nbusy = 0;
    369 	qr->rb_rdtail = 0;
    370 }
    371