qec.c revision 1.14
1 /* $NetBSD: qec.c,v 1.14 2001/11/13 06:58:18 lukem Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: qec.c,v 1.14 2001/11/13 06:58:18 lukem Exp $"); 41 42 #include <sys/types.h> 43 #include <sys/param.h> 44 #include <sys/systm.h> 45 #include <sys/kernel.h> 46 #include <sys/errno.h> 47 #include <sys/device.h> 48 #include <sys/malloc.h> 49 50 #include <machine/bus.h> 51 #include <machine/intr.h> 52 #include <machine/autoconf.h> 53 54 #include <dev/sbus/sbusvar.h> 55 #include <dev/sbus/qecreg.h> 56 #include <dev/sbus/qecvar.h> 57 58 static int qecprint __P((void *, const char *)); 59 static int qecmatch __P((struct device *, struct cfdata *, void *)); 60 static void qecattach __P((struct device *, struct device *, void *)); 61 void qec_init __P((struct qec_softc *)); 62 63 static int qec_bus_map __P(( 64 bus_space_tag_t, 65 bus_type_t, /*slot*/ 66 bus_addr_t, /*offset*/ 67 bus_size_t, /*size*/ 68 int, /*flags*/ 69 vaddr_t, /*preferred virtual address */ 70 bus_space_handle_t *)); 71 static void *qec_intr_establish __P(( 72 bus_space_tag_t, 73 int, /*bus interrupt priority*/ 74 int, /*`device class' interrupt level*/ 75 int, /*flags*/ 76 int (*) __P((void *)), /*handler*/ 77 void *)); /*arg*/ 78 79 struct cfattach qec_ca = { 80 sizeof(struct qec_softc), qecmatch, qecattach 81 }; 82 83 int 84 qecprint(aux, busname) 85 void *aux; 86 const char *busname; 87 { 88 struct sbus_attach_args *sa = aux; 89 bus_space_tag_t t = sa->sa_bustag; 90 struct qec_softc *sc = t->cookie; 91 92 sa->sa_bustag = sc->sc_bustag; /* XXX */ 93 sbus_print(aux, busname); /* XXX */ 94 sa->sa_bustag = t; /* XXX */ 95 return (UNCONF); 96 } 97 98 int 99 qecmatch(parent, cf, aux) 100 struct device *parent; 101 struct cfdata *cf; 102 void *aux; 103 { 104 struct sbus_attach_args *sa = aux; 105 106 return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0); 107 } 108 109 /* 110 * Attach all the sub-devices we can find 111 */ 112 void 113 qecattach(parent, self, aux) 114 struct device *parent, *self; 115 void *aux; 116 { 117 struct sbus_attach_args *sa = aux; 118 struct qec_softc *sc = (void *)self; 119 int node; 120 int sbusburst; 121 bus_space_tag_t sbt; 122 bus_space_handle_t bh; 123 int error; 124 125 sc->sc_bustag = sa->sa_bustag; 126 sc->sc_dmatag = sa->sa_dmatag; 127 node = sa->sa_node; 128 129 if (sa->sa_nreg < 2) { 130 printf("%s: only %d register sets\n", 131 self->dv_xname, sa->sa_nreg); 132 return; 133 } 134 135 if (sbus_bus_map(sa->sa_bustag, 136 sa->sa_reg[0].sbr_slot, 137 sa->sa_reg[0].sbr_offset, 138 sa->sa_reg[0].sbr_size, 139 BUS_SPACE_MAP_LINEAR, 0, &sc->sc_regs) != 0) { 140 printf("%s: attach: cannot map registers\n", self->dv_xname); 141 return; 142 } 143 144 /* 145 * This device's "register space 1" is just a buffer where the 146 * Lance ring-buffers can be stored. Note the buffer's location 147 * and size, so the child driver can pick them up. 148 */ 149 if (sbus_bus_map(sa->sa_bustag, 150 sa->sa_reg[1].sbr_slot, 151 sa->sa_reg[1].sbr_offset, 152 sa->sa_reg[1].sbr_size, 153 BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) { 154 printf("%s: attach: cannot map registers\n", self->dv_xname); 155 return; 156 } 157 sc->sc_buffer = (caddr_t)(u_long)bh; 158 sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].sbr_size; 159 160 /* Get number of on-board channels */ 161 sc->sc_nchannels = PROM_getpropint(node, "#channels", -1); 162 if (sc->sc_nchannels == -1) { 163 printf(": no channels\n"); 164 return; 165 } 166 167 /* 168 * Get transfer burst size from PROM 169 */ 170 sbusburst = ((struct sbus_softc *)parent)->sc_burst; 171 if (sbusburst == 0) 172 sbusburst = SBUS_BURST_32 - 1; /* 1->16 */ 173 174 sc->sc_burst = PROM_getpropint(node, "burst-sizes", -1); 175 if (sc->sc_burst == -1) 176 /* take SBus burst sizes */ 177 sc->sc_burst = sbusburst; 178 179 /* Clamp at parent's burst sizes */ 180 sc->sc_burst &= sbusburst; 181 182 sbus_establish(&sc->sc_sd, &sc->sc_dev); 183 184 /* 185 * Collect address translations from the OBP. 186 */ 187 error = PROM_getprop(node, "ranges", sizeof(struct sbus_range), 188 &sc->sc_nrange, (void **)&sc->sc_range); 189 switch (error) { 190 case 0: 191 break; 192 case ENOENT: 193 default: 194 panic("%s: error getting ranges property", self->dv_xname); 195 } 196 197 /* Allocate a bus tag */ 198 sbt = (bus_space_tag_t) 199 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT); 200 if (sbt == NULL) { 201 printf("%s: attach: out of memory\n", self->dv_xname); 202 return; 203 } 204 205 bzero(sbt, sizeof *sbt); 206 sbt->cookie = sc; 207 sbt->parent = sc->sc_bustag; 208 sbt->sparc_bus_map = qec_bus_map; 209 sbt->sparc_intr_establish = qec_intr_establish; 210 211 /* 212 * Save interrupt information for use in our qec_intr_establish() 213 * function below. Apparently, the intr level for the quad 214 * ethernet board (qe) is stored in the QEC node rather then 215 * separately in each of the QE nodes. 216 * 217 * XXX - qe.c should call bus_intr_establish() with `level = 0'.. 218 * XXX - maybe we should have our own attach args for all that. 219 */ 220 sc->sc_intr = sa->sa_intr; 221 222 printf(": %dK memory\n", sc->sc_bufsiz / 1024); 223 224 qec_init(sc); 225 226 /* search through children */ 227 for (node = firstchild(node); node; node = nextsibling(node)) { 228 struct sbus_attach_args sa; 229 sbus_setup_attach_args((struct sbus_softc *)parent, 230 sbt, sc->sc_dmatag, node, &sa); 231 (void)config_found(&sc->sc_dev, (void *)&sa, qecprint); 232 sbus_destroy_attach_args(&sa); 233 } 234 } 235 236 int 237 qec_bus_map(t, btype, offset, size, flags, vaddr, hp) 238 bus_space_tag_t t; 239 bus_type_t btype; 240 bus_addr_t offset; 241 bus_size_t size; 242 int flags; 243 vaddr_t vaddr; 244 bus_space_handle_t *hp; 245 { 246 struct qec_softc *sc = t->cookie; 247 int slot = btype; 248 int i; 249 250 for (i = 0; i < sc->sc_nrange; i++) { 251 bus_addr_t paddr; 252 bus_type_t iospace; 253 254 if (sc->sc_range[i].cspace != slot) 255 continue; 256 257 /* We've found the connection to the parent bus */ 258 paddr = sc->sc_range[i].poffset + offset; 259 iospace = sc->sc_range[i].pspace; 260 return (bus_space_map2(sc->sc_bustag, iospace, paddr, 261 size, flags, vaddr, hp)); 262 } 263 264 return (EINVAL); 265 } 266 267 void * 268 qec_intr_establish(t, pri, level, flags, handler, arg) 269 bus_space_tag_t t; 270 int pri; 271 int level; 272 int flags; 273 int (*handler) __P((void *)); 274 void *arg; 275 { 276 struct qec_softc *sc = t->cookie; 277 278 if (pri == 0) { 279 /* 280 * qe.c calls bus_intr_establish() with `pri == 0' 281 * XXX - see also comment in qec_attach(). 282 */ 283 if (sc->sc_intr == NULL) { 284 printf("%s: warning: no interrupts\n", 285 sc->sc_dev.dv_xname); 286 return (NULL); 287 } 288 pri = sc->sc_intr->sbi_pri; 289 } 290 291 return (bus_intr_establish(t->parent, pri, level, flags, handler, arg)); 292 } 293 294 void 295 qec_init(sc) 296 struct qec_softc *sc; 297 { 298 bus_space_tag_t t = sc->sc_bustag; 299 bus_space_handle_t qr = sc->sc_regs; 300 u_int32_t v, burst = 0, psize; 301 int i; 302 303 /* First, reset the controller */ 304 bus_space_write_4(t, qr, QEC_QRI_CTRL, QEC_CTRL_RESET); 305 for (i = 0; i < 1000; i++) { 306 DELAY(100); 307 v = bus_space_read_4(t, qr, QEC_QRI_CTRL); 308 if ((v & QEC_CTRL_RESET) == 0) 309 break; 310 } 311 312 /* 313 * Cut available buffer size into receive and transmit buffers. 314 * XXX - should probably be done in be & qe driver... 315 */ 316 v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels; 317 bus_space_write_4(t, qr, QEC_QRI_MSIZE, v); 318 319 v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2); 320 bus_space_write_4(t, qr, QEC_QRI_RSIZE, v); 321 bus_space_write_4(t, qr, QEC_QRI_TSIZE, v); 322 323 psize = sc->sc_nchannels == 1 ? QEC_PSIZE_2048 : 0; 324 bus_space_write_4(t, qr, QEC_QRI_PSIZE, psize); 325 326 if (sc->sc_burst & SBUS_BURST_64) 327 burst = QEC_CTRL_B64; 328 else if (sc->sc_burst & SBUS_BURST_32) 329 burst = QEC_CTRL_B32; 330 else 331 burst = QEC_CTRL_B16; 332 333 v = bus_space_read_4(t, qr, QEC_QRI_CTRL); 334 v = (v & QEC_CTRL_MODEMASK) | burst; 335 bus_space_write_4(t, qr, QEC_QRI_CTRL, v); 336 } 337 338 /* 339 * Common routine to initialize the QEC packet ring buffer. 340 * Called from be & qe drivers. 341 */ 342 void 343 qec_meminit(qr, pktbufsz) 344 struct qec_ring *qr; 345 unsigned int pktbufsz; 346 { 347 bus_addr_t txbufdma, rxbufdma; 348 bus_addr_t dma; 349 caddr_t p; 350 unsigned int ntbuf, nrbuf, i; 351 352 p = qr->rb_membase; 353 dma = qr->rb_dmabase; 354 355 ntbuf = qr->rb_ntbuf; 356 nrbuf = qr->rb_nrbuf; 357 358 /* 359 * Allocate transmit descriptors 360 */ 361 qr->rb_txd = (struct qec_xd *)p; 362 qr->rb_txddma = dma; 363 p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 364 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 365 366 /* 367 * Allocate receive descriptors 368 */ 369 qr->rb_rxd = (struct qec_xd *)p; 370 qr->rb_rxddma = dma; 371 p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 372 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 373 374 375 /* 376 * Allocate transmit buffers 377 */ 378 qr->rb_txbuf = p; 379 txbufdma = dma; 380 p += ntbuf * pktbufsz; 381 dma += ntbuf * pktbufsz; 382 383 /* 384 * Allocate receive buffers 385 */ 386 qr->rb_rxbuf = p; 387 rxbufdma = dma; 388 p += nrbuf * pktbufsz; 389 dma += nrbuf * pktbufsz; 390 391 /* 392 * Initialize transmit buffer descriptors 393 */ 394 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) { 395 qr->rb_txd[i].xd_addr = (u_int32_t) 396 (txbufdma + (i % ntbuf) * pktbufsz); 397 qr->rb_txd[i].xd_flags = 0; 398 } 399 400 /* 401 * Initialize receive buffer descriptors 402 */ 403 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) { 404 qr->rb_rxd[i].xd_addr = (u_int32_t) 405 (rxbufdma + (i % nrbuf) * pktbufsz); 406 qr->rb_rxd[i].xd_flags = (i < nrbuf) 407 ? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH) 408 : 0; 409 } 410 411 qr->rb_tdhead = qr->rb_tdtail = 0; 412 qr->rb_td_nbusy = 0; 413 qr->rb_rdtail = 0; 414 } 415
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