qec.c revision 1.21
1 /* $NetBSD: qec.c,v 1.21 2002/09/27 02:24:33 thorpej Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: qec.c,v 1.21 2002/09/27 02:24:33 thorpej Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/errno.h> 46 #include <sys/device.h> 47 #include <sys/malloc.h> 48 49 #include <machine/bus.h> 50 #include <machine/intr.h> 51 #include <machine/autoconf.h> 52 53 #include <dev/sbus/sbusvar.h> 54 #include <dev/sbus/qecreg.h> 55 #include <dev/sbus/qecvar.h> 56 57 static int qecprint __P((void *, const char *)); 58 static int qecmatch __P((struct device *, struct cfdata *, void *)); 59 static void qecattach __P((struct device *, struct device *, void *)); 60 void qec_init __P((struct qec_softc *)); 61 62 static int qec_bus_map __P(( 63 bus_space_tag_t, 64 bus_addr_t, /*coded slot+offset*/ 65 bus_size_t, /*size*/ 66 int, /*flags*/ 67 vaddr_t, /*preferred virtual address */ 68 bus_space_handle_t *)); 69 static void *qec_intr_establish __P(( 70 bus_space_tag_t, 71 int, /*bus interrupt priority*/ 72 int, /*`device class' interrupt level*/ 73 int, /*flags*/ 74 int (*) __P((void *)), /*handler*/ 75 void *)); /*arg*/ 76 77 struct cfattach qec_ca = { 78 sizeof(struct qec_softc), qecmatch, qecattach 79 }; 80 81 int 82 qecprint(aux, busname) 83 void *aux; 84 const char *busname; 85 { 86 struct sbus_attach_args *sa = aux; 87 bus_space_tag_t t = sa->sa_bustag; 88 struct qec_softc *sc = t->cookie; 89 90 sa->sa_bustag = sc->sc_bustag; /* XXX */ 91 sbus_print(aux, busname); /* XXX */ 92 sa->sa_bustag = t; /* XXX */ 93 return (UNCONF); 94 } 95 96 int 97 qecmatch(parent, cf, aux) 98 struct device *parent; 99 struct cfdata *cf; 100 void *aux; 101 { 102 struct sbus_attach_args *sa = aux; 103 104 return (strcmp(cf->cf_name, sa->sa_name) == 0); 105 } 106 107 /* 108 * Attach all the sub-devices we can find 109 */ 110 void 111 qecattach(parent, self, aux) 112 struct device *parent, *self; 113 void *aux; 114 { 115 struct sbus_attach_args *sa = aux; 116 struct qec_softc *sc = (void *)self; 117 int node; 118 int sbusburst; 119 bus_space_tag_t sbt; 120 bus_space_handle_t bh; 121 int error; 122 123 sc->sc_bustag = sa->sa_bustag; 124 sc->sc_dmatag = sa->sa_dmatag; 125 node = sa->sa_node; 126 127 if (sa->sa_nreg < 2) { 128 printf("%s: only %d register sets\n", 129 self->dv_xname, sa->sa_nreg); 130 return; 131 } 132 133 if (sbus_bus_map(sa->sa_bustag, 134 sa->sa_reg[0].oa_space, 135 sa->sa_reg[0].oa_base, 136 sa->sa_reg[0].oa_size, 137 0, &sc->sc_regs) != 0) { 138 printf("%s: attach: cannot map registers\n", self->dv_xname); 139 return; 140 } 141 142 /* 143 * This device's "register space 1" is just a buffer where the 144 * Lance ring-buffers can be stored. Note the buffer's location 145 * and size, so the child driver can pick them up. 146 */ 147 if (sbus_bus_map(sa->sa_bustag, 148 sa->sa_reg[1].oa_space, 149 sa->sa_reg[1].oa_base, 150 sa->sa_reg[1].oa_size, 151 BUS_SPACE_MAP_LINEAR, &bh) != 0) { 152 printf("%s: attach: cannot map registers\n", self->dv_xname); 153 return; 154 } 155 sc->sc_buffer = (caddr_t)bus_space_vaddr(sa->sa_bustag, bh); 156 sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].oa_size; 157 158 /* Get number of on-board channels */ 159 sc->sc_nchannels = PROM_getpropint(node, "#channels", -1); 160 if (sc->sc_nchannels == -1) { 161 printf(": no channels\n"); 162 return; 163 } 164 165 /* 166 * Get transfer burst size from PROM 167 */ 168 sbusburst = ((struct sbus_softc *)parent)->sc_burst; 169 if (sbusburst == 0) 170 sbusburst = SBUS_BURST_32 - 1; /* 1->16 */ 171 172 sc->sc_burst = PROM_getpropint(node, "burst-sizes", -1); 173 if (sc->sc_burst == -1) 174 /* take SBus burst sizes */ 175 sc->sc_burst = sbusburst; 176 177 /* Clamp at parent's burst sizes */ 178 sc->sc_burst &= sbusburst; 179 180 sbus_establish(&sc->sc_sd, &sc->sc_dev); 181 182 /* 183 * Collect address translations from the OBP. 184 */ 185 error = PROM_getprop(node, "ranges", sizeof(struct openprom_range), 186 &sc->sc_nrange, (void **)&sc->sc_range); 187 switch (error) { 188 case 0: 189 break; 190 case ENOENT: 191 default: 192 panic("%s: error getting ranges property", self->dv_xname); 193 } 194 195 /* Allocate a bus tag */ 196 sbt = (bus_space_tag_t) malloc(sizeof(struct sparc_bus_space_tag), 197 M_DEVBUF, M_NOWAIT|M_ZERO); 198 if (sbt == NULL) { 199 printf("%s: attach: out of memory\n", self->dv_xname); 200 return; 201 } 202 203 sbt->cookie = sc; 204 sbt->parent = sc->sc_bustag; 205 sbt->sparc_bus_map = qec_bus_map; 206 sbt->sparc_intr_establish = qec_intr_establish; 207 208 /* 209 * Save interrupt information for use in our qec_intr_establish() 210 * function below. Apparently, the intr level for the quad 211 * ethernet board (qe) is stored in the QEC node rather than 212 * separately in each of the QE nodes. 213 * 214 * XXX - qe.c should call bus_intr_establish() with `level = 0'.. 215 * XXX - maybe we should have our own attach args for all that. 216 */ 217 sc->sc_intr = sa->sa_intr; 218 219 printf(": %dK memory\n", sc->sc_bufsiz / 1024); 220 221 qec_init(sc); 222 223 /* search through children */ 224 for (node = firstchild(node); node; node = nextsibling(node)) { 225 struct sbus_attach_args sa; 226 sbus_setup_attach_args((struct sbus_softc *)parent, 227 sbt, sc->sc_dmatag, node, &sa); 228 (void)config_found(&sc->sc_dev, (void *)&sa, qecprint); 229 sbus_destroy_attach_args(&sa); 230 } 231 } 232 233 int 234 qec_bus_map(t, baddr, size, flags, va, hp) 235 bus_space_tag_t t; 236 bus_addr_t baddr; 237 bus_size_t size; 238 int flags; 239 vaddr_t va; /* Ignored */ 240 bus_space_handle_t *hp; 241 { 242 struct qec_softc *sc = t->cookie; 243 int slot = BUS_ADDR_IOSPACE(baddr); 244 int i; 245 246 for (i = 0; i < sc->sc_nrange; i++) { 247 struct openprom_range *rp = &sc->sc_range[i]; 248 249 if (sc->sc_range[i].or_child_space != slot) 250 continue; 251 252 /* We've found the connection to the parent bus */ 253 return (bus_space_map(sc->sc_bustag, 254 BUS_ADDR(rp->or_parent_space, 255 rp->or_parent_base + BUS_ADDR_PADDR(baddr)), 256 size, flags, hp)); 257 } 258 259 return (EINVAL); 260 } 261 262 void * 263 qec_intr_establish(t, pri, level, flags, handler, arg) 264 bus_space_tag_t t; 265 int pri; 266 int level; 267 int flags; 268 int (*handler) __P((void *)); 269 void *arg; 270 { 271 struct qec_softc *sc = t->cookie; 272 273 if (pri == 0) { 274 /* 275 * qe.c calls bus_intr_establish() with `pri == 0' 276 * XXX - see also comment in qec_attach(). 277 */ 278 if (sc->sc_intr == NULL) { 279 printf("%s: warning: no interrupts\n", 280 sc->sc_dev.dv_xname); 281 return (NULL); 282 } 283 pri = sc->sc_intr->oi_pri; 284 } 285 286 return (bus_intr_establish(t->parent, pri, level, flags, handler, arg)); 287 } 288 289 void 290 qec_init(sc) 291 struct qec_softc *sc; 292 { 293 bus_space_tag_t t = sc->sc_bustag; 294 bus_space_handle_t qr = sc->sc_regs; 295 u_int32_t v, burst = 0, psize; 296 int i; 297 298 /* First, reset the controller */ 299 bus_space_write_4(t, qr, QEC_QRI_CTRL, QEC_CTRL_RESET); 300 for (i = 0; i < 1000; i++) { 301 DELAY(100); 302 v = bus_space_read_4(t, qr, QEC_QRI_CTRL); 303 if ((v & QEC_CTRL_RESET) == 0) 304 break; 305 } 306 307 /* 308 * Cut available buffer size into receive and transmit buffers. 309 * XXX - should probably be done in be & qe driver... 310 */ 311 v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels; 312 bus_space_write_4(t, qr, QEC_QRI_MSIZE, v); 313 314 v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2); 315 bus_space_write_4(t, qr, QEC_QRI_RSIZE, v); 316 bus_space_write_4(t, qr, QEC_QRI_TSIZE, v); 317 318 psize = sc->sc_nchannels == 1 ? QEC_PSIZE_2048 : 0; 319 bus_space_write_4(t, qr, QEC_QRI_PSIZE, psize); 320 321 if (sc->sc_burst & SBUS_BURST_64) 322 burst = QEC_CTRL_B64; 323 else if (sc->sc_burst & SBUS_BURST_32) 324 burst = QEC_CTRL_B32; 325 else 326 burst = QEC_CTRL_B16; 327 328 v = bus_space_read_4(t, qr, QEC_QRI_CTRL); 329 v = (v & QEC_CTRL_MODEMASK) | burst; 330 bus_space_write_4(t, qr, QEC_QRI_CTRL, v); 331 } 332 333 /* 334 * Common routine to initialize the QEC packet ring buffer. 335 * Called from be & qe drivers. 336 */ 337 void 338 qec_meminit(qr, pktbufsz) 339 struct qec_ring *qr; 340 unsigned int pktbufsz; 341 { 342 bus_addr_t txbufdma, rxbufdma; 343 bus_addr_t dma; 344 caddr_t p; 345 unsigned int ntbuf, nrbuf, i; 346 347 p = qr->rb_membase; 348 dma = qr->rb_dmabase; 349 350 ntbuf = qr->rb_ntbuf; 351 nrbuf = qr->rb_nrbuf; 352 353 /* 354 * Allocate transmit descriptors 355 */ 356 qr->rb_txd = (struct qec_xd *)p; 357 qr->rb_txddma = dma; 358 p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 359 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 360 361 /* 362 * Allocate receive descriptors 363 */ 364 qr->rb_rxd = (struct qec_xd *)p; 365 qr->rb_rxddma = dma; 366 p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 367 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 368 369 370 /* 371 * Allocate transmit buffers 372 */ 373 qr->rb_txbuf = p; 374 txbufdma = dma; 375 p += ntbuf * pktbufsz; 376 dma += ntbuf * pktbufsz; 377 378 /* 379 * Allocate receive buffers 380 */ 381 qr->rb_rxbuf = p; 382 rxbufdma = dma; 383 p += nrbuf * pktbufsz; 384 dma += nrbuf * pktbufsz; 385 386 /* 387 * Initialize transmit buffer descriptors 388 */ 389 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) { 390 qr->rb_txd[i].xd_addr = (u_int32_t) 391 (txbufdma + (i % ntbuf) * pktbufsz); 392 qr->rb_txd[i].xd_flags = 0; 393 } 394 395 /* 396 * Initialize receive buffer descriptors 397 */ 398 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) { 399 qr->rb_rxd[i].xd_addr = (u_int32_t) 400 (rxbufdma + (i % nrbuf) * pktbufsz); 401 qr->rb_rxd[i].xd_flags = (i < nrbuf) 402 ? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH) 403 : 0; 404 } 405 406 qr->rb_tdhead = qr->rb_tdtail = 0; 407 qr->rb_td_nbusy = 0; 408 qr->rb_rdtail = 0; 409 } 410
Indexes created Wed Sep 24 05:09:52 GMT 2025