qec.c revision 1.29
1 /* $NetBSD: qec.c,v 1.29 2004/06/27 18:28:26 pk Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: qec.c,v 1.29 2004/06/27 18:28:26 pk Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/errno.h> 46 #include <sys/device.h> 47 #include <sys/malloc.h> 48 49 #include <machine/bus.h> 50 #include <machine/intr.h> 51 #include <machine/autoconf.h> 52 53 #include <dev/sbus/sbusvar.h> 54 #include <dev/sbus/qecreg.h> 55 #include <dev/sbus/qecvar.h> 56 57 static int qecprint __P((void *, const char *)); 58 static int qecmatch __P((struct device *, struct cfdata *, void *)); 59 static void qecattach __P((struct device *, struct device *, void *)); 60 void qec_init __P((struct qec_softc *)); 61 62 static void *qec_intr_establish __P(( 63 bus_space_tag_t, 64 int, /*bus interrupt priority*/ 65 int, /*`device class' interrupt level*/ 66 int (*) __P((void *)), /*handler*/ 67 void *, /*arg*/ 68 void (*) __P((void)))); /*optional fast trap handler*/ 69 70 CFATTACH_DECL(qec, sizeof(struct qec_softc), 71 qecmatch, qecattach, NULL, NULL); 72 73 int 74 qecprint(aux, busname) 75 void *aux; 76 const char *busname; 77 { 78 struct sbus_attach_args *sa = aux; 79 bus_space_tag_t t = sa->sa_bustag; 80 struct qec_softc *sc = t->cookie; 81 82 sa->sa_bustag = sc->sc_bustag; /* XXX */ 83 sbus_print(aux, busname); /* XXX */ 84 sa->sa_bustag = t; /* XXX */ 85 return (UNCONF); 86 } 87 88 int 89 qecmatch(parent, cf, aux) 90 struct device *parent; 91 struct cfdata *cf; 92 void *aux; 93 { 94 struct sbus_attach_args *sa = aux; 95 96 return (strcmp(cf->cf_name, sa->sa_name) == 0); 97 } 98 99 /* 100 * Attach all the sub-devices we can find 101 */ 102 void 103 qecattach(parent, self, aux) 104 struct device *parent, *self; 105 void *aux; 106 { 107 struct sbus_attach_args *sa = aux; 108 struct qec_softc *sc = (void *)self; 109 int node; 110 int sbusburst; 111 bus_space_tag_t sbt; 112 bus_space_handle_t bh; 113 int error; 114 115 sc->sc_bustag = sa->sa_bustag; 116 sc->sc_dmatag = sa->sa_dmatag; 117 node = sa->sa_node; 118 119 if (sa->sa_nreg < 2) { 120 printf("%s: only %d register sets\n", 121 self->dv_xname, sa->sa_nreg); 122 return; 123 } 124 125 if (sbus_bus_map(sa->sa_bustag, 126 sa->sa_reg[0].oa_space, 127 sa->sa_reg[0].oa_base, 128 sa->sa_reg[0].oa_size, 129 0, &sc->sc_regs) != 0) { 130 printf("%s: attach: cannot map registers\n", self->dv_xname); 131 return; 132 } 133 134 /* 135 * This device's "register space 1" is just a buffer where the 136 * Lance ring-buffers can be stored. Note the buffer's location 137 * and size, so the child driver can pick them up. 138 */ 139 if (sbus_bus_map(sa->sa_bustag, 140 sa->sa_reg[1].oa_space, 141 sa->sa_reg[1].oa_base, 142 sa->sa_reg[1].oa_size, 143 BUS_SPACE_MAP_LINEAR, &bh) != 0) { 144 printf("%s: attach: cannot map registers\n", self->dv_xname); 145 return; 146 } 147 sc->sc_buffer = (caddr_t)bus_space_vaddr(sa->sa_bustag, bh); 148 sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].oa_size; 149 150 /* Get number of on-board channels */ 151 sc->sc_nchannels = prom_getpropint(node, "#channels", -1); 152 if (sc->sc_nchannels == -1) { 153 printf(": no channels\n"); 154 return; 155 } 156 157 /* 158 * Get transfer burst size from PROM 159 */ 160 sbusburst = ((struct sbus_softc *)parent)->sc_burst; 161 if (sbusburst == 0) 162 sbusburst = SBUS_BURST_32 - 1; /* 1->16 */ 163 164 sc->sc_burst = prom_getpropint(node, "burst-sizes", -1); 165 if (sc->sc_burst == -1) 166 /* take SBus burst sizes */ 167 sc->sc_burst = sbusburst; 168 169 /* Clamp at parent's burst sizes */ 170 sc->sc_burst &= sbusburst; 171 172 sbus_establish(&sc->sc_sd, &sc->sc_dev); 173 174 /* Allocate a bus tag */ 175 sbt = (bus_space_tag_t) malloc(sizeof(*sbt), M_DEVBUF, M_NOWAIT); 176 if (sbt == NULL) { 177 printf("%s: attach: out of memory\n", self->dv_xname); 178 return; 179 } 180 181 memcpy(sbt, sc->sc_bustag, sizeof(*sbt)); 182 sbt->cookie = sc; 183 sbt->parent = sc->sc_bustag; 184 sbt->sparc_intr_establish = qec_intr_establish; 185 sbt->ranges = NULL; 186 sbt->nranges = 0; 187 188 /* 189 * Collect address translations from the OBP. 190 */ 191 error = prom_getprop(node, "ranges", sizeof(struct openprom_range), 192 &sbt->nranges, &sbt->ranges); 193 switch (error) { 194 case 0: 195 break; 196 case ENOENT: 197 default: 198 panic("%s: error getting ranges property", self->dv_xname); 199 } 200 201 /* 202 * Save interrupt information for use in our qec_intr_establish() 203 * function below. Apparently, the intr level for the quad 204 * ethernet board (qe) is stored in the QEC node rather than 205 * separately in each of the QE nodes. 206 * 207 * XXX - qe.c should call bus_intr_establish() with `level = 0'.. 208 * XXX - maybe we should have our own attach args for all that. 209 */ 210 sc->sc_intr = sa->sa_intr; 211 212 printf(": %dK memory\n", sc->sc_bufsiz / 1024); 213 214 qec_init(sc); 215 216 /* search through children */ 217 for (node = firstchild(node); node; node = nextsibling(node)) { 218 struct sbus_attach_args sa; 219 sbus_setup_attach_args((struct sbus_softc *)parent, 220 sbt, sc->sc_dmatag, node, &sa); 221 (void)config_found(&sc->sc_dev, (void *)&sa, qecprint); 222 sbus_destroy_attach_args(&sa); 223 } 224 } 225 226 void * 227 qec_intr_establish(t, pri, level, handler, arg, fastvec) 228 bus_space_tag_t t; 229 int pri; 230 int level; 231 int (*handler) __P((void *)); 232 void *arg; 233 void (*fastvec) __P((void)); /* ignored */ 234 { 235 struct qec_softc *sc = t->cookie; 236 237 if (pri == 0) { 238 /* 239 * qe.c calls bus_intr_establish() with `pri == 0' 240 * XXX - see also comment in qec_attach(). 241 */ 242 if (sc->sc_intr == NULL) { 243 printf("%s: warning: no interrupts\n", 244 sc->sc_dev.dv_xname); 245 return (NULL); 246 } 247 pri = sc->sc_intr->oi_pri; 248 } 249 250 return (bus_intr_establish(t->parent, pri, level, handler, arg)); 251 } 252 253 void 254 qec_init(sc) 255 struct qec_softc *sc; 256 { 257 bus_space_tag_t t = sc->sc_bustag; 258 bus_space_handle_t qr = sc->sc_regs; 259 u_int32_t v, burst = 0, psize; 260 int i; 261 262 /* First, reset the controller */ 263 bus_space_write_4(t, qr, QEC_QRI_CTRL, QEC_CTRL_RESET); 264 for (i = 0; i < 1000; i++) { 265 DELAY(100); 266 v = bus_space_read_4(t, qr, QEC_QRI_CTRL); 267 if ((v & QEC_CTRL_RESET) == 0) 268 break; 269 } 270 271 /* 272 * Cut available buffer size into receive and transmit buffers. 273 * XXX - should probably be done in be & qe driver... 274 */ 275 v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels; 276 bus_space_write_4(t, qr, QEC_QRI_MSIZE, v); 277 278 v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2); 279 bus_space_write_4(t, qr, QEC_QRI_RSIZE, v); 280 bus_space_write_4(t, qr, QEC_QRI_TSIZE, v); 281 282 psize = sc->sc_nchannels == 1 ? QEC_PSIZE_2048 : 0; 283 bus_space_write_4(t, qr, QEC_QRI_PSIZE, psize); 284 285 if (sc->sc_burst & SBUS_BURST_64) 286 burst = QEC_CTRL_B64; 287 else if (sc->sc_burst & SBUS_BURST_32) 288 burst = QEC_CTRL_B32; 289 else 290 burst = QEC_CTRL_B16; 291 292 v = bus_space_read_4(t, qr, QEC_QRI_CTRL); 293 v = (v & QEC_CTRL_MODEMASK) | burst; 294 bus_space_write_4(t, qr, QEC_QRI_CTRL, v); 295 } 296 297 /* 298 * Common routine to initialize the QEC packet ring buffer. 299 * Called from be & qe drivers. 300 */ 301 void 302 qec_meminit(qr, pktbufsz) 303 struct qec_ring *qr; 304 unsigned int pktbufsz; 305 { 306 bus_addr_t txbufdma, rxbufdma; 307 bus_addr_t dma; 308 caddr_t p; 309 unsigned int ntbuf, nrbuf, i; 310 311 p = qr->rb_membase; 312 dma = qr->rb_dmabase; 313 314 ntbuf = qr->rb_ntbuf; 315 nrbuf = qr->rb_nrbuf; 316 317 /* 318 * Allocate transmit descriptors 319 */ 320 qr->rb_txd = (struct qec_xd *)p; 321 qr->rb_txddma = dma; 322 p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 323 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 324 325 /* 326 * Allocate receive descriptors 327 */ 328 qr->rb_rxd = (struct qec_xd *)p; 329 qr->rb_rxddma = dma; 330 p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 331 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 332 333 334 /* 335 * Allocate transmit buffers 336 */ 337 qr->rb_txbuf = p; 338 txbufdma = dma; 339 p += ntbuf * pktbufsz; 340 dma += ntbuf * pktbufsz; 341 342 /* 343 * Allocate receive buffers 344 */ 345 qr->rb_rxbuf = p; 346 rxbufdma = dma; 347 p += nrbuf * pktbufsz; 348 dma += nrbuf * pktbufsz; 349 350 /* 351 * Initialize transmit buffer descriptors 352 */ 353 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) { 354 qr->rb_txd[i].xd_addr = (u_int32_t) 355 (txbufdma + (i % ntbuf) * pktbufsz); 356 qr->rb_txd[i].xd_flags = 0; 357 } 358 359 /* 360 * Initialize receive buffer descriptors 361 */ 362 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) { 363 qr->rb_rxd[i].xd_addr = (u_int32_t) 364 (rxbufdma + (i % nrbuf) * pktbufsz); 365 qr->rb_rxd[i].xd_flags = (i < nrbuf) 366 ? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH) 367 : 0; 368 } 369 370 qr->rb_tdhead = qr->rb_tdtail = 0; 371 qr->rb_td_nbusy = 0; 372 qr->rb_rdtail = 0; 373 } 374
Indexes created Tue Sep 23 14:10:03 GMT 2025