qec.c revision 1.37
1 /* $NetBSD: qec.c,v 1.37 2007/10/19 12:01:12 ad Exp $ */ 2 3 /*- 4 * Copyright (c) 1998 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Kranenburg. 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 3. All advertising materials mentioning features or use of this software 19 * must display the following acknowledgement: 20 * This product includes software developed by the NetBSD 21 * Foundation, Inc. and its contributors. 22 * 4. Neither the name of The NetBSD Foundation nor the names of its 23 * contributors may be used to endorse or promote products derived 24 * from this software without specific prior written permission. 25 * 26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 36 * POSSIBILITY OF SUCH DAMAGE. 37 */ 38 39 #include <sys/cdefs.h> 40 __KERNEL_RCSID(0, "$NetBSD: qec.c,v 1.37 2007/10/19 12:01:12 ad Exp $"); 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/errno.h> 46 #include <sys/device.h> 47 #include <sys/malloc.h> 48 49 #include <sys/bus.h> 50 #include <sys/intr.h> 51 #include <machine/autoconf.h> 52 53 #include <dev/sbus/sbusvar.h> 54 #include <dev/sbus/qecreg.h> 55 #include <dev/sbus/qecvar.h> 56 57 static int qecprint(void *, const char *); 58 static int qecmatch(struct device *, struct cfdata *, void *); 59 static void qecattach(struct device *, struct device *, void *); 60 void qec_init(struct qec_softc *); 61 62 static int qec_bus_map( 63 bus_space_tag_t, 64 bus_addr_t, /*coded slot+offset*/ 65 bus_size_t, /*size*/ 66 int, /*flags*/ 67 vaddr_t, /*preferred virtual address */ 68 bus_space_handle_t *); 69 static void *qec_intr_establish( 70 bus_space_tag_t, 71 int, /*bus interrupt priority*/ 72 int, /*`device class' interrupt level*/ 73 int (*)(void *), /*handler*/ 74 void *, /*arg*/ 75 void (*)(void)); /*optional fast trap handler*/ 76 77 CFATTACH_DECL(qec, sizeof(struct qec_softc), 78 qecmatch, qecattach, NULL, NULL); 79 80 int 81 qecprint(aux, busname) 82 void *aux; 83 const char *busname; 84 { 85 struct sbus_attach_args *sa = aux; 86 bus_space_tag_t t = sa->sa_bustag; 87 struct qec_softc *sc = t->cookie; 88 89 sa->sa_bustag = sc->sc_bustag; /* XXX */ 90 sbus_print(aux, busname); /* XXX */ 91 sa->sa_bustag = t; /* XXX */ 92 return (UNCONF); 93 } 94 95 int 96 qecmatch(parent, cf, aux) 97 struct device *parent; 98 struct cfdata *cf; 99 void *aux; 100 { 101 struct sbus_attach_args *sa = aux; 102 103 return (strcmp(cf->cf_name, sa->sa_name) == 0); 104 } 105 106 /* 107 * Attach all the sub-devices we can find 108 */ 109 void 110 qecattach(parent, self, aux) 111 struct device *parent, *self; 112 void *aux; 113 { 114 struct sbus_attach_args *sa = aux; 115 struct qec_softc *sc = (void *)self; 116 int node; 117 int sbusburst; 118 bus_space_tag_t sbt; 119 bus_space_handle_t bh; 120 int error; 121 122 sc->sc_bustag = sa->sa_bustag; 123 sc->sc_dmatag = sa->sa_dmatag; 124 node = sa->sa_node; 125 126 if (sa->sa_nreg < 2) { 127 printf("%s: only %d register sets\n", 128 self->dv_xname, sa->sa_nreg); 129 return; 130 } 131 132 if (sbus_bus_map(sa->sa_bustag, 133 sa->sa_reg[0].oa_space, 134 sa->sa_reg[0].oa_base, 135 sa->sa_reg[0].oa_size, 136 0, &sc->sc_regs) != 0) { 137 printf("%s: attach: cannot map registers\n", self->dv_xname); 138 return; 139 } 140 141 /* 142 * This device's "register space 1" is just a buffer where the 143 * Lance ring-buffers can be stored. Note the buffer's location 144 * and size, so the child driver can pick them up. 145 */ 146 if (sbus_bus_map(sa->sa_bustag, 147 sa->sa_reg[1].oa_space, 148 sa->sa_reg[1].oa_base, 149 sa->sa_reg[1].oa_size, 150 BUS_SPACE_MAP_LINEAR, &bh) != 0) { 151 printf("%s: attach: cannot map registers\n", self->dv_xname); 152 return; 153 } 154 sc->sc_buffer = (void *)bus_space_vaddr(sa->sa_bustag, bh); 155 sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].oa_size; 156 157 /* Get number of on-board channels */ 158 sc->sc_nchannels = prom_getpropint(node, "#channels", -1); 159 if (sc->sc_nchannels == -1) { 160 printf(": no channels\n"); 161 return; 162 } 163 164 /* 165 * Get transfer burst size from PROM 166 */ 167 sbusburst = ((struct sbus_softc *)parent)->sc_burst; 168 if (sbusburst == 0) 169 sbusburst = SBUS_BURST_32 - 1; /* 1->16 */ 170 171 sc->sc_burst = prom_getpropint(node, "burst-sizes", -1); 172 if (sc->sc_burst == -1) 173 /* take SBus burst sizes */ 174 sc->sc_burst = sbusburst; 175 176 /* Clamp at parent's burst sizes */ 177 sc->sc_burst &= sbusburst; 178 179 sbus_establish(&sc->sc_sd, &sc->sc_dev); 180 181 /* Allocate a bus tag */ 182 sbt = bus_space_tag_alloc(sc->sc_bustag, sc); 183 if (sbt == NULL) { 184 printf("%s: attach: out of memory\n", self->dv_xname); 185 return; 186 } 187 188 sbt->sparc_bus_map = qec_bus_map; 189 sbt->sparc_intr_establish = qec_intr_establish; 190 191 /* 192 * Collect address translations from the OBP. 193 */ 194 error = prom_getprop(node, "ranges", sizeof(struct openprom_range), 195 &sbt->nranges, &sbt->ranges); 196 switch (error) { 197 case 0: 198 break; 199 case ENOENT: 200 default: 201 panic("%s: error getting ranges property", self->dv_xname); 202 } 203 204 /* 205 * Save interrupt information for use in our qec_intr_establish() 206 * function below. Apparently, the intr level for the quad 207 * ethernet board (qe) is stored in the QEC node rather than 208 * separately in each of the QE nodes. 209 * 210 * XXX - qe.c should call bus_intr_establish() with `level = 0'.. 211 * XXX - maybe we should have our own attach args for all that. 212 */ 213 sc->sc_intr = sa->sa_intr; 214 215 printf(": %dK memory\n", sc->sc_bufsiz / 1024); 216 217 qec_init(sc); 218 219 /* search through children */ 220 for (node = firstchild(node); node; node = nextsibling(node)) { 221 struct sbus_attach_args sax; 222 sbus_setup_attach_args((struct sbus_softc *)parent, 223 sbt, sc->sc_dmatag, node, &sax); 224 (void)config_found(&sc->sc_dev, (void *)&sax, qecprint); 225 sbus_destroy_attach_args(&sax); 226 } 227 } 228 229 int 230 qec_bus_map(t, ba, size, flags, va, hp) 231 bus_space_tag_t t; 232 bus_addr_t ba; 233 bus_size_t size; 234 int flags; 235 vaddr_t va; /* Ignored */ 236 bus_space_handle_t *hp; 237 { 238 int error; 239 240 if ((error = bus_space_translate_address_generic( 241 t->ranges, t->nranges, &ba)) != 0) 242 return (error); 243 244 return (bus_space_map(t->parent, ba, size, flags, hp)); 245 } 246 247 void * 248 qec_intr_establish(t, pri, level, handler, arg, fastvec) 249 bus_space_tag_t t; 250 int pri; 251 int level; 252 int (*handler)(void *); 253 void *arg; 254 void (*fastvec)(void); /* ignored */ 255 { 256 struct qec_softc *sc = t->cookie; 257 258 if (pri == 0) { 259 /* 260 * qe.c calls bus_intr_establish() with `pri == 0' 261 * XXX - see also comment in qec_attach(). 262 */ 263 if (sc->sc_intr == NULL) { 264 printf("%s: warning: no interrupts\n", 265 sc->sc_dev.dv_xname); 266 return (NULL); 267 } 268 pri = sc->sc_intr->oi_pri; 269 } 270 271 return (bus_intr_establish(t->parent, pri, level, handler, arg)); 272 } 273 274 void 275 qec_init(sc) 276 struct qec_softc *sc; 277 { 278 bus_space_tag_t t = sc->sc_bustag; 279 bus_space_handle_t qr = sc->sc_regs; 280 u_int32_t v, burst = 0, psize; 281 int i; 282 283 /* First, reset the controller */ 284 bus_space_write_4(t, qr, QEC_QRI_CTRL, QEC_CTRL_RESET); 285 for (i = 0; i < 1000; i++) { 286 DELAY(100); 287 v = bus_space_read_4(t, qr, QEC_QRI_CTRL); 288 if ((v & QEC_CTRL_RESET) == 0) 289 break; 290 } 291 292 /* 293 * Cut available buffer size into receive and transmit buffers. 294 * XXX - should probably be done in be & qe driver... 295 */ 296 v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels; 297 bus_space_write_4(t, qr, QEC_QRI_MSIZE, v); 298 299 v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2); 300 bus_space_write_4(t, qr, QEC_QRI_RSIZE, v); 301 bus_space_write_4(t, qr, QEC_QRI_TSIZE, v); 302 303 psize = sc->sc_nchannels == 1 ? QEC_PSIZE_2048 : 0; 304 bus_space_write_4(t, qr, QEC_QRI_PSIZE, psize); 305 306 if (sc->sc_burst & SBUS_BURST_64) 307 burst = QEC_CTRL_B64; 308 else if (sc->sc_burst & SBUS_BURST_32) 309 burst = QEC_CTRL_B32; 310 else 311 burst = QEC_CTRL_B16; 312 313 v = bus_space_read_4(t, qr, QEC_QRI_CTRL); 314 v = (v & QEC_CTRL_MODEMASK) | burst; 315 bus_space_write_4(t, qr, QEC_QRI_CTRL, v); 316 } 317 318 /* 319 * Common routine to initialize the QEC packet ring buffer. 320 * Called from be & qe drivers. 321 */ 322 void 323 qec_meminit(qr, pktbufsz) 324 struct qec_ring *qr; 325 unsigned int pktbufsz; 326 { 327 bus_addr_t txbufdma, rxbufdma; 328 bus_addr_t dma; 329 void *p; 330 unsigned int ntbuf, nrbuf, i; 331 332 p = qr->rb_membase; 333 dma = qr->rb_dmabase; 334 335 ntbuf = qr->rb_ntbuf; 336 nrbuf = qr->rb_nrbuf; 337 338 /* 339 * Allocate transmit descriptors 340 */ 341 qr->rb_txd = (struct qec_xd *)p; 342 qr->rb_txddma = dma; 343 p = (char *)p + QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 344 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 345 346 /* 347 * Allocate receive descriptors 348 */ 349 qr->rb_rxd = (struct qec_xd *)p; 350 qr->rb_rxddma = dma; 351 p = (char *)p + QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 352 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd); 353 354 355 /* 356 * Allocate transmit buffers 357 */ 358 qr->rb_txbuf = p; 359 txbufdma = dma; 360 p = (char *)p + ntbuf * pktbufsz; 361 dma += ntbuf * pktbufsz; 362 363 /* 364 * Allocate receive buffers 365 */ 366 qr->rb_rxbuf = p; 367 rxbufdma = dma; 368 p = (char *)p + nrbuf * pktbufsz; 369 dma += nrbuf * pktbufsz; 370 371 /* 372 * Initialize transmit buffer descriptors 373 */ 374 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) { 375 qr->rb_txd[i].xd_addr = (u_int32_t) 376 (txbufdma + (i % ntbuf) * pktbufsz); 377 qr->rb_txd[i].xd_flags = 0; 378 } 379 380 /* 381 * Initialize receive buffer descriptors 382 */ 383 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) { 384 qr->rb_rxd[i].xd_addr = (u_int32_t) 385 (rxbufdma + (i % nrbuf) * pktbufsz); 386 qr->rb_rxd[i].xd_flags = (i < nrbuf) 387 ? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH) 388 : 0; 389 } 390 391 qr->rb_tdhead = qr->rb_tdtail = 0; 392 qr->rb_td_nbusy = 0; 393 qr->rb_rdtail = 0; 394 } 395
Indexes created Tue Sep 23 21:09:50 GMT 2025