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qec.c revision 1.44
      1 /*	$NetBSD: qec.c,v 1.44 2009/05/17 00:28:35 tsutsui Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Paul Kranenburg.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #include <sys/cdefs.h>
     33 __KERNEL_RCSID(0, "$NetBSD: qec.c,v 1.44 2009/05/17 00:28:35 tsutsui Exp $");
     34 
     35 #include <sys/param.h>
     36 #include <sys/systm.h>
     37 #include <sys/kernel.h>
     38 #include <sys/errno.h>
     39 #include <sys/device.h>
     40 #include <sys/malloc.h>
     41 
     42 #include <sys/bus.h>
     43 #include <sys/intr.h>
     44 #include <machine/autoconf.h>
     45 
     46 #include <dev/sbus/sbusvar.h>
     47 #include <dev/sbus/qecreg.h>
     48 #include <dev/sbus/qecvar.h>
     49 
     50 static int	qecprint(void *, const char *);
     51 static int	qecmatch(device_t, cfdata_t, void *);
     52 static void	qecattach(device_t, device_t, void *);
     53 void		qec_init(struct qec_softc *);
     54 
     55 static int qec_bus_map(
     56 		bus_space_tag_t,
     57 		bus_addr_t,		/*coded slot+offset*/
     58 		bus_size_t,		/*size*/
     59 		int,			/*flags*/
     60 		vaddr_t,		/*preferred virtual address */
     61 		bus_space_handle_t *);
     62 static void *qec_intr_establish(
     63 		bus_space_tag_t,
     64 		int,			/*bus interrupt priority*/
     65 		int,			/*`device class' interrupt level*/
     66 		int (*)(void *),	/*handler*/
     67 		void *,			/*arg*/
     68 		void (*)(void));	/*optional fast trap handler*/
     69 
     70 CFATTACH_DECL(qec, sizeof(struct qec_softc),
     71     qecmatch, qecattach, NULL, NULL);
     72 
     73 int
     74 qecprint(void *aux, const char *busname)
     75 {
     76 	struct sbus_attach_args *sa = aux;
     77 	bus_space_tag_t t = sa->sa_bustag;
     78 	struct qec_softc *sc = t->cookie;
     79 
     80 	sa->sa_bustag = sc->sc_bustag;	/* XXX */
     81 	sbus_print(aux, busname);	/* XXX */
     82 	sa->sa_bustag = t;		/* XXX */
     83 	return (UNCONF);
     84 }
     85 
     86 int
     87 qecmatch(device_t parent, cfdata_t cf, void *aux)
     88 {
     89 	struct sbus_attach_args *sa = aux;
     90 
     91 	return (strcmp(cf->cf_name, sa->sa_name) == 0);
     92 }
     93 
     94 /*
     95  * Attach all the sub-devices we can find
     96  */
     97 void
     98 qecattach(device_t parent, device_t self, void *aux)
     99 {
    100 	struct sbus_attach_args *sa = aux;
    101 	struct qec_softc *sc = (void *)self;
    102 	struct sbus_softc *sbsc = device_private(parent);
    103 	int node;
    104 	int sbusburst;
    105 	bus_space_tag_t sbt;
    106 	bus_space_handle_t bh;
    107 	int error;
    108 
    109 	sc->sc_bustag = sa->sa_bustag;
    110 	sc->sc_dmatag = sa->sa_dmatag;
    111 	node = sa->sa_node;
    112 
    113 	if (sa->sa_nreg < 2) {
    114 		printf("%s: only %d register sets\n",
    115 			device_xname(self), sa->sa_nreg);
    116 		return;
    117 	}
    118 
    119 	if (sbus_bus_map(sa->sa_bustag,
    120 			 sa->sa_reg[0].oa_space,
    121 			 sa->sa_reg[0].oa_base,
    122 			 sa->sa_reg[0].oa_size,
    123 			 0, &sc->sc_regs) != 0) {
    124 		aprint_error_dev(self, "attach: cannot map registers\n");
    125 		return;
    126 	}
    127 
    128 	/*
    129 	 * This device's "register space 1" is just a buffer where the
    130 	 * Lance ring-buffers can be stored. Note the buffer's location
    131 	 * and size, so the child driver can pick them up.
    132 	 */
    133 	if (sbus_bus_map(sa->sa_bustag,
    134 			 sa->sa_reg[1].oa_space,
    135 			 sa->sa_reg[1].oa_base,
    136 			 sa->sa_reg[1].oa_size,
    137 			 BUS_SPACE_MAP_LINEAR, &bh) != 0) {
    138 		aprint_error_dev(self, "attach: cannot map registers\n");
    139 		return;
    140 	}
    141 	sc->sc_buffer = (void *)bus_space_vaddr(sa->sa_bustag, bh);
    142 	sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].oa_size;
    143 
    144 	/* Get number of on-board channels */
    145 	sc->sc_nchannels = prom_getpropint(node, "#channels", -1);
    146 	if (sc->sc_nchannels == -1) {
    147 		printf(": no channels\n");
    148 		return;
    149 	}
    150 
    151 	/*
    152 	 * Get transfer burst size from PROM
    153 	 */
    154 	sbusburst = sbsc->sc_burst;
    155 	if (sbusburst == 0)
    156 		sbusburst = SBUS_BURST_32 - 1; /* 1->16 */
    157 
    158 	sc->sc_burst = prom_getpropint(node, "burst-sizes", -1);
    159 	if (sc->sc_burst == -1)
    160 		/* take SBus burst sizes */
    161 		sc->sc_burst = sbusburst;
    162 
    163 	/* Clamp at parent's burst sizes */
    164 	sc->sc_burst &= sbusburst;
    165 
    166 	sbus_establish(&sc->sc_sd, &sc->sc_dev);
    167 
    168 	/* Allocate a bus tag */
    169 	sbt = bus_space_tag_alloc(sc->sc_bustag, sc);
    170 	if (sbt == NULL) {
    171 		aprint_error_dev(self, "attach: out of memory\n");
    172 		return;
    173 	}
    174 
    175 	sbt->sparc_bus_map = qec_bus_map;
    176 	sbt->sparc_intr_establish = qec_intr_establish;
    177 
    178 	/*
    179 	 * Collect address translations from the OBP.
    180 	 */
    181 	error = prom_getprop(node, "ranges", sizeof(struct openprom_range),
    182 			 &sbt->nranges, &sbt->ranges);
    183 	switch (error) {
    184 	case 0:
    185 		break;
    186 	case ENOENT:
    187 	default:
    188 		panic("%s: error getting ranges property", device_xname(self));
    189 	}
    190 
    191 	/*
    192 	 * Save interrupt information for use in our qec_intr_establish()
    193 	 * function below. Apparently, the intr level for the quad
    194 	 * ethernet board (qe) is stored in the QEC node rather than
    195 	 * separately in each of the QE nodes.
    196 	 *
    197 	 * XXX - qe.c should call bus_intr_establish() with `level = 0'..
    198 	 * XXX - maybe we should have our own attach args for all that.
    199 	 */
    200 	sc->sc_intr = sa->sa_intr;
    201 
    202 	printf(": %dK memory\n", sc->sc_bufsiz / 1024);
    203 
    204 	qec_init(sc);
    205 
    206 	/* search through children */
    207 	for (node = firstchild(node); node; node = nextsibling(node)) {
    208 		struct sbus_attach_args sax;
    209 		sbus_setup_attach_args(sbsc,
    210 				       sbt, sc->sc_dmatag, node, &sax);
    211 		(void)config_found(&sc->sc_dev, (void *)&sax, qecprint);
    212 		sbus_destroy_attach_args(&sax);
    213 	}
    214 }
    215 
    216 int
    217 qec_bus_map(bus_space_tag_t t, bus_addr_t ba, bus_size_t size, int flags, vaddr_t va, bus_space_handle_t *hp)
    218 	/* va:	 Ignored */
    219 {
    220 	int error;
    221 
    222 	if ((error = bus_space_translate_address_generic(
    223 				t->ranges, t->nranges, &ba)) != 0)
    224 		return (error);
    225 
    226 	return (bus_space_map(t->parent, ba, size, flags, hp));
    227 }
    228 
    229 void *
    230 qec_intr_establish(t, pri, level, handler, arg, fastvec)
    231 	bus_space_tag_t t;
    232 	int pri;
    233 	int level;
    234 	int (*handler)(void *);
    235 	void *arg;
    236 	void (*fastvec)(void);	/* ignored */
    237 {
    238 	struct qec_softc *sc = t->cookie;
    239 
    240 	if (pri == 0) {
    241 		/*
    242 		 * qe.c calls bus_intr_establish() with `pri == 0'
    243 		 * XXX - see also comment in qec_attach().
    244 		 */
    245 		if (sc->sc_intr == NULL) {
    246 			printf("%s: warning: no interrupts\n",
    247 				device_xname(&sc->sc_dev));
    248 			return (NULL);
    249 		}
    250 		pri = sc->sc_intr->oi_pri;
    251 	}
    252 
    253 	return (bus_intr_establish(t->parent, pri, level, handler, arg));
    254 }
    255 
    256 void
    257 qec_init(struct qec_softc *sc)
    258 {
    259 	bus_space_tag_t t = sc->sc_bustag;
    260 	bus_space_handle_t qr = sc->sc_regs;
    261 	u_int32_t v, burst = 0, psize;
    262 	int i;
    263 
    264 	/* First, reset the controller */
    265 	bus_space_write_4(t, qr, QEC_QRI_CTRL, QEC_CTRL_RESET);
    266 	for (i = 0; i < 1000; i++) {
    267 		DELAY(100);
    268 		v = bus_space_read_4(t, qr, QEC_QRI_CTRL);
    269 		if ((v & QEC_CTRL_RESET) == 0)
    270 			break;
    271 	}
    272 
    273 	/*
    274 	 * Cut available buffer size into receive and transmit buffers.
    275 	 * XXX - should probably be done in be & qe driver...
    276 	 */
    277 	v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels;
    278 	bus_space_write_4(t, qr, QEC_QRI_MSIZE, v);
    279 
    280 	v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2);
    281 	bus_space_write_4(t, qr, QEC_QRI_RSIZE, v);
    282 	bus_space_write_4(t, qr, QEC_QRI_TSIZE, v);
    283 
    284 	psize = sc->sc_nchannels == 1 ? QEC_PSIZE_2048 : 0;
    285 	bus_space_write_4(t, qr, QEC_QRI_PSIZE, psize);
    286 
    287 	if (sc->sc_burst & SBUS_BURST_64)
    288 		burst = QEC_CTRL_B64;
    289 	else if (sc->sc_burst & SBUS_BURST_32)
    290 		burst = QEC_CTRL_B32;
    291 	else
    292 		burst = QEC_CTRL_B16;
    293 
    294 	v = bus_space_read_4(t, qr, QEC_QRI_CTRL);
    295 	v = (v & QEC_CTRL_MODEMASK) | burst;
    296 	bus_space_write_4(t, qr, QEC_QRI_CTRL, v);
    297 }
    298 
    299 /*
    300  * Common routine to initialize the QEC packet ring buffer.
    301  * Called from be & qe drivers.
    302  */
    303 void
    304 qec_meminit(struct qec_ring *qr, unsigned int pktbufsz)
    305 {
    306 	bus_addr_t txbufdma, rxbufdma;
    307 	bus_addr_t dma;
    308 	void *p;
    309 	unsigned int ntbuf, nrbuf, i;
    310 
    311 	p = qr->rb_membase;
    312 	dma = qr->rb_dmabase;
    313 
    314 	ntbuf = qr->rb_ntbuf;
    315 	nrbuf = qr->rb_nrbuf;
    316 
    317 	/*
    318 	 * Allocate transmit descriptors
    319 	 */
    320 	qr->rb_txd = (struct qec_xd *)p;
    321 	qr->rb_txddma = dma;
    322 	p = (char *)p + QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
    323 	dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
    324 
    325 	/*
    326 	 * Allocate receive descriptors
    327 	 */
    328 	qr->rb_rxd = (struct qec_xd *)p;
    329 	qr->rb_rxddma = dma;
    330 	p = (char *)p + QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
    331 	dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
    332 
    333 
    334 	/*
    335 	 * Allocate transmit buffers
    336 	 */
    337 	qr->rb_txbuf = p;
    338 	txbufdma = dma;
    339 	p = (char *)p + ntbuf * pktbufsz;
    340 	dma += ntbuf * pktbufsz;
    341 
    342 	/*
    343 	 * Allocate receive buffers
    344 	 */
    345 	qr->rb_rxbuf = p;
    346 	rxbufdma = dma;
    347 	p = (char *)p + nrbuf * pktbufsz;
    348 	dma += nrbuf * pktbufsz;
    349 
    350 	/*
    351 	 * Initialize transmit buffer descriptors
    352 	 */
    353 	for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
    354 		qr->rb_txd[i].xd_addr = (u_int32_t)
    355 			(txbufdma + (i % ntbuf) * pktbufsz);
    356 		qr->rb_txd[i].xd_flags = 0;
    357 	}
    358 
    359 	/*
    360 	 * Initialize receive buffer descriptors
    361 	 */
    362 	for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
    363 		qr->rb_rxd[i].xd_addr = (u_int32_t)
    364 			(rxbufdma + (i % nrbuf) * pktbufsz);
    365 		qr->rb_rxd[i].xd_flags = (i < nrbuf)
    366 			? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH)
    367 			: 0;
    368 	}
    369 
    370 	qr->rb_tdhead = qr->rb_tdtail = 0;
    371 	qr->rb_td_nbusy = 0;
    372 	qr->rb_rdtail = 0;
    373 }
    374