qec.c revision 1.8 1 /* $NetBSD: qec.c,v 1.8 1999/01/17 20:47:50 pk Exp $ */
2
3 /*-
4 * Copyright (c) 1998 The NetBSD Foundation, Inc.
5 * All rights reserved.
6 *
7 * This code is derived from software contributed to The NetBSD Foundation
8 * by Paul Kranenburg.
9 *
10 * Redistribution and use in source and binary forms, with or without
11 * modification, are permitted provided that the following conditions
12 * are met:
13 * 1. Redistributions of source code must retain the above copyright
14 * notice, this list of conditions and the following disclaimer.
15 * 2. Redistributions in binary form must reproduce the above copyright
16 * notice, this list of conditions and the following disclaimer in the
17 * documentation and/or other materials provided with the distribution.
18 * 3. All advertising materials mentioning features or use of this software
19 * must display the following acknowledgement:
20 * This product includes software developed by the NetBSD
21 * Foundation, Inc. and its contributors.
22 * 4. Neither the name of The NetBSD Foundation nor the names of its
23 * contributors may be used to endorse or promote products derived
24 * from this software without specific prior written permission.
25 *
26 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
27 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
28 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
29 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
30 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
31 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
32 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
33 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
34 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
35 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
36 * POSSIBILITY OF SUCH DAMAGE.
37 */
38
39 #include <sys/types.h>
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/errno.h>
44 #include <sys/device.h>
45 #include <sys/malloc.h>
46
47 #include <machine/bus.h>
48 #include <machine/autoconf.h>
49
50 #include <dev/sbus/sbusvar.h>
51 #include <dev/sbus/qecreg.h>
52 #include <dev/sbus/qecvar.h>
53
54 static int qecprint __P((void *, const char *));
55 static int qecmatch __P((struct device *, struct cfdata *, void *));
56 static void qecattach __P((struct device *, struct device *, void *));
57 void qec_init __P((struct qec_softc *));
58
59 static int qec_bus_map __P((
60 bus_space_tag_t,
61 bus_type_t, /*slot*/
62 bus_addr_t, /*offset*/
63 bus_size_t, /*size*/
64 int, /*flags*/
65 vaddr_t, /*preferred virtual address */
66 bus_space_handle_t *));
67 static void *qec_intr_establish __P((
68 bus_space_tag_t,
69 int, /*level*/
70 int, /*flags*/
71 int (*) __P((void *)), /*handler*/
72 void *)); /*arg*/
73
74 struct cfattach qec_ca = {
75 sizeof(struct qec_softc), qecmatch, qecattach
76 };
77
78 int
79 qecprint(aux, busname)
80 void *aux;
81 const char *busname;
82 {
83 struct sbus_attach_args *sa = aux;
84 bus_space_tag_t t = sa->sa_bustag;
85 struct qec_softc *sc = t->cookie;
86
87 sa->sa_bustag = sc->sc_bustag; /* XXX */
88 sbus_print(aux, busname); /* XXX */
89 sa->sa_bustag = t; /* XXX */
90 return (UNCONF);
91 }
92
93 int
94 qecmatch(parent, cf, aux)
95 struct device *parent;
96 struct cfdata *cf;
97 void *aux;
98 {
99 struct sbus_attach_args *sa = aux;
100
101 return (strcmp(cf->cf_driver->cd_name, sa->sa_name) == 0);
102 }
103
104 /*
105 * Attach all the sub-devices we can find
106 */
107 void
108 qecattach(parent, self, aux)
109 struct device *parent, *self;
110 void *aux;
111 {
112 struct sbus_attach_args *sa = aux;
113 struct qec_softc *sc = (void *)self;
114 int node;
115 int sbusburst;
116 bus_space_tag_t sbt;
117 bus_space_handle_t bh;
118 struct bootpath *bp;
119 int error;
120
121 sc->sc_bustag = sa->sa_bustag;
122 sc->sc_dmatag = sa->sa_dmatag;
123 node = sa->sa_node;
124
125 if (sa->sa_nreg < 2) {
126 printf("%s: only %d register sets\n",
127 self->dv_xname, sa->sa_nreg);
128 return;
129 }
130
131 if (sbus_bus_map(sa->sa_bustag,
132 sa->sa_reg[0].sbr_slot,
133 sa->sa_reg[0].sbr_offset,
134 sa->sa_reg[0].sbr_size,
135 BUS_SPACE_MAP_LINEAR, 0, &sc->sc_regs) != 0) {
136 printf("%s: attach: cannot map registers\n", self->dv_xname);
137 return;
138 }
139
140 /*
141 * This device's "register space 1" is just a buffer where the
142 * Lance ring-buffers can be stored. Note the buffer's location
143 * and size, so the child driver can pick them up.
144 */
145 if (sbus_bus_map(sa->sa_bustag,
146 sa->sa_reg[1].sbr_slot,
147 sa->sa_reg[1].sbr_offset,
148 sa->sa_reg[1].sbr_size,
149 BUS_SPACE_MAP_LINEAR, 0, &bh) != 0) {
150 printf("%s: attach: cannot map registers\n", self->dv_xname);
151 return;
152 }
153 sc->sc_buffer = (caddr_t)bh;
154 sc->sc_bufsiz = (bus_size_t)sa->sa_reg[1].sbr_size;
155
156 /* Get number of on-board channels */
157 sc->sc_nchannels = getpropint(node, "#channels", -1);
158 if (sc->sc_nchannels == -1) {
159 printf(": no channels\n");
160 return;
161 }
162
163 /*
164 * Get transfer burst size from PROM
165 */
166 sbusburst = ((struct sbus_softc *)parent)->sc_burst;
167 if (sbusburst == 0)
168 sbusburst = SBUS_BURST_32 - 1; /* 1->16 */
169
170 sc->sc_burst = getpropint(node, "burst-sizes", -1);
171 if (sc->sc_burst == -1)
172 /* take SBus burst sizes */
173 sc->sc_burst = sbusburst;
174
175 /* Clamp at parent's burst sizes */
176 sc->sc_burst &= sbusburst;
177
178 sbus_establish(&sc->sc_sd, &sc->sc_dev);
179
180 /*
181 * Collect address translations from the OBP.
182 */
183 error = getprop(node, "ranges", sizeof(struct sbus_range),
184 &sc->sc_nrange, (void **)&sc->sc_range);
185 switch (error) {
186 case 0:
187 break;
188 case ENOENT:
189 default:
190 panic("%s: error getting ranges property", self->dv_xname);
191 }
192
193 /* Propagate bootpath */
194 if (sa->sa_bp != NULL)
195 bp = sa->sa_bp + 1;
196 else
197 bp = NULL;
198
199 /* Allocate a bus tag */
200 sbt = (bus_space_tag_t)
201 malloc(sizeof(struct sparc_bus_space_tag), M_DEVBUF, M_NOWAIT);
202 if (sbt == NULL) {
203 printf("%s: attach: out of memory\n", self->dv_xname);
204 return;
205 }
206
207 bzero(sbt, sizeof *sbt);
208 sbt->cookie = sc;
209 sbt->parent = sc->sc_bustag;
210 sbt->sparc_bus_map = qec_bus_map;
211 sbt->sparc_intr_establish = qec_intr_establish;
212
213 /*
214 * Save interrupt information for use in our qec_intr_establish()
215 * function below. Apparently, the intr level for the quad
216 * ethernet board (qe) is stored in the QEC node rather then
217 * separately in each of the QE nodes.
218 *
219 * XXX - qe.c should call bus_intr_establish() with `level = 0'..
220 * XXX - maybe we should have our own attach args for all that.
221 */
222 sc->sc_intr = sa->sa_intr;
223
224 printf(": %dK memory\n", sc->sc_bufsiz / 1024);
225
226 qec_init(sc);
227
228 /* search through children */
229 for (node = firstchild(node); node; node = nextsibling(node)) {
230 struct sbus_attach_args sa;
231 sbus_setup_attach_args((struct sbus_softc *)parent,
232 sbt, sc->sc_dmatag, node, bp, &sa);
233 (void)config_found(&sc->sc_dev, (void *)&sa, qecprint);
234 sbus_destroy_attach_args(&sa);
235 }
236 }
237
238 int
239 qec_bus_map(t, btype, offset, size, flags, vaddr, hp)
240 bus_space_tag_t t;
241 bus_type_t btype;
242 bus_addr_t offset;
243 bus_size_t size;
244 int flags;
245 vaddr_t vaddr;
246 bus_space_handle_t *hp;
247 {
248 struct qec_softc *sc = t->cookie;
249 int slot = btype;
250 int i;
251
252 for (i = 0; i < sc->sc_nrange; i++) {
253 bus_addr_t paddr;
254 bus_type_t iospace;
255
256 if (sc->sc_range[i].cspace != slot)
257 continue;
258
259 /* We've found the connection to the parent bus */
260 paddr = sc->sc_range[i].poffset + offset;
261 iospace = sc->sc_range[i].pspace;
262 return (bus_space_map2(sc->sc_bustag, iospace, paddr,
263 size, flags, vaddr, hp));
264 }
265
266 return (EINVAL);
267 }
268
269 void *
270 qec_intr_establish(t, level, flags, handler, arg)
271 bus_space_tag_t t;
272 int level;
273 int flags;
274 int (*handler) __P((void *));
275 void *arg;
276 {
277 struct qec_softc *sc = t->cookie;
278
279 if (level == 0) {
280 /*
281 * qe.c calls bus_intr_establish() with `level = 0'
282 * XXX - see also comment in qec_attach().
283 */
284 if (sc->sc_intr == NULL) {
285 printf("%s: warning: no interrupts\n",
286 sc->sc_dev.dv_xname);
287 return (NULL);
288 }
289 level = sc->sc_intr->sbi_pri;
290 }
291
292 return (bus_intr_establish(t->parent, level, flags, handler, arg));
293 }
294
295 void
296 qec_init(sc)
297 struct qec_softc *sc;
298 {
299 bus_space_tag_t t = sc->sc_bustag;
300 bus_space_handle_t qr = sc->sc_regs;
301 u_int32_t v, burst = 0;
302
303 /*
304 * Cut available buffer size into receive and transmit buffers.
305 * XXX - should probably be done in be & qe driver...
306 */
307 v = sc->sc_msize = sc->sc_bufsiz / sc->sc_nchannels;
308 bus_space_write_4(t, qr, QEC_QRI_MSIZE, v);
309
310 v = sc->sc_rsize = sc->sc_bufsiz / (sc->sc_nchannels * 2);
311 bus_space_write_4(t, qr, QEC_QRI_RSIZE, v);
312 bus_space_write_4(t, qr, QEC_QRI_TSIZE, v);
313
314 bus_space_write_4(t, qr, QEC_QRI_PSIZE, QEC_PSIZE_2048);
315
316 if (sc->sc_burst & SBUS_BURST_64)
317 burst = QEC_CTRL_B64;
318 else if (sc->sc_burst & SBUS_BURST_32)
319 burst = QEC_CTRL_B32;
320 else
321 burst = QEC_CTRL_B16;
322
323 v = bus_space_read_4(t, qr, QEC_QRI_CTRL);
324 v = (v & QEC_CTRL_MODEMASK) | burst;
325 bus_space_write_4(t, qr, QEC_QRI_CTRL, v);
326 }
327
328 /*
329 * Common routine to initialize the QEC packet ring buffer.
330 * Called from be & qe drivers.
331 */
332 void
333 qec_meminit(qr, pktbufsz)
334 struct qec_ring *qr;
335 unsigned int pktbufsz;
336 {
337 bus_addr_t txbufdma, rxbufdma;
338 bus_addr_t dma;
339 caddr_t p;
340 unsigned int ntbuf, nrbuf, i;
341
342 p = qr->rb_membase;
343 dma = qr->rb_dmabase;
344
345 ntbuf = qr->rb_ntbuf;
346 nrbuf = qr->rb_nrbuf;
347
348 /*
349 * Allocate transmit descriptors
350 */
351 qr->rb_txd = (struct qec_xd *)p;
352 qr->rb_txddma = dma;
353 p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
354 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
355
356 /*
357 * Allocate receive descriptors
358 */
359 qr->rb_rxd = (struct qec_xd *)p;
360 qr->rb_rxddma = dma;
361 p += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
362 dma += QEC_XD_RING_MAXSIZE * sizeof(struct qec_xd);
363
364
365 /*
366 * Allocate transmit buffers
367 */
368 qr->rb_txbuf = p;
369 txbufdma = dma;
370 p += ntbuf * pktbufsz;
371 dma += ntbuf * pktbufsz;
372
373 /*
374 * Allocate receive buffers
375 */
376 qr->rb_rxbuf = p;
377 rxbufdma = dma;
378 p += nrbuf * pktbufsz;
379 dma += nrbuf * pktbufsz;
380
381 /*
382 * Initialize transmit buffer descriptors
383 */
384 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
385 qr->rb_txd[i].xd_addr = (u_int32_t)
386 (txbufdma + (i % ntbuf) * pktbufsz);
387 qr->rb_txd[i].xd_flags = 0;
388 }
389
390 /*
391 * Initialize receive buffer descriptors
392 */
393 for (i = 0; i < QEC_XD_RING_MAXSIZE; i++) {
394 qr->rb_rxd[i].xd_addr = (u_int32_t)
395 (rxbufdma + (i % nrbuf) * pktbufsz);
396 qr->rb_rxd[i].xd_flags = (i < nrbuf)
397 ? QEC_XD_OWN | (pktbufsz & QEC_XD_LENGTH)
398 : 0;
399 }
400
401 qr->rb_tdhead = qr->rb_tdtail = 0;
402 qr->rb_td_nbusy = 0;
403 qr->rb_rdtail = 0;
404 }
405