atapi_wdc.c revision 1.101
1 /* $NetBSD: atapi_wdc.c,v 1.101 2006/09/07 12:34:42 itohy Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.101 2006/09/07 12:34:42 itohy Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/file.h> 43 #include <sys/stat.h> 44 #include <sys/buf.h> 45 #include <sys/malloc.h> 46 #include <sys/device.h> 47 #include <sys/syslog.h> 48 #include <sys/proc.h> 49 #include <sys/dvdio.h> 50 51 #include <machine/intr.h> 52 #include <machine/bus.h> 53 54 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 55 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 56 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 57 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 58 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 59 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 60 61 #include <dev/ata/ataconf.h> 62 #include <dev/ata/atareg.h> 63 #include <dev/ata/atavar.h> 64 #include <dev/ic/wdcreg.h> 65 #include <dev/ic/wdcvar.h> 66 67 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 68 69 #define DEBUG_INTR 0x01 70 #define DEBUG_XFERS 0x02 71 #define DEBUG_STATUS 0x04 72 #define DEBUG_FUNCS 0x08 73 #define DEBUG_PROBE 0x10 74 #ifdef ATADEBUG 75 int wdcdebug_atapi_mask = 0; 76 #define ATADEBUG_PRINT(args, level) \ 77 if (wdcdebug_atapi_mask & (level)) \ 78 printf args 79 #else 80 #define ATADEBUG_PRINT(args, level) 81 #endif 82 83 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */ 84 #define ATAPI_MODE_DELAY 1000 /* 1s, timeout for SET_FEATYRE cmds */ 85 86 static int wdc_atapi_get_params(struct scsipi_channel *, int, 87 struct ataparams *); 88 static void wdc_atapi_probe_device(struct atapibus_softc *, int); 89 static void wdc_atapi_minphys (struct buf *bp); 90 static void wdc_atapi_start(struct ata_channel *,struct ata_xfer *); 91 static int wdc_atapi_intr(struct ata_channel *, struct ata_xfer *, int); 92 static void wdc_atapi_kill_xfer(struct ata_channel *, 93 struct ata_xfer *, int); 94 static void wdc_atapi_phase_complete(struct ata_xfer *); 95 static void wdc_atapi_done(struct ata_channel *, struct ata_xfer *); 96 static void wdc_atapi_reset(struct ata_channel *, struct ata_xfer *); 97 static void wdc_atapi_scsipi_request(struct scsipi_channel *, 98 scsipi_adapter_req_t, void *); 99 static void wdc_atapi_kill_pending(struct scsipi_periph *); 100 static void wdc_atapi_polldsc(void *arg); 101 102 #define MAX_SIZE MAXPHYS 103 104 static const struct scsipi_bustype wdc_atapi_bustype = { 105 SCSIPI_BUSTYPE_ATAPI, 106 atapi_scsipi_cmd, 107 atapi_interpret_sense, 108 atapi_print_addr, 109 wdc_atapi_kill_pending, 110 }; 111 112 void 113 wdc_atapibus_attach(struct atabus_softc *ata_sc) 114 { 115 struct ata_channel *chp = ata_sc->sc_chan; 116 struct atac_softc *atac = chp->ch_atac; 117 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 118 struct scsipi_channel *chan = &chp->ch_atapi_channel; 119 120 /* 121 * Fill in the scsipi_adapter. 122 */ 123 adapt->adapt_dev = &atac->atac_dev; 124 adapt->adapt_nchannels = atac->atac_nchannels; 125 adapt->adapt_request = wdc_atapi_scsipi_request; 126 adapt->adapt_minphys = wdc_atapi_minphys; 127 if (atac->atac_cap & ATAC_CAP_NOIRQ) 128 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY; 129 atac->atac_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device; 130 131 /* 132 * Fill in the scsipi_channel. 133 */ 134 memset(chan, 0, sizeof(*chan)); 135 chan->chan_adapter = adapt; 136 chan->chan_bustype = &wdc_atapi_bustype; 137 chan->chan_channel = chp->ch_channel; 138 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 139 chan->chan_openings = 1; 140 chan->chan_max_periph = 1; 141 chan->chan_ntargets = 2; 142 chan->chan_nluns = 1; 143 144 chp->atapibus = config_found_ia(&ata_sc->sc_dev, "atapi", chan, 145 atapiprint); 146 } 147 148 static void 149 wdc_atapi_minphys(struct buf *bp) 150 { 151 152 if (bp->b_bcount > MAX_SIZE) 153 bp->b_bcount = MAX_SIZE; 154 minphys(bp); 155 } 156 157 /* 158 * Kill off all pending xfers for a periph. 159 * 160 * Must be called at splbio(). 161 */ 162 static void 163 wdc_atapi_kill_pending(struct scsipi_periph *periph) 164 { 165 struct atac_softc *atac = 166 (void *)periph->periph_channel->chan_adapter->adapt_dev; 167 struct ata_channel *chp = 168 atac->atac_channels[periph->periph_channel->chan_channel]; 169 170 ata_kill_pending(&chp->ch_drive[periph->periph_target]); 171 } 172 173 static void 174 wdc_atapi_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, int reason) 175 { 176 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 177 178 /* remove this command from xfer queue */ 179 switch (reason) { 180 case KILL_GONE: 181 sc_xfer->error = XS_DRIVER_STUFFUP; 182 break; 183 case KILL_RESET: 184 sc_xfer->error = XS_RESET; 185 break; 186 default: 187 printf("wdc_ata_bio_kill_xfer: unknown reason %d\n", 188 reason); 189 panic("wdc_ata_bio_kill_xfer"); 190 } 191 ata_free_xfer(chp, xfer); 192 scsipi_done(sc_xfer); 193 } 194 195 static int 196 wdc_atapi_get_params(struct scsipi_channel *chan, int drive, 197 struct ataparams *id) 198 { 199 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 200 struct atac_softc *atac = &wdc->sc_atac; 201 struct wdc_regs *wdr = &wdc->regs[chan->chan_channel]; 202 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 203 struct ata_command ata_c; 204 205 /* if no ATAPI device detected at wdc attach time, skip */ 206 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) { 207 ATADEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n", 208 drive), DEBUG_PROBE); 209 return -1; 210 } 211 212 memset(&ata_c, 0, sizeof(struct ata_command)); 213 ata_c.r_command = ATAPI_SOFT_RESET; 214 ata_c.r_st_bmask = 0; 215 ata_c.r_st_pmask = 0; 216 ata_c.flags = AT_WAIT | AT_POLL; 217 ata_c.timeout = WDC_RESET_WAIT; 218 if (wdc_exec_command(&chp->ch_drive[drive], &ata_c) != ATACMD_COMPLETE) { 219 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for" 220 " drive %s:%d:%d: driver failed\n", 221 atac->atac_dev.dv_xname, chp->ch_channel, drive); 222 panic("wdc_atapi_get_params"); 223 } 224 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 225 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET " 226 "failed for drive %s:%d:%d: error 0x%x\n", 227 atac->atac_dev.dv_xname, chp->ch_channel, drive, 228 ata_c.r_error), DEBUG_PROBE); 229 return -1; 230 } 231 chp->ch_drive[drive].state = 0; 232 233 (void)bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_status], 0); 234 235 /* Some ATAPI devices need a bit more time after software reset. */ 236 delay(5000); 237 if (ata_get_params(&chp->ch_drive[drive], AT_WAIT, id) != 0) { 238 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE " 239 "failed for drive %s:%d:%d: error 0x%x\n", 240 atac->atac_dev.dv_xname, chp->ch_channel, drive, 241 ata_c.r_error), DEBUG_PROBE); 242 return -1; 243 } 244 return 0; 245 } 246 247 static void 248 wdc_atapi_probe_device(struct atapibus_softc *sc, int target) 249 { 250 struct scsipi_channel *chan = sc->sc_channel; 251 struct scsipi_periph *periph; 252 struct ataparams ids; 253 struct ataparams *id = &ids; 254 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 255 struct atac_softc *atac = &wdc->sc_atac; 256 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 257 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 258 struct scsipibus_attach_args sa; 259 char serial_number[21], model[41], firmware_revision[9]; 260 int s; 261 262 /* skip if already attached */ 263 if (scsipi_lookup_periph(chan, target, 0) != NULL) 264 return; 265 266 if (wdc_atapi_get_params(chan, target, id) == 0) { 267 #ifdef ATAPI_DEBUG_PROBE 268 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 269 sc->sc_dev.dv_xname, target, 270 id->atap_config & ATAPI_CFG_CMD_MASK, 271 id->atap_config & ATAPI_CFG_DRQ_MASK); 272 #endif 273 periph = scsipi_alloc_periph(M_NOWAIT); 274 if (periph == NULL) { 275 printf("%s: unable to allocate periph for drive %d\n", 276 sc->sc_dev.dv_xname, target); 277 return; 278 } 279 periph->periph_dev = NULL; 280 periph->periph_channel = chan; 281 periph->periph_switch = &atapi_probe_periphsw; 282 periph->periph_target = target; 283 periph->periph_lun = 0; 284 periph->periph_quirks = PQUIRK_ONLYBIG; 285 286 #ifdef SCSIPI_DEBUG 287 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 288 SCSIPI_DEBUG_TARGET == target) 289 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 290 #endif 291 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 292 if (id->atap_config & ATAPI_CFG_REMOV) 293 periph->periph_flags |= PERIPH_REMOVABLE; 294 if (periph->periph_type == T_SEQUENTIAL) { 295 s = splbio(); 296 drvp->drive_flags |= DRIVE_ATAPIST; 297 splx(s); 298 } 299 300 sa.sa_periph = periph; 301 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 302 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 303 T_REMOV : T_FIXED; 304 scsipi_strvis((u_char *)model, 40, id->atap_model, 40); 305 scsipi_strvis((u_char *)serial_number, 20, id->atap_serial, 306 20); 307 scsipi_strvis((u_char *)firmware_revision, 8, 308 id->atap_revision, 8); 309 sa.sa_inqbuf.vendor = model; 310 sa.sa_inqbuf.product = serial_number; 311 sa.sa_inqbuf.revision = firmware_revision; 312 313 /* 314 * Determine the operating mode capabilities of the device. 315 */ 316 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16) 317 periph->periph_cap |= PERIPH_CAP_CMD16; 318 /* XXX This is gross. */ 319 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 320 321 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 322 323 if (drvp->drv_softc) 324 ata_probe_caps(drvp); 325 else { 326 s = splbio(); 327 drvp->drive_flags &= ~DRIVE_ATAPI; 328 splx(s); 329 } 330 } else { 331 s = splbio(); 332 drvp->drive_flags &= ~DRIVE_ATAPI; 333 splx(s); 334 } 335 } 336 337 static void 338 wdc_atapi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 339 void *arg) 340 { 341 struct scsipi_adapter *adapt = chan->chan_adapter; 342 struct scsipi_periph *periph; 343 struct scsipi_xfer *sc_xfer; 344 struct wdc_softc *wdc = (void *)adapt->adapt_dev; 345 struct atac_softc *atac = &wdc->sc_atac; 346 struct ata_xfer *xfer; 347 int channel = chan->chan_channel; 348 int drive, s; 349 350 switch (req) { 351 case ADAPTER_REQ_RUN_XFER: 352 sc_xfer = arg; 353 periph = sc_xfer->xs_periph; 354 drive = periph->periph_target; 355 356 ATADEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n", 357 atac->atac_dev.dv_xname, channel, drive), DEBUG_XFERS); 358 if (!device_is_active(&atac->atac_dev)) { 359 sc_xfer->error = XS_DRIVER_STUFFUP; 360 scsipi_done(sc_xfer); 361 return; 362 } 363 364 xfer = ata_get_xfer(ATAXF_NOSLEEP); 365 if (xfer == NULL) { 366 sc_xfer->error = XS_RESOURCE_SHORTAGE; 367 scsipi_done(sc_xfer); 368 return; 369 } 370 371 if (sc_xfer->xs_control & XS_CTL_POLL) 372 xfer->c_flags |= C_POLL; 373 if ((atac->atac_channels[channel]->ch_drive[drive].drive_flags & 374 (DRIVE_DMA | DRIVE_UDMA)) && sc_xfer->datalen > 0) 375 xfer->c_flags |= C_DMA; 376 #if NATA_PIOBM 377 else if ((atac->atac_cap & ATAC_CAP_PIOBM) && 378 sc_xfer->datalen > 0) 379 xfer->c_flags |= C_PIOBM; 380 #endif 381 xfer->c_drive = drive; 382 xfer->c_flags |= C_ATAPI; 383 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY || 384 sc_xfer->cmd->opcode == GPCMD_SEND_KEY || 385 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) { 386 /* 387 * DVD authentication commands must always be done in 388 * PIO mode. 389 */ 390 xfer->c_flags &= ~C_DMA; 391 } 392 /* 393 * DMA can't deal with transfers which are not a multiple of 394 * 2 bytes. It's a bug to request such transfers for ATAPI 395 * but as the request can come from userland, we have to 396 * protect against it. 397 * Also some devices seems to not handle DMA xfers of less than 398 * 4 bytes. 399 */ 400 if (sc_xfer->datalen < 4 || (sc_xfer->datalen & 0x01)) 401 xfer->c_flags &= ~C_DMA; 402 403 xfer->c_cmd = sc_xfer; 404 xfer->c_databuf = sc_xfer->data; 405 xfer->c_bcount = sc_xfer->datalen; 406 xfer->c_start = wdc_atapi_start; 407 xfer->c_intr = wdc_atapi_intr; 408 xfer->c_kill_xfer = wdc_atapi_kill_xfer; 409 xfer->c_dscpoll = 0; 410 s = splbio(); 411 ata_exec_xfer(atac->atac_channels[channel], xfer); 412 #ifdef DIAGNOSTIC 413 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 414 (sc_xfer->xs_status & XS_STS_DONE) == 0) 415 panic("wdc_atapi_scsipi_request: polled command " 416 "not done"); 417 #endif 418 splx(s); 419 return; 420 421 default: 422 /* Not supported, nothing to do. */ 423 ; 424 } 425 } 426 427 static void 428 wdc_atapi_start(struct ata_channel *chp, struct ata_xfer *xfer) 429 { 430 struct atac_softc *atac = chp->ch_atac; 431 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 432 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 433 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 434 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 435 int wait_flags = (sc_xfer->xs_control & XS_CTL_POLL) ? AT_POLL : 0; 436 const char *errstring; 437 438 ATADEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n", 439 atac->atac_dev.dv_xname, chp->ch_channel, drvp->drive, 440 sc_xfer->xs_control), DEBUG_XFERS); 441 if ((xfer->c_flags & C_DMA) && (drvp->n_xfers <= NXFER)) 442 drvp->n_xfers++; 443 /* Do control operations specially. */ 444 if (__predict_false(drvp->state < READY)) { 445 /* If it's not a polled command, we need the kernel thread */ 446 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0 && 447 (chp->ch_flags & ATACH_TH_RUN) == 0) { 448 chp->ch_queue->queue_freeze++; 449 wakeup(&chp->ch_thread); 450 return; 451 } 452 /* 453 * disable interrupts, all commands here should be quick 454 * enouth to be able to poll, and we don't go here that often 455 */ 456 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 457 WDCTL_4BIT | WDCTL_IDS); 458 if (wdc->select) 459 wdc->select(chp, xfer->c_drive); 460 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 461 WDSD_IBM | (xfer->c_drive << 4)); 462 /* Don't try to set mode if controller can't be adjusted */ 463 if (atac->atac_set_modes == NULL) 464 goto ready; 465 /* Also don't try if the drive didn't report its mode */ 466 if ((drvp->drive_flags & DRIVE_MODE) == 0) 467 goto ready; 468 errstring = "unbusy"; 469 if (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags)) 470 goto timeout; 471 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 472 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 473 errstring = "piomode"; 474 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 475 goto timeout; 476 if (chp->ch_status & WDCS_ERR) { 477 if (chp->ch_error == WDCE_ABRT) { 478 /* 479 * Some ATAPI drives reject PIO settings. 480 * Fall back to PIO mode 3 since that's the 481 * minimum for ATAPI. 482 */ 483 printf("%s:%d:%d: PIO mode %d rejected, " 484 "falling back to PIO mode 3\n", 485 atac->atac_dev.dv_xname, 486 chp->ch_channel, xfer->c_drive, 487 drvp->PIO_mode); 488 if (drvp->PIO_mode > 3) 489 drvp->PIO_mode = 3; 490 } else 491 goto error; 492 } 493 if (drvp->drive_flags & DRIVE_UDMA) { 494 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 495 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 496 } else if (drvp->drive_flags & DRIVE_DMA) { 497 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 498 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 499 } else { 500 goto ready; 501 } 502 errstring = "dmamode"; 503 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 504 goto timeout; 505 if (chp->ch_status & WDCS_ERR) { 506 if (chp->ch_error == WDCE_ABRT) { 507 if (drvp->drive_flags & DRIVE_UDMA) 508 goto error; 509 else { 510 /* 511 * The drive rejected our DMA setting. 512 * Fall back to mode 1. 513 */ 514 printf("%s:%d:%d: DMA mode %d rejected, " 515 "falling back to DMA mode 0\n", 516 atac->atac_dev.dv_xname, 517 chp->ch_channel, xfer->c_drive, 518 drvp->DMA_mode); 519 if (drvp->DMA_mode > 0) 520 drvp->DMA_mode = 0; 521 } 522 } else 523 goto error; 524 } 525 ready: 526 drvp->state = READY; 527 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 528 WDCTL_4BIT); 529 delay(10); /* some drives need a little delay here */ 530 } 531 /* start timeout machinery */ 532 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 533 callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout), 534 wdctimeout, chp); 535 536 if (wdc->select) 537 wdc->select(chp, xfer->c_drive); 538 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 539 WDSD_IBM | (xfer->c_drive << 4)); 540 switch (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags) < 0) { 541 case WDCWAIT_OK: 542 break; 543 case WDCWAIT_TOUT: 544 printf("wdc_atapi_start: not ready, st = %02x\n", 545 chp->ch_status); 546 sc_xfer->error = XS_TIMEOUT; 547 wdc_atapi_reset(chp, xfer); 548 return; 549 case WDCWAIT_THR: 550 return; 551 } 552 553 /* 554 * Even with WDCS_ERR, the device should accept a command packet 555 * Limit length to what can be stuffed into the cylinder register 556 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536, 557 * but not all devices do that and it's not obvious from the 558 * ATAPI spec that that behaviour should be expected. If more 559 * data is necessary, multiple data transfer phases will be done. 560 */ 561 562 wdccommand(chp, xfer->c_drive, ATAPI_PKT_CMD, 563 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff, 564 0, 0, 0, 565 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0); 566 567 #if NATA_PIOBM 568 if (xfer->c_flags & C_PIOBM) { 569 int error; 570 int dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 571 ? WDC_DMA_READ : 0; 572 if (xfer->c_flags & C_POLL) { 573 /* XXX not supported yet --- fall back to PIO */ 574 xfer->c_flags &= ~C_PIOBM; 575 } else { 576 /* Init the DMA channel. */ 577 error = (*wdc->dma_init)(wdc->dma_arg, 578 chp->ch_channel, xfer->c_drive, 579 (char *)xfer->c_databuf, 580 xfer->c_bcount, 581 dma_flags | WDC_DMA_PIOBM_ATAPI); 582 if (error) { 583 if (error == EINVAL) { 584 /* 585 * We can't do DMA on this transfer 586 * for some reason. Fall back to 587 * PIO. 588 */ 589 xfer->c_flags &= ~C_PIOBM; 590 error = 0; 591 } else { 592 sc_xfer->error = XS_DRIVER_STUFFUP; 593 errstring = "piobm"; 594 goto error; 595 } 596 } 597 } 598 } 599 #endif 600 /* 601 * If there is no interrupt for CMD input, busy-wait for it (done in 602 * the interrupt routine. If it is a polled command, call the interrupt 603 * routine until command is done. 604 */ 605 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) != 606 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) { 607 /* Wait for at last 400ns for status bit to be valid */ 608 DELAY(1); 609 wdc_atapi_intr(chp, xfer, 0); 610 } else { 611 chp->ch_flags |= ATACH_IRQ_WAIT; 612 } 613 if (sc_xfer->xs_control & XS_CTL_POLL) { 614 if (chp->ch_flags & ATACH_DMA_WAIT) { 615 wdc_dmawait(chp, xfer, sc_xfer->timeout); 616 chp->ch_flags &= ~ATACH_DMA_WAIT; 617 } 618 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 619 /* Wait for at last 400ns for status bit to be valid */ 620 DELAY(1); 621 wdc_atapi_intr(chp, xfer, 0); 622 } 623 } 624 return; 625 timeout: 626 printf("%s:%d:%d: %s timed out\n", 627 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 628 errstring); 629 sc_xfer->error = XS_TIMEOUT; 630 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 631 delay(10); /* some drives need a little delay here */ 632 wdc_atapi_reset(chp, xfer); 633 return; 634 error: 635 printf("%s:%d:%d: %s ", 636 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 637 errstring); 638 printf("error (0x%x)\n", chp->ch_error); 639 sc_xfer->error = XS_SHORTSENSE; 640 sc_xfer->sense.atapi_sense = chp->ch_error; 641 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 642 delay(10); /* some drives need a little delay here */ 643 wdc_atapi_reset(chp, xfer); 644 return; 645 } 646 647 static int 648 wdc_atapi_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq) 649 { 650 struct atac_softc *atac = chp->ch_atac; 651 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 652 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 653 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 654 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 655 int len, phase, i, retries=0; 656 int ire, error; 657 int dma_flags = 0; 658 void *cmd; 659 660 ATADEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n", 661 atac->atac_dev.dv_xname, chp->ch_channel, drvp->drive), 662 DEBUG_INTR); 663 664 /* Is it not a transfer, but a control operation? */ 665 if (drvp->state < READY) { 666 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n", 667 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 668 drvp->state); 669 panic("wdc_atapi_intr: bad state"); 670 } 671 /* 672 * If we missed an interrupt in a PIO transfer, reset and restart. 673 * Don't try to continue transfer, we may have missed cycles. 674 */ 675 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 676 sc_xfer->error = XS_TIMEOUT; 677 wdc_atapi_reset(chp, xfer); 678 return 1; 679 } 680 681 #if NATA_PIOBM 682 /* Transfer-done interrupt for busmastering PIO operation */ 683 if ((xfer->c_flags & C_PIOBM) && (chp->ch_flags & ATACH_PIOBM_WAIT)) { 684 chp->ch_flags &= ~ATACH_PIOBM_WAIT; 685 686 /* restore transfer length */ 687 len = xfer->c_bcount; 688 if (xfer->c_lenoff < 0) 689 len += xfer->c_lenoff; 690 691 if (sc_xfer->xs_control & XS_CTL_DATA_IN) 692 goto end_piobm_datain; 693 else 694 goto end_piobm_dataout; 695 } 696 #endif 697 698 /* Ack interrupt done in wdc_wait_for_unbusy */ 699 if (wdc->select) 700 wdc->select(chp, xfer->c_drive); 701 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 702 WDSD_IBM | (xfer->c_drive << 4)); 703 if (wdc_wait_for_unbusy(chp, 704 (irq == 0) ? sc_xfer->timeout : 0, AT_POLL) == WDCWAIT_TOUT) { 705 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 706 return 0; /* IRQ was not for us */ 707 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n", 708 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 709 xfer->c_bcount, xfer->c_skip); 710 if (xfer->c_flags & C_DMA) { 711 ata_dmaerr(drvp, 712 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 713 } 714 sc_xfer->error = XS_TIMEOUT; 715 wdc_atapi_reset(chp, xfer); 716 return 1; 717 } 718 if (wdc->irqack) 719 wdc->irqack(chp); 720 721 /* 722 * If we missed an IRQ and were using DMA, flag it as a DMA error 723 * and reset device. 724 */ 725 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) { 726 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 727 sc_xfer->error = XS_RESET; 728 wdc_atapi_reset(chp, xfer); 729 return (1); 730 } 731 /* 732 * if the request sense command was aborted, report the short sense 733 * previously recorded, else continue normal processing 734 */ 735 736 if (xfer->c_flags & (C_DMA | C_PIOBM)) 737 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 738 ? WDC_DMA_READ : 0; 739 again: 740 len = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_lo], 0) + 741 256 * bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_hi], 0); 742 ire = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_ireason], 0); 743 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ); 744 ATADEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x " 745 "ire 0x%x :", xfer->c_bcount, 746 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR); 747 748 switch (phase) { 749 case PHASE_CMDOUT: 750 cmd = sc_xfer->cmd; 751 ATADEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR); 752 /* Init the DMA channel if necessary */ 753 if (xfer->c_flags & C_DMA) { 754 error = (*wdc->dma_init)(wdc->dma_arg, 755 chp->ch_channel, xfer->c_drive, 756 xfer->c_databuf, xfer->c_bcount, dma_flags); 757 if (error) { 758 if (error == EINVAL) { 759 /* 760 * We can't do DMA on this transfer 761 * for some reason. Fall back to 762 * PIO. 763 */ 764 xfer->c_flags &= ~C_DMA; 765 error = 0; 766 } else { 767 sc_xfer->error = XS_DRIVER_STUFFUP; 768 break; 769 } 770 } 771 } 772 773 /* send packet command */ 774 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */ 775 wdc->dataout_pio(chp, drvp->drive_flags, cmd, sc_xfer->cmdlen); 776 777 /* Start the DMA channel if necessary */ 778 if (xfer->c_flags & C_DMA) { 779 (*wdc->dma_start)(wdc->dma_arg, 780 chp->ch_channel, xfer->c_drive); 781 chp->ch_flags |= ATACH_DMA_WAIT; 782 } 783 784 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 785 chp->ch_flags |= ATACH_IRQ_WAIT; 786 } 787 return 1; 788 789 case PHASE_DATAOUT: 790 /* write data */ 791 ATADEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR); 792 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 || 793 (xfer->c_flags & C_DMA) != 0) { 794 printf("wdc_atapi_intr: bad data phase DATAOUT\n"); 795 if (xfer->c_flags & C_DMA) { 796 ata_dmaerr(drvp, 797 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 798 } 799 sc_xfer->error = XS_TIMEOUT; 800 wdc_atapi_reset(chp, xfer); 801 return 1; 802 } 803 xfer->c_lenoff = len - xfer->c_bcount; 804 if (xfer->c_bcount < len) { 805 printf("wdc_atapi_intr: warning: write only " 806 "%d of %d requested bytes\n", xfer->c_bcount, len); 807 len = xfer->c_bcount; 808 } 809 810 #if NATA_PIOBM 811 if (xfer->c_flags & C_PIOBM) { 812 /* start the busmastering PIO */ 813 (*wdc->piobm_start)(wdc->dma_arg, 814 chp->ch_channel, xfer->c_drive, 815 xfer->c_skip, len, WDC_PIOBM_XFER_IRQ); 816 chp->ch_flags |= ATACH_DMA_WAIT | ATACH_IRQ_WAIT | 817 ATACH_PIOBM_WAIT; 818 return 1; 819 } 820 #endif 821 wdc->dataout_pio(chp, drvp->drive_flags, 822 (char *)xfer->c_databuf + xfer->c_skip, len); 823 824 #if NATA_PIOBM 825 end_piobm_dataout: 826 #endif 827 for (i = xfer->c_lenoff; i > 0; i -= 2) 828 bus_space_write_2(wdr->cmd_iot, 829 wdr->cmd_iohs[wd_data], 0, 0); 830 831 xfer->c_skip += len; 832 xfer->c_bcount -= len; 833 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 834 chp->ch_flags |= ATACH_IRQ_WAIT; 835 } 836 return 1; 837 838 case PHASE_DATAIN: 839 /* Read data */ 840 ATADEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR); 841 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 || 842 (xfer->c_flags & C_DMA) != 0) { 843 printf("wdc_atapi_intr: bad data phase DATAIN\n"); 844 if (xfer->c_flags & C_DMA) { 845 ata_dmaerr(drvp, 846 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 847 } 848 sc_xfer->error = XS_TIMEOUT; 849 wdc_atapi_reset(chp, xfer); 850 return 1; 851 } 852 xfer->c_lenoff = len - xfer->c_bcount; 853 if (xfer->c_bcount < len) { 854 printf("wdc_atapi_intr: warning: reading only " 855 "%d of %d bytes\n", xfer->c_bcount, len); 856 len = xfer->c_bcount; 857 } 858 859 #if NATA_PIOBM 860 if (xfer->c_flags & C_PIOBM) { 861 /* start the busmastering PIO */ 862 (*wdc->piobm_start)(wdc->dma_arg, 863 chp->ch_channel, xfer->c_drive, 864 xfer->c_skip, len, WDC_PIOBM_XFER_IRQ); 865 chp->ch_flags |= ATACH_DMA_WAIT | ATACH_IRQ_WAIT | 866 ATACH_PIOBM_WAIT; 867 return 1; 868 } 869 #endif 870 wdc->datain_pio(chp, drvp->drive_flags, 871 (char *)xfer->c_databuf + xfer->c_skip, len); 872 873 #if NATA_PIOBM 874 end_piobm_datain: 875 #endif 876 if (xfer->c_lenoff > 0) 877 wdcbit_bucket(chp, len - xfer->c_bcount); 878 879 xfer->c_skip += len; 880 xfer->c_bcount -= len; 881 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 882 chp->ch_flags |= ATACH_IRQ_WAIT; 883 } 884 return 1; 885 886 case PHASE_ABORTED: 887 case PHASE_COMPLETED: 888 ATADEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR); 889 if (xfer->c_flags & C_DMA) { 890 xfer->c_bcount -= sc_xfer->datalen; 891 } 892 sc_xfer->resid = xfer->c_bcount; 893 wdc_atapi_phase_complete(xfer); 894 return(1); 895 896 default: 897 if (++retries<500) { 898 DELAY(100); 899 chp->ch_status = bus_space_read_1(wdr->cmd_iot, 900 wdr->cmd_iohs[wd_status], 0); 901 chp->ch_error = bus_space_read_1(wdr->cmd_iot, 902 wdr->cmd_iohs[wd_error], 0); 903 goto again; 904 } 905 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase); 906 if (chp->ch_status & WDCS_ERR) { 907 sc_xfer->error = XS_SHORTSENSE; 908 sc_xfer->sense.atapi_sense = chp->ch_error; 909 } else { 910 if (xfer->c_flags & C_DMA) { 911 ata_dmaerr(drvp, 912 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 913 } 914 sc_xfer->error = XS_RESET; 915 wdc_atapi_reset(chp, xfer); 916 return (1); 917 } 918 } 919 ATADEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x " 920 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense), 921 DEBUG_INTR); 922 wdc_atapi_done(chp, xfer); 923 return (1); 924 } 925 926 static void 927 wdc_atapi_phase_complete(struct ata_xfer *xfer) 928 { 929 struct ata_channel *chp = xfer->c_chp; 930 struct atac_softc *atac = chp->ch_atac; 931 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 932 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 933 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 934 935 /* wait for DSC if needed */ 936 if (drvp->drive_flags & DRIVE_ATAPIST) { 937 ATADEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) " 938 "polldsc %d\n", atac->atac_dev.dv_xname, chp->ch_channel, 939 xfer->c_drive, xfer->c_dscpoll), DEBUG_XFERS); 940 #if 1 941 if (cold) 942 panic("wdc_atapi_phase_complete: cold"); 943 #endif 944 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10, 945 AT_POLL) == WDCWAIT_TOUT) { 946 /* 10ms not enough, try again in 1 tick */ 947 if (xfer->c_dscpoll++ > 948 mstohz(sc_xfer->timeout)) { 949 printf("%s:%d:%d: wait_for_dsc " 950 "failed\n", 951 atac->atac_dev.dv_xname, 952 chp->ch_channel, xfer->c_drive); 953 sc_xfer->error = XS_TIMEOUT; 954 wdc_atapi_reset(chp, xfer); 955 return; 956 } else 957 callout_reset(&chp->ch_callout, 1, 958 wdc_atapi_polldsc, xfer); 959 return; 960 } 961 } 962 963 /* 964 * Some drive occasionally set WDCS_ERR with 965 * "ATA illegal length indication" in the error 966 * register. If we read some data the sense is valid 967 * anyway, so don't report the error. 968 */ 969 if (chp->ch_status & WDCS_ERR && 970 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 971 sc_xfer->resid == sc_xfer->datalen)) { 972 /* save the short sense */ 973 sc_xfer->error = XS_SHORTSENSE; 974 sc_xfer->sense.atapi_sense = chp->ch_error; 975 if ((sc_xfer->xs_periph->periph_quirks & 976 PQUIRK_NOSENSE) == 0) { 977 /* ask scsipi to send a REQUEST_SENSE */ 978 sc_xfer->error = XS_BUSY; 979 sc_xfer->status = SCSI_CHECK; 980 } else if (wdc->dma_status & 981 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) { 982 ata_dmaerr(drvp, 983 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 984 sc_xfer->error = XS_RESET; 985 wdc_atapi_reset(chp, xfer); 986 return; 987 } 988 } 989 if (xfer->c_bcount != 0) { 990 ATADEBUG_PRINT(("wdc_atapi_intr: bcount value is " 991 "%d after io\n", xfer->c_bcount), DEBUG_XFERS); 992 } 993 #ifdef DIAGNOSTIC 994 if (xfer->c_bcount < 0) { 995 printf("wdc_atapi_intr warning: bcount value " 996 "is %d after io\n", xfer->c_bcount); 997 } 998 #endif 999 ATADEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), " 1000 "error 0x%x sense 0x%x\n", sc_xfer->error, 1001 sc_xfer->sense.atapi_sense), DEBUG_INTR); 1002 wdc_atapi_done(chp, xfer); 1003 } 1004 1005 static void 1006 wdc_atapi_done(struct ata_channel *chp, struct ata_xfer *xfer) 1007 { 1008 struct atac_softc *atac = chp->ch_atac; 1009 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1010 int drive = xfer->c_drive; 1011 1012 ATADEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n", 1013 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 1014 (u_int)xfer->c_flags), DEBUG_XFERS); 1015 callout_stop(&chp->ch_callout); 1016 /* mark controller inactive and free the command */ 1017 chp->ch_queue->active_xfer = NULL; 1018 ata_free_xfer(chp, xfer); 1019 1020 if (chp->ch_drive[drive].drive_flags & DRIVE_WAITDRAIN) { 1021 sc_xfer->error = XS_DRIVER_STUFFUP; 1022 chp->ch_drive[drive].drive_flags &= ~DRIVE_WAITDRAIN; 1023 wakeup(&chp->ch_queue->active_xfer); 1024 } 1025 1026 ATADEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS); 1027 scsipi_done(sc_xfer); 1028 ATADEBUG_PRINT(("atastart from wdc_atapi_done, flags 0x%x\n", 1029 chp->ch_flags), DEBUG_XFERS); 1030 atastart(chp); 1031 } 1032 1033 static void 1034 wdc_atapi_reset(struct ata_channel *chp, struct ata_xfer *xfer) 1035 { 1036 struct atac_softc *atac = chp->ch_atac; 1037 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 1038 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1039 1040 wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET); 1041 drvp->state = 0; 1042 if (wdc_wait_for_unbusy(chp, WDC_RESET_WAIT, AT_POLL) != 0) { 1043 printf("%s:%d:%d: reset failed\n", 1044 atac->atac_dev.dv_xname, chp->ch_channel, 1045 xfer->c_drive); 1046 sc_xfer->error = XS_SELTIMEOUT; 1047 } 1048 wdc_atapi_done(chp, xfer); 1049 return; 1050 } 1051 1052 static void 1053 wdc_atapi_polldsc(void *arg) 1054 { 1055 1056 wdc_atapi_phase_complete(arg); 1057 } 1058
Indexes created Tue Sep 23 07:09:52 GMT 2025