atapi_wdc.c revision 1.103
1 /* $NetBSD: atapi_wdc.c,v 1.103 2006/10/01 20:10:31 reinoud Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.103 2006/10/01 20:10:31 reinoud Exp $"); 34 35 #ifndef ATADEBUG 36 #define ATADEBUG 37 #endif /* ATADEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/file.h> 43 #include <sys/stat.h> 44 #include <sys/buf.h> 45 #include <sys/malloc.h> 46 #include <sys/device.h> 47 #include <sys/syslog.h> 48 #include <sys/proc.h> 49 #include <sys/dvdio.h> 50 51 #include <machine/intr.h> 52 #include <machine/bus.h> 53 54 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 55 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 56 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 57 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 58 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 59 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 60 61 #include <dev/ata/ataconf.h> 62 #include <dev/ata/atareg.h> 63 #include <dev/ata/atavar.h> 64 #include <dev/ic/wdcreg.h> 65 #include <dev/ic/wdcvar.h> 66 67 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 68 69 #define DEBUG_INTR 0x01 70 #define DEBUG_XFERS 0x02 71 #define DEBUG_STATUS 0x04 72 #define DEBUG_FUNCS 0x08 73 #define DEBUG_PROBE 0x10 74 #ifdef ATADEBUG 75 int wdcdebug_atapi_mask = 0; 76 #define ATADEBUG_PRINT(args, level) \ 77 if (wdcdebug_atapi_mask & (level)) \ 78 printf args 79 #else 80 #define ATADEBUG_PRINT(args, level) 81 #endif 82 83 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */ 84 #define ATAPI_MODE_DELAY 1000 /* 1s, timeout for SET_FEATYRE cmds */ 85 86 static int wdc_atapi_get_params(struct scsipi_channel *, int, 87 struct ataparams *); 88 static void wdc_atapi_probe_device(struct atapibus_softc *, int); 89 static void wdc_atapi_minphys (struct buf *bp); 90 static void wdc_atapi_start(struct ata_channel *,struct ata_xfer *); 91 static int wdc_atapi_intr(struct ata_channel *, struct ata_xfer *, int); 92 static void wdc_atapi_kill_xfer(struct ata_channel *, 93 struct ata_xfer *, int); 94 static void wdc_atapi_phase_complete(struct ata_xfer *); 95 static void wdc_atapi_done(struct ata_channel *, struct ata_xfer *); 96 static void wdc_atapi_reset(struct ata_channel *, struct ata_xfer *); 97 static void wdc_atapi_scsipi_request(struct scsipi_channel *, 98 scsipi_adapter_req_t, void *); 99 static void wdc_atapi_kill_pending(struct scsipi_periph *); 100 static void wdc_atapi_polldsc(void *arg); 101 102 #define MAX_SIZE MAXPHYS 103 104 static const struct scsipi_bustype wdc_atapi_bustype = { 105 SCSIPI_BUSTYPE_ATAPI, 106 atapi_scsipi_cmd, 107 atapi_interpret_sense, 108 atapi_print_addr, 109 wdc_atapi_kill_pending, 110 }; 111 112 void 113 wdc_atapibus_attach(struct atabus_softc *ata_sc) 114 { 115 struct ata_channel *chp = ata_sc->sc_chan; 116 struct atac_softc *atac = chp->ch_atac; 117 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 118 struct scsipi_channel *chan = &chp->ch_atapi_channel; 119 120 /* 121 * Fill in the scsipi_adapter. 122 */ 123 adapt->adapt_dev = &atac->atac_dev; 124 adapt->adapt_nchannels = atac->atac_nchannels; 125 adapt->adapt_request = wdc_atapi_scsipi_request; 126 adapt->adapt_minphys = wdc_atapi_minphys; 127 if (atac->atac_cap & ATAC_CAP_NOIRQ) 128 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY; 129 atac->atac_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device; 130 131 /* 132 * Fill in the scsipi_channel. 133 */ 134 memset(chan, 0, sizeof(*chan)); 135 chan->chan_adapter = adapt; 136 chan->chan_bustype = &wdc_atapi_bustype; 137 chan->chan_channel = chp->ch_channel; 138 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 139 chan->chan_openings = 1; 140 chan->chan_max_periph = 1; 141 chan->chan_ntargets = 2; 142 chan->chan_nluns = 1; 143 144 chp->atapibus = config_found_ia(&ata_sc->sc_dev, "atapi", chan, 145 atapiprint); 146 } 147 148 static void 149 wdc_atapi_minphys(struct buf *bp) 150 { 151 152 if (bp->b_bcount > MAX_SIZE) 153 bp->b_bcount = MAX_SIZE; 154 minphys(bp); 155 } 156 157 /* 158 * Kill off all pending xfers for a periph. 159 * 160 * Must be called at splbio(). 161 */ 162 static void 163 wdc_atapi_kill_pending(struct scsipi_periph *periph) 164 { 165 struct atac_softc *atac = 166 (void *)periph->periph_channel->chan_adapter->adapt_dev; 167 struct ata_channel *chp = 168 atac->atac_channels[periph->periph_channel->chan_channel]; 169 170 ata_kill_pending(&chp->ch_drive[periph->periph_target]); 171 } 172 173 static void 174 wdc_atapi_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, int reason) 175 { 176 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 177 178 /* remove this command from xfer queue */ 179 switch (reason) { 180 case KILL_GONE: 181 sc_xfer->error = XS_DRIVER_STUFFUP; 182 break; 183 case KILL_RESET: 184 sc_xfer->error = XS_RESET; 185 break; 186 default: 187 printf("wdc_ata_bio_kill_xfer: unknown reason %d\n", 188 reason); 189 panic("wdc_ata_bio_kill_xfer"); 190 } 191 ata_free_xfer(chp, xfer); 192 scsipi_done(sc_xfer); 193 } 194 195 static int 196 wdc_atapi_get_params(struct scsipi_channel *chan, int drive, 197 struct ataparams *id) 198 { 199 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 200 struct atac_softc *atac = &wdc->sc_atac; 201 struct wdc_regs *wdr = &wdc->regs[chan->chan_channel]; 202 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 203 struct ata_command ata_c; 204 205 /* if no ATAPI device detected at wdc attach time, skip */ 206 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) { 207 ATADEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n", 208 drive), DEBUG_PROBE); 209 return -1; 210 } 211 212 memset(&ata_c, 0, sizeof(struct ata_command)); 213 ata_c.r_command = ATAPI_SOFT_RESET; 214 ata_c.r_st_bmask = 0; 215 ata_c.r_st_pmask = 0; 216 ata_c.flags = AT_WAIT | AT_POLL; 217 ata_c.timeout = WDC_RESET_WAIT; 218 if (wdc_exec_command(&chp->ch_drive[drive], &ata_c) != ATACMD_COMPLETE) { 219 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for" 220 " drive %s:%d:%d: driver failed\n", 221 atac->atac_dev.dv_xname, chp->ch_channel, drive); 222 panic("wdc_atapi_get_params"); 223 } 224 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 225 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET " 226 "failed for drive %s:%d:%d: error 0x%x\n", 227 atac->atac_dev.dv_xname, chp->ch_channel, drive, 228 ata_c.r_error), DEBUG_PROBE); 229 return -1; 230 } 231 chp->ch_drive[drive].state = 0; 232 233 (void)bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_status], 0); 234 235 /* Some ATAPI devices need a bit more time after software reset. */ 236 delay(5000); 237 if (ata_get_params(&chp->ch_drive[drive], AT_WAIT, id) != 0) { 238 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE " 239 "failed for drive %s:%d:%d: error 0x%x\n", 240 atac->atac_dev.dv_xname, chp->ch_channel, drive, 241 ata_c.r_error), DEBUG_PROBE); 242 return -1; 243 } 244 return 0; 245 } 246 247 static void 248 wdc_atapi_probe_device(struct atapibus_softc *sc, int target) 249 { 250 struct scsipi_channel *chan = sc->sc_channel; 251 struct scsipi_periph *periph; 252 struct ataparams ids; 253 struct ataparams *id = &ids; 254 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 255 struct atac_softc *atac = &wdc->sc_atac; 256 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 257 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 258 struct scsipibus_attach_args sa; 259 char serial_number[21], model[41], firmware_revision[9]; 260 int s; 261 262 /* skip if already attached */ 263 if (scsipi_lookup_periph(chan, target, 0) != NULL) 264 return; 265 266 if (wdc_atapi_get_params(chan, target, id) == 0) { 267 #ifdef ATAPI_DEBUG_PROBE 268 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 269 sc->sc_dev.dv_xname, target, 270 id->atap_config & ATAPI_CFG_CMD_MASK, 271 id->atap_config & ATAPI_CFG_DRQ_MASK); 272 #endif 273 periph = scsipi_alloc_periph(M_NOWAIT); 274 if (periph == NULL) { 275 printf("%s: unable to allocate periph for drive %d\n", 276 sc->sc_dev.dv_xname, target); 277 return; 278 } 279 periph->periph_dev = NULL; 280 periph->periph_channel = chan; 281 periph->periph_switch = &atapi_probe_periphsw; 282 periph->periph_target = target; 283 periph->periph_lun = 0; 284 periph->periph_quirks = PQUIRK_ONLYBIG; 285 286 #ifdef SCSIPI_DEBUG 287 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 288 SCSIPI_DEBUG_TARGET == target) 289 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 290 #endif 291 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 292 if (id->atap_config & ATAPI_CFG_REMOV) 293 periph->periph_flags |= PERIPH_REMOVABLE; 294 if (periph->periph_type == T_SEQUENTIAL) { 295 s = splbio(); 296 drvp->drive_flags |= DRIVE_ATAPIST; 297 splx(s); 298 } 299 300 sa.sa_periph = periph; 301 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 302 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 303 T_REMOV : T_FIXED; 304 scsipi_strvis((u_char *)model, 40, id->atap_model, 40); 305 scsipi_strvis((u_char *)serial_number, 20, id->atap_serial, 306 20); 307 scsipi_strvis((u_char *)firmware_revision, 8, 308 id->atap_revision, 8); 309 sa.sa_inqbuf.vendor = model; 310 sa.sa_inqbuf.product = serial_number; 311 sa.sa_inqbuf.revision = firmware_revision; 312 313 /* 314 * Determine the operating mode capabilities of the device. 315 */ 316 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16) 317 periph->periph_cap |= PERIPH_CAP_CMD16; 318 /* XXX This is gross. */ 319 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 320 321 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 322 323 if (drvp->drv_softc) 324 ata_probe_caps(drvp); 325 else { 326 s = splbio(); 327 drvp->drive_flags &= ~DRIVE_ATAPI; 328 splx(s); 329 } 330 } else { 331 s = splbio(); 332 drvp->drive_flags &= ~DRIVE_ATAPI; 333 splx(s); 334 } 335 } 336 337 static void 338 wdc_atapi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 339 void *arg) 340 { 341 struct scsipi_adapter *adapt = chan->chan_adapter; 342 struct scsipi_periph *periph; 343 struct scsipi_xfer *sc_xfer; 344 struct wdc_softc *wdc = (void *)adapt->adapt_dev; 345 struct atac_softc *atac = &wdc->sc_atac; 346 struct ata_xfer *xfer; 347 int channel = chan->chan_channel; 348 int drive, s; 349 350 switch (req) { 351 case ADAPTER_REQ_RUN_XFER: 352 sc_xfer = arg; 353 periph = sc_xfer->xs_periph; 354 drive = periph->periph_target; 355 356 ATADEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n", 357 atac->atac_dev.dv_xname, channel, drive), DEBUG_XFERS); 358 if (!device_is_active(&atac->atac_dev)) { 359 sc_xfer->error = XS_DRIVER_STUFFUP; 360 scsipi_done(sc_xfer); 361 return; 362 } 363 364 xfer = ata_get_xfer(ATAXF_NOSLEEP); 365 if (xfer == NULL) { 366 sc_xfer->error = XS_RESOURCE_SHORTAGE; 367 scsipi_done(sc_xfer); 368 return; 369 } 370 371 if (sc_xfer->xs_control & XS_CTL_POLL) 372 xfer->c_flags |= C_POLL; 373 #if NATA_DMA 374 if ((atac->atac_channels[channel]->ch_drive[drive].drive_flags & 375 (DRIVE_DMA | DRIVE_UDMA)) && sc_xfer->datalen > 0) 376 xfer->c_flags |= C_DMA; 377 #endif 378 #if NATA_DMA && NATA_PIOBM 379 else 380 #endif 381 #if NATA_PIOBM 382 if ((atac->atac_cap & ATAC_CAP_PIOBM) && 383 sc_xfer->datalen > 0) 384 xfer->c_flags |= C_PIOBM; 385 #endif 386 xfer->c_drive = drive; 387 xfer->c_flags |= C_ATAPI; 388 #if NATA_DMA 389 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY || 390 sc_xfer->cmd->opcode == GPCMD_SEND_KEY || 391 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) { 392 /* 393 * DVD authentication commands must always be done in 394 * PIO mode. 395 */ 396 xfer->c_flags &= ~C_DMA; 397 } 398 /* 399 * DMA can't deal with transfers which are not a multiple of 400 * 2 bytes. It's a bug to request such transfers for ATAPI 401 * but as the request can come from userland, we have to 402 * protect against it. 403 * Some devices can't cope with unaligned DMA xfers. These are 404 * normally only small structures since bulkdata is aligned. 405 * Also some devices seem to not handle DMA xfers of less than 406 * 4 bytes. 407 */ 408 if (((uintptr_t) sc_xfer->data) & 0x01) 409 xfer->c_flags &= ~C_DMA; 410 if (sc_xfer->datalen < 4 || (sc_xfer->datalen & 0x01)) 411 xfer->c_flags &= ~C_DMA; 412 #endif /* NATA_DMA */ 413 414 xfer->c_cmd = sc_xfer; 415 xfer->c_databuf = sc_xfer->data; 416 xfer->c_bcount = sc_xfer->datalen; 417 xfer->c_start = wdc_atapi_start; 418 xfer->c_intr = wdc_atapi_intr; 419 xfer->c_kill_xfer = wdc_atapi_kill_xfer; 420 xfer->c_dscpoll = 0; 421 s = splbio(); 422 ata_exec_xfer(atac->atac_channels[channel], xfer); 423 #ifdef DIAGNOSTIC 424 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 425 (sc_xfer->xs_status & XS_STS_DONE) == 0) 426 panic("wdc_atapi_scsipi_request: polled command " 427 "not done"); 428 #endif 429 splx(s); 430 return; 431 432 default: 433 /* Not supported, nothing to do. */ 434 ; 435 } 436 } 437 438 static void 439 wdc_atapi_start(struct ata_channel *chp, struct ata_xfer *xfer) 440 { 441 struct atac_softc *atac = chp->ch_atac; 442 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 443 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 444 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 445 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 446 int wait_flags = (sc_xfer->xs_control & XS_CTL_POLL) ? AT_POLL : 0; 447 const char *errstring; 448 449 ATADEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n", 450 atac->atac_dev.dv_xname, chp->ch_channel, drvp->drive, 451 sc_xfer->xs_control), DEBUG_XFERS); 452 #if NATA_DMA 453 if ((xfer->c_flags & C_DMA) && (drvp->n_xfers <= NXFER)) 454 drvp->n_xfers++; 455 #endif 456 /* Do control operations specially. */ 457 if (__predict_false(drvp->state < READY)) { 458 /* If it's not a polled command, we need the kernel thread */ 459 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0 && 460 (chp->ch_flags & ATACH_TH_RUN) == 0) { 461 chp->ch_queue->queue_freeze++; 462 wakeup(&chp->ch_thread); 463 return; 464 } 465 /* 466 * disable interrupts, all commands here should be quick 467 * enouth to be able to poll, and we don't go here that often 468 */ 469 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 470 WDCTL_4BIT | WDCTL_IDS); 471 if (wdc->select) 472 wdc->select(chp, xfer->c_drive); 473 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 474 WDSD_IBM | (xfer->c_drive << 4)); 475 /* Don't try to set mode if controller can't be adjusted */ 476 if (atac->atac_set_modes == NULL) 477 goto ready; 478 /* Also don't try if the drive didn't report its mode */ 479 if ((drvp->drive_flags & DRIVE_MODE) == 0) 480 goto ready; 481 errstring = "unbusy"; 482 if (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags)) 483 goto timeout; 484 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 485 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 486 errstring = "piomode"; 487 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 488 goto timeout; 489 if (chp->ch_status & WDCS_ERR) { 490 if (chp->ch_error == WDCE_ABRT) { 491 /* 492 * Some ATAPI drives reject PIO settings. 493 * Fall back to PIO mode 3 since that's the 494 * minimum for ATAPI. 495 */ 496 printf("%s:%d:%d: PIO mode %d rejected, " 497 "falling back to PIO mode 3\n", 498 atac->atac_dev.dv_xname, 499 chp->ch_channel, xfer->c_drive, 500 drvp->PIO_mode); 501 if (drvp->PIO_mode > 3) 502 drvp->PIO_mode = 3; 503 } else 504 goto error; 505 } 506 #if NATA_DMA 507 #if NATA_UDMA 508 if (drvp->drive_flags & DRIVE_UDMA) { 509 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 510 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 511 } else 512 #endif 513 if (drvp->drive_flags & DRIVE_DMA) { 514 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 515 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 516 } else { 517 goto ready; 518 } 519 errstring = "dmamode"; 520 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 521 goto timeout; 522 if (chp->ch_status & WDCS_ERR) { 523 if (chp->ch_error == WDCE_ABRT) { 524 #if NATA_UDMA 525 if (drvp->drive_flags & DRIVE_UDMA) 526 goto error; 527 else 528 #endif 529 { 530 /* 531 * The drive rejected our DMA setting. 532 * Fall back to mode 1. 533 */ 534 printf("%s:%d:%d: DMA mode %d rejected, " 535 "falling back to DMA mode 0\n", 536 atac->atac_dev.dv_xname, 537 chp->ch_channel, xfer->c_drive, 538 drvp->DMA_mode); 539 if (drvp->DMA_mode > 0) 540 drvp->DMA_mode = 0; 541 } 542 } else 543 goto error; 544 } 545 #endif /* NATA_DMA */ 546 ready: 547 drvp->state = READY; 548 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 549 WDCTL_4BIT); 550 delay(10); /* some drives need a little delay here */ 551 } 552 /* start timeout machinery */ 553 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 554 callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout), 555 wdctimeout, chp); 556 557 if (wdc->select) 558 wdc->select(chp, xfer->c_drive); 559 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 560 WDSD_IBM | (xfer->c_drive << 4)); 561 switch (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags) < 0) { 562 case WDCWAIT_OK: 563 break; 564 case WDCWAIT_TOUT: 565 printf("wdc_atapi_start: not ready, st = %02x\n", 566 chp->ch_status); 567 sc_xfer->error = XS_TIMEOUT; 568 wdc_atapi_reset(chp, xfer); 569 return; 570 case WDCWAIT_THR: 571 return; 572 } 573 574 /* 575 * Even with WDCS_ERR, the device should accept a command packet 576 * Limit length to what can be stuffed into the cylinder register 577 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536, 578 * but not all devices do that and it's not obvious from the 579 * ATAPI spec that that behaviour should be expected. If more 580 * data is necessary, multiple data transfer phases will be done. 581 */ 582 583 wdccommand(chp, xfer->c_drive, ATAPI_PKT_CMD, 584 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff, 585 0, 0, 0, 586 #if NATA_DMA 587 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 588 #endif 589 0 590 ); 591 592 #if NATA_PIOBM 593 if (xfer->c_flags & C_PIOBM) { 594 int error; 595 int dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 596 ? WDC_DMA_READ : 0; 597 if (xfer->c_flags & C_POLL) { 598 /* XXX not supported yet --- fall back to PIO */ 599 xfer->c_flags &= ~C_PIOBM; 600 } else { 601 /* Init the DMA channel. */ 602 error = (*wdc->dma_init)(wdc->dma_arg, 603 chp->ch_channel, xfer->c_drive, 604 (char *)xfer->c_databuf, 605 xfer->c_bcount, 606 dma_flags | WDC_DMA_PIOBM_ATAPI); 607 if (error) { 608 if (error == EINVAL) { 609 /* 610 * We can't do DMA on this transfer 611 * for some reason. Fall back to 612 * PIO. 613 */ 614 xfer->c_flags &= ~C_PIOBM; 615 error = 0; 616 } else { 617 sc_xfer->error = XS_DRIVER_STUFFUP; 618 errstring = "piobm"; 619 goto error; 620 } 621 } 622 } 623 } 624 #endif 625 /* 626 * If there is no interrupt for CMD input, busy-wait for it (done in 627 * the interrupt routine. If it is a polled command, call the interrupt 628 * routine until command is done. 629 */ 630 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) != 631 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) { 632 /* Wait for at last 400ns for status bit to be valid */ 633 DELAY(1); 634 wdc_atapi_intr(chp, xfer, 0); 635 } else { 636 chp->ch_flags |= ATACH_IRQ_WAIT; 637 } 638 if (sc_xfer->xs_control & XS_CTL_POLL) { 639 #if NATA_DMA 640 if (chp->ch_flags & ATACH_DMA_WAIT) { 641 wdc_dmawait(chp, xfer, sc_xfer->timeout); 642 chp->ch_flags &= ~ATACH_DMA_WAIT; 643 } 644 #endif 645 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 646 /* Wait for at last 400ns for status bit to be valid */ 647 DELAY(1); 648 wdc_atapi_intr(chp, xfer, 0); 649 } 650 } 651 return; 652 timeout: 653 printf("%s:%d:%d: %s timed out\n", 654 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 655 errstring); 656 sc_xfer->error = XS_TIMEOUT; 657 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 658 delay(10); /* some drives need a little delay here */ 659 wdc_atapi_reset(chp, xfer); 660 return; 661 error: 662 printf("%s:%d:%d: %s ", 663 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 664 errstring); 665 printf("error (0x%x)\n", chp->ch_error); 666 sc_xfer->error = XS_SHORTSENSE; 667 sc_xfer->sense.atapi_sense = chp->ch_error; 668 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 669 delay(10); /* some drives need a little delay here */ 670 wdc_atapi_reset(chp, xfer); 671 return; 672 } 673 674 static int 675 wdc_atapi_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq) 676 { 677 struct atac_softc *atac = chp->ch_atac; 678 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 679 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 680 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 681 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 682 int len, phase, i, retries=0; 683 int ire; 684 #if NATA_DMA 685 int error; 686 #endif 687 #if NATA_DMA || NATA_PIOBM 688 int dma_flags = 0; 689 #endif 690 void *cmd; 691 692 ATADEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n", 693 atac->atac_dev.dv_xname, chp->ch_channel, drvp->drive), 694 DEBUG_INTR); 695 696 /* Is it not a transfer, but a control operation? */ 697 if (drvp->state < READY) { 698 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n", 699 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 700 drvp->state); 701 panic("wdc_atapi_intr: bad state"); 702 } 703 /* 704 * If we missed an interrupt in a PIO transfer, reset and restart. 705 * Don't try to continue transfer, we may have missed cycles. 706 */ 707 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 708 sc_xfer->error = XS_TIMEOUT; 709 wdc_atapi_reset(chp, xfer); 710 return 1; 711 } 712 713 #if NATA_PIOBM 714 /* Transfer-done interrupt for busmastering PIO operation */ 715 if ((xfer->c_flags & C_PIOBM) && (chp->ch_flags & ATACH_PIOBM_WAIT)) { 716 chp->ch_flags &= ~ATACH_PIOBM_WAIT; 717 718 /* restore transfer length */ 719 len = xfer->c_bcount; 720 if (xfer->c_lenoff < 0) 721 len += xfer->c_lenoff; 722 723 if (sc_xfer->xs_control & XS_CTL_DATA_IN) 724 goto end_piobm_datain; 725 else 726 goto end_piobm_dataout; 727 } 728 #endif 729 730 /* Ack interrupt done in wdc_wait_for_unbusy */ 731 if (wdc->select) 732 wdc->select(chp, xfer->c_drive); 733 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 734 WDSD_IBM | (xfer->c_drive << 4)); 735 if (wdc_wait_for_unbusy(chp, 736 (irq == 0) ? sc_xfer->timeout : 0, AT_POLL) == WDCWAIT_TOUT) { 737 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 738 return 0; /* IRQ was not for us */ 739 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n", 740 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 741 xfer->c_bcount, xfer->c_skip); 742 #if NATA_DMA 743 if (xfer->c_flags & C_DMA) { 744 ata_dmaerr(drvp, 745 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 746 } 747 #endif 748 sc_xfer->error = XS_TIMEOUT; 749 wdc_atapi_reset(chp, xfer); 750 return 1; 751 } 752 if (wdc->irqack) 753 wdc->irqack(chp); 754 755 #if NATA_DMA 756 /* 757 * If we missed an IRQ and were using DMA, flag it as a DMA error 758 * and reset device. 759 */ 760 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) { 761 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 762 sc_xfer->error = XS_RESET; 763 wdc_atapi_reset(chp, xfer); 764 return (1); 765 } 766 #endif 767 /* 768 * if the request sense command was aborted, report the short sense 769 * previously recorded, else continue normal processing 770 */ 771 772 #if NATA_DMA || NATA_PIOBM 773 if (xfer->c_flags & (C_DMA | C_PIOBM)) 774 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 775 ? WDC_DMA_READ : 0; 776 #endif 777 again: 778 len = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_lo], 0) + 779 256 * bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_hi], 0); 780 ire = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_ireason], 0); 781 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ); 782 ATADEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x " 783 "ire 0x%x :", xfer->c_bcount, 784 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR); 785 786 switch (phase) { 787 case PHASE_CMDOUT: 788 cmd = sc_xfer->cmd; 789 ATADEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR); 790 #if NATA_DMA 791 /* Init the DMA channel if necessary */ 792 if (xfer->c_flags & C_DMA) { 793 error = (*wdc->dma_init)(wdc->dma_arg, 794 chp->ch_channel, xfer->c_drive, 795 xfer->c_databuf, xfer->c_bcount, dma_flags); 796 if (error) { 797 if (error == EINVAL) { 798 /* 799 * We can't do DMA on this transfer 800 * for some reason. Fall back to 801 * PIO. 802 */ 803 xfer->c_flags &= ~C_DMA; 804 error = 0; 805 } else { 806 sc_xfer->error = XS_DRIVER_STUFFUP; 807 break; 808 } 809 } 810 } 811 #endif 812 813 /* send packet command */ 814 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */ 815 wdc->dataout_pio(chp, drvp->drive_flags, cmd, sc_xfer->cmdlen); 816 817 #if NATA_DMA 818 /* Start the DMA channel if necessary */ 819 if (xfer->c_flags & C_DMA) { 820 (*wdc->dma_start)(wdc->dma_arg, 821 chp->ch_channel, xfer->c_drive); 822 chp->ch_flags |= ATACH_DMA_WAIT; 823 } 824 #endif 825 826 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 827 chp->ch_flags |= ATACH_IRQ_WAIT; 828 } 829 return 1; 830 831 case PHASE_DATAOUT: 832 /* write data */ 833 ATADEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR); 834 #if NATA_DMA 835 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 || 836 (xfer->c_flags & C_DMA) != 0) { 837 printf("wdc_atapi_intr: bad data phase DATAOUT\n"); 838 if (xfer->c_flags & C_DMA) { 839 ata_dmaerr(drvp, 840 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 841 } 842 sc_xfer->error = XS_TIMEOUT; 843 wdc_atapi_reset(chp, xfer); 844 return 1; 845 } 846 #endif 847 xfer->c_lenoff = len - xfer->c_bcount; 848 if (xfer->c_bcount < len) { 849 printf("wdc_atapi_intr: warning: write only " 850 "%d of %d requested bytes\n", xfer->c_bcount, len); 851 len = xfer->c_bcount; 852 } 853 854 #if NATA_PIOBM 855 if (xfer->c_flags & C_PIOBM) { 856 /* start the busmastering PIO */ 857 (*wdc->piobm_start)(wdc->dma_arg, 858 chp->ch_channel, xfer->c_drive, 859 xfer->c_skip, len, WDC_PIOBM_XFER_IRQ); 860 chp->ch_flags |= ATACH_DMA_WAIT | ATACH_IRQ_WAIT | 861 ATACH_PIOBM_WAIT; 862 return 1; 863 } 864 #endif 865 wdc->dataout_pio(chp, drvp->drive_flags, 866 (char *)xfer->c_databuf + xfer->c_skip, len); 867 868 #if NATA_PIOBM 869 end_piobm_dataout: 870 #endif 871 for (i = xfer->c_lenoff; i > 0; i -= 2) 872 bus_space_write_2(wdr->cmd_iot, 873 wdr->cmd_iohs[wd_data], 0, 0); 874 875 xfer->c_skip += len; 876 xfer->c_bcount -= len; 877 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 878 chp->ch_flags |= ATACH_IRQ_WAIT; 879 } 880 return 1; 881 882 case PHASE_DATAIN: 883 /* Read data */ 884 ATADEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR); 885 #if NATA_DMA 886 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 || 887 (xfer->c_flags & C_DMA) != 0) { 888 printf("wdc_atapi_intr: bad data phase DATAIN\n"); 889 if (xfer->c_flags & C_DMA) { 890 ata_dmaerr(drvp, 891 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 892 } 893 sc_xfer->error = XS_TIMEOUT; 894 wdc_atapi_reset(chp, xfer); 895 return 1; 896 } 897 #endif 898 xfer->c_lenoff = len - xfer->c_bcount; 899 if (xfer->c_bcount < len) { 900 printf("wdc_atapi_intr: warning: reading only " 901 "%d of %d bytes\n", xfer->c_bcount, len); 902 len = xfer->c_bcount; 903 } 904 905 #if NATA_PIOBM 906 if (xfer->c_flags & C_PIOBM) { 907 /* start the busmastering PIO */ 908 (*wdc->piobm_start)(wdc->dma_arg, 909 chp->ch_channel, xfer->c_drive, 910 xfer->c_skip, len, WDC_PIOBM_XFER_IRQ); 911 chp->ch_flags |= ATACH_DMA_WAIT | ATACH_IRQ_WAIT | 912 ATACH_PIOBM_WAIT; 913 return 1; 914 } 915 #endif 916 wdc->datain_pio(chp, drvp->drive_flags, 917 (char *)xfer->c_databuf + xfer->c_skip, len); 918 919 #if NATA_PIOBM 920 end_piobm_datain: 921 #endif 922 if (xfer->c_lenoff > 0) 923 wdcbit_bucket(chp, len - xfer->c_bcount); 924 925 xfer->c_skip += len; 926 xfer->c_bcount -= len; 927 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 928 chp->ch_flags |= ATACH_IRQ_WAIT; 929 } 930 return 1; 931 932 case PHASE_ABORTED: 933 case PHASE_COMPLETED: 934 ATADEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR); 935 #if NATA_DMA 936 if (xfer->c_flags & C_DMA) { 937 xfer->c_bcount -= sc_xfer->datalen; 938 } 939 #endif 940 sc_xfer->resid = xfer->c_bcount; 941 wdc_atapi_phase_complete(xfer); 942 return(1); 943 944 default: 945 if (++retries<500) { 946 DELAY(100); 947 chp->ch_status = bus_space_read_1(wdr->cmd_iot, 948 wdr->cmd_iohs[wd_status], 0); 949 chp->ch_error = bus_space_read_1(wdr->cmd_iot, 950 wdr->cmd_iohs[wd_error], 0); 951 goto again; 952 } 953 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase); 954 if (chp->ch_status & WDCS_ERR) { 955 sc_xfer->error = XS_SHORTSENSE; 956 sc_xfer->sense.atapi_sense = chp->ch_error; 957 } else { 958 #if NATA_DMA 959 if (xfer->c_flags & C_DMA) { 960 ata_dmaerr(drvp, 961 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 962 } 963 #endif 964 sc_xfer->error = XS_RESET; 965 wdc_atapi_reset(chp, xfer); 966 return (1); 967 } 968 } 969 ATADEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x " 970 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense), 971 DEBUG_INTR); 972 wdc_atapi_done(chp, xfer); 973 return (1); 974 } 975 976 static void 977 wdc_atapi_phase_complete(struct ata_xfer *xfer) 978 { 979 struct ata_channel *chp = xfer->c_chp; 980 struct atac_softc *atac = chp->ch_atac; 981 #if NATA_DMA || NATA_PIOBM 982 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 983 #endif 984 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 985 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 986 987 /* wait for DSC if needed */ 988 if (drvp->drive_flags & DRIVE_ATAPIST) { 989 ATADEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) " 990 "polldsc %d\n", atac->atac_dev.dv_xname, chp->ch_channel, 991 xfer->c_drive, xfer->c_dscpoll), DEBUG_XFERS); 992 #if 1 993 if (cold) 994 panic("wdc_atapi_phase_complete: cold"); 995 #endif 996 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10, 997 AT_POLL) == WDCWAIT_TOUT) { 998 /* 10ms not enough, try again in 1 tick */ 999 if (xfer->c_dscpoll++ > 1000 mstohz(sc_xfer->timeout)) { 1001 printf("%s:%d:%d: wait_for_dsc " 1002 "failed\n", 1003 atac->atac_dev.dv_xname, 1004 chp->ch_channel, xfer->c_drive); 1005 sc_xfer->error = XS_TIMEOUT; 1006 wdc_atapi_reset(chp, xfer); 1007 return; 1008 } else 1009 callout_reset(&chp->ch_callout, 1, 1010 wdc_atapi_polldsc, xfer); 1011 return; 1012 } 1013 } 1014 1015 /* 1016 * Some drive occasionally set WDCS_ERR with 1017 * "ATA illegal length indication" in the error 1018 * register. If we read some data the sense is valid 1019 * anyway, so don't report the error. 1020 */ 1021 if (chp->ch_status & WDCS_ERR && 1022 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 1023 sc_xfer->resid == sc_xfer->datalen)) { 1024 /* save the short sense */ 1025 sc_xfer->error = XS_SHORTSENSE; 1026 sc_xfer->sense.atapi_sense = chp->ch_error; 1027 if ((sc_xfer->xs_periph->periph_quirks & 1028 PQUIRK_NOSENSE) == 0) { 1029 /* ask scsipi to send a REQUEST_SENSE */ 1030 sc_xfer->error = XS_BUSY; 1031 sc_xfer->status = SCSI_CHECK; 1032 } 1033 #if NATA_DMA || NATA_PIOBM 1034 else if (wdc->dma_status & 1035 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) { 1036 #if NATA_DMA 1037 ata_dmaerr(drvp, 1038 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 1039 #endif 1040 sc_xfer->error = XS_RESET; 1041 wdc_atapi_reset(chp, xfer); 1042 return; 1043 } 1044 #endif 1045 } 1046 if (xfer->c_bcount != 0) { 1047 ATADEBUG_PRINT(("wdc_atapi_intr: bcount value is " 1048 "%d after io\n", xfer->c_bcount), DEBUG_XFERS); 1049 } 1050 #ifdef DIAGNOSTIC 1051 if (xfer->c_bcount < 0) { 1052 printf("wdc_atapi_intr warning: bcount value " 1053 "is %d after io\n", xfer->c_bcount); 1054 } 1055 #endif 1056 ATADEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), " 1057 "error 0x%x sense 0x%x\n", sc_xfer->error, 1058 sc_xfer->sense.atapi_sense), DEBUG_INTR); 1059 wdc_atapi_done(chp, xfer); 1060 } 1061 1062 static void 1063 wdc_atapi_done(struct ata_channel *chp, struct ata_xfer *xfer) 1064 { 1065 struct atac_softc *atac = chp->ch_atac; 1066 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1067 int drive = xfer->c_drive; 1068 1069 ATADEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n", 1070 atac->atac_dev.dv_xname, chp->ch_channel, xfer->c_drive, 1071 (u_int)xfer->c_flags), DEBUG_XFERS); 1072 callout_stop(&chp->ch_callout); 1073 /* mark controller inactive and free the command */ 1074 chp->ch_queue->active_xfer = NULL; 1075 ata_free_xfer(chp, xfer); 1076 1077 if (chp->ch_drive[drive].drive_flags & DRIVE_WAITDRAIN) { 1078 sc_xfer->error = XS_DRIVER_STUFFUP; 1079 chp->ch_drive[drive].drive_flags &= ~DRIVE_WAITDRAIN; 1080 wakeup(&chp->ch_queue->active_xfer); 1081 } 1082 1083 ATADEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS); 1084 scsipi_done(sc_xfer); 1085 ATADEBUG_PRINT(("atastart from wdc_atapi_done, flags 0x%x\n", 1086 chp->ch_flags), DEBUG_XFERS); 1087 atastart(chp); 1088 } 1089 1090 static void 1091 wdc_atapi_reset(struct ata_channel *chp, struct ata_xfer *xfer) 1092 { 1093 struct atac_softc *atac = chp->ch_atac; 1094 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 1095 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1096 1097 wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET); 1098 drvp->state = 0; 1099 if (wdc_wait_for_unbusy(chp, WDC_RESET_WAIT, AT_POLL) != 0) { 1100 printf("%s:%d:%d: reset failed\n", 1101 atac->atac_dev.dv_xname, chp->ch_channel, 1102 xfer->c_drive); 1103 sc_xfer->error = XS_SELTIMEOUT; 1104 } 1105 wdc_atapi_done(chp, xfer); 1106 return; 1107 } 1108 1109 static void 1110 wdc_atapi_polldsc(void *arg) 1111 { 1112 1113 wdc_atapi_phase_complete(arg); 1114 } 1115
Indexes created Thu Sep 25 15:09:46 GMT 2025