atapi_wdc.c revision 1.112
1 /* $NetBSD: atapi_wdc.c,v 1.112 2011/05/24 16:35:26 joerg Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.112 2011/05/24 16:35:26 joerg Exp $"); 29 30 #ifndef ATADEBUG 31 #define ATADEBUG 32 #endif /* ATADEBUG */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/file.h> 38 #include <sys/stat.h> 39 #include <sys/buf.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <sys/syslog.h> 43 #include <sys/proc.h> 44 #include <sys/dvdio.h> 45 46 #include <sys/intr.h> 47 #include <sys/bus.h> 48 49 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 50 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 51 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 52 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 53 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 54 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 55 56 #include <dev/ata/ataconf.h> 57 #include <dev/ata/atareg.h> 58 #include <dev/ata/atavar.h> 59 #include <dev/ic/wdcreg.h> 60 #include <dev/ic/wdcvar.h> 61 62 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 63 64 #define DEBUG_INTR 0x01 65 #define DEBUG_XFERS 0x02 66 #define DEBUG_STATUS 0x04 67 #define DEBUG_FUNCS 0x08 68 #define DEBUG_PROBE 0x10 69 #ifdef ATADEBUG 70 int wdcdebug_atapi_mask = 0; 71 #define ATADEBUG_PRINT(args, level) \ 72 if (wdcdebug_atapi_mask & (level)) \ 73 printf args 74 #else 75 #define ATADEBUG_PRINT(args, level) 76 #endif 77 78 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */ 79 #define ATAPI_MODE_DELAY 1000 /* 1s, timeout for SET_FEATYRE cmds */ 80 81 static int wdc_atapi_get_params(struct scsipi_channel *, int, 82 struct ataparams *); 83 static void wdc_atapi_probe_device(struct atapibus_softc *, int); 84 static void wdc_atapi_minphys (struct buf *bp); 85 static void wdc_atapi_start(struct ata_channel *,struct ata_xfer *); 86 static int wdc_atapi_intr(struct ata_channel *, struct ata_xfer *, int); 87 static void wdc_atapi_kill_xfer(struct ata_channel *, 88 struct ata_xfer *, int); 89 static void wdc_atapi_phase_complete(struct ata_xfer *); 90 static void wdc_atapi_done(struct ata_channel *, struct ata_xfer *); 91 static void wdc_atapi_reset(struct ata_channel *, struct ata_xfer *); 92 static void wdc_atapi_scsipi_request(struct scsipi_channel *, 93 scsipi_adapter_req_t, void *); 94 static void wdc_atapi_kill_pending(struct scsipi_periph *); 95 static void wdc_atapi_polldsc(void *arg); 96 97 #define MAX_SIZE MAXPHYS 98 99 static const struct scsipi_bustype wdc_atapi_bustype = { 100 SCSIPI_BUSTYPE_ATAPI, 101 atapi_scsipi_cmd, 102 atapi_interpret_sense, 103 atapi_print_addr, 104 wdc_atapi_kill_pending, 105 }; 106 107 void 108 wdc_atapibus_attach(struct atabus_softc *ata_sc) 109 { 110 struct ata_channel *chp = ata_sc->sc_chan; 111 struct atac_softc *atac = chp->ch_atac; 112 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 113 struct scsipi_channel *chan = &chp->ch_atapi_channel; 114 115 /* 116 * Fill in the scsipi_adapter. 117 */ 118 adapt->adapt_dev = atac->atac_dev; 119 adapt->adapt_nchannels = atac->atac_nchannels; 120 adapt->adapt_request = wdc_atapi_scsipi_request; 121 adapt->adapt_minphys = wdc_atapi_minphys; 122 if (atac->atac_cap & ATAC_CAP_NOIRQ) 123 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY; 124 atac->atac_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device; 125 126 /* 127 * Fill in the scsipi_channel. 128 */ 129 memset(chan, 0, sizeof(*chan)); 130 chan->chan_adapter = adapt; 131 chan->chan_bustype = &wdc_atapi_bustype; 132 chan->chan_channel = chp->ch_channel; 133 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 134 chan->chan_openings = 1; 135 chan->chan_max_periph = 1; 136 chan->chan_ntargets = 2; 137 chan->chan_nluns = 1; 138 139 chp->atapibus = config_found_ia(ata_sc->sc_dev, "atapi", chan, 140 atapiprint); 141 } 142 143 static void 144 wdc_atapi_minphys(struct buf *bp) 145 { 146 147 if (bp->b_bcount > MAX_SIZE) 148 bp->b_bcount = MAX_SIZE; 149 minphys(bp); 150 } 151 152 /* 153 * Kill off all pending xfers for a periph. 154 * 155 * Must be called at splbio(). 156 */ 157 static void 158 wdc_atapi_kill_pending(struct scsipi_periph *periph) 159 { 160 struct atac_softc *atac = 161 device_private(periph->periph_channel->chan_adapter->adapt_dev); 162 struct ata_channel *chp = 163 atac->atac_channels[periph->periph_channel->chan_channel]; 164 165 ata_kill_pending(&chp->ch_drive[periph->periph_target]); 166 } 167 168 static void 169 wdc_atapi_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, int reason) 170 { 171 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 172 173 /* remove this command from xfer queue */ 174 switch (reason) { 175 case KILL_GONE: 176 sc_xfer->error = XS_DRIVER_STUFFUP; 177 break; 178 case KILL_RESET: 179 sc_xfer->error = XS_RESET; 180 break; 181 default: 182 printf("wdc_ata_bio_kill_xfer: unknown reason %d\n", 183 reason); 184 panic("wdc_ata_bio_kill_xfer"); 185 } 186 ata_free_xfer(chp, xfer); 187 scsipi_done(sc_xfer); 188 } 189 190 static int 191 wdc_atapi_get_params(struct scsipi_channel *chan, int drive, 192 struct ataparams *id) 193 { 194 struct wdc_softc *wdc = device_private(chan->chan_adapter->adapt_dev); 195 struct atac_softc *atac = &wdc->sc_atac; 196 struct wdc_regs *wdr = &wdc->regs[chan->chan_channel]; 197 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 198 struct ata_command ata_c; 199 200 /* if no ATAPI device detected at wdc attach time, skip */ 201 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) { 202 ATADEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n", 203 drive), DEBUG_PROBE); 204 return -1; 205 } 206 207 memset(&ata_c, 0, sizeof(struct ata_command)); 208 ata_c.r_command = ATAPI_SOFT_RESET; 209 ata_c.r_st_bmask = 0; 210 ata_c.r_st_pmask = 0; 211 ata_c.flags = AT_WAIT | AT_POLL; 212 ata_c.timeout = WDC_RESET_WAIT; 213 if (wdc_exec_command(&chp->ch_drive[drive], &ata_c) != ATACMD_COMPLETE) { 214 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for" 215 " drive %s:%d:%d: driver failed\n", 216 device_xname(atac->atac_dev), chp->ch_channel, drive); 217 panic("wdc_atapi_get_params"); 218 } 219 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 220 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET " 221 "failed for drive %s:%d:%d: error 0x%x\n", 222 device_xname(atac->atac_dev), chp->ch_channel, drive, 223 ata_c.r_error), DEBUG_PROBE); 224 return -1; 225 } 226 chp->ch_drive[drive].state = 0; 227 228 (void)bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_status], 0); 229 230 /* Some ATAPI devices need a bit more time after software reset. */ 231 delay(5000); 232 if (ata_get_params(&chp->ch_drive[drive], AT_WAIT, id) != 0) { 233 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE " 234 "failed for drive %s:%d:%d: error 0x%x\n", 235 device_xname(atac->atac_dev), chp->ch_channel, drive, 236 ata_c.r_error), DEBUG_PROBE); 237 return -1; 238 } 239 return 0; 240 } 241 242 static void 243 wdc_atapi_probe_device(struct atapibus_softc *sc, int target) 244 { 245 struct scsipi_channel *chan = sc->sc_channel; 246 struct scsipi_periph *periph; 247 struct ataparams ids; 248 struct ataparams *id = &ids; 249 struct wdc_softc *wdc = device_private(chan->chan_adapter->adapt_dev); 250 struct atac_softc *atac = &wdc->sc_atac; 251 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 252 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 253 struct scsipibus_attach_args sa; 254 char serial_number[21], model[41], firmware_revision[9]; 255 int s; 256 257 /* skip if already attached */ 258 if (scsipi_lookup_periph(chan, target, 0) != NULL) 259 return; 260 261 if (wdc_atapi_get_params(chan, target, id) == 0) { 262 #ifdef ATAPI_DEBUG_PROBE 263 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 264 device_xname(sc->sc_dev), target, 265 id->atap_config & ATAPI_CFG_CMD_MASK, 266 id->atap_config & ATAPI_CFG_DRQ_MASK); 267 #endif 268 periph = scsipi_alloc_periph(M_NOWAIT); 269 if (periph == NULL) { 270 aprint_error_dev(sc->sc_dev, 271 "unable to allocate periph for drive %d\n", 272 target); 273 return; 274 } 275 periph->periph_dev = NULL; 276 periph->periph_channel = chan; 277 periph->periph_switch = &atapi_probe_periphsw; 278 periph->periph_target = target; 279 periph->periph_lun = 0; 280 periph->periph_quirks = PQUIRK_ONLYBIG; 281 282 #ifdef SCSIPI_DEBUG 283 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 284 SCSIPI_DEBUG_TARGET == target) 285 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 286 #endif 287 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 288 if (id->atap_config & ATAPI_CFG_REMOV) 289 periph->periph_flags |= PERIPH_REMOVABLE; 290 if (periph->periph_type == T_SEQUENTIAL) { 291 s = splbio(); 292 drvp->drive_flags |= DRIVE_ATAPIST; 293 splx(s); 294 } 295 296 sa.sa_periph = periph; 297 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 298 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 299 T_REMOV : T_FIXED; 300 scsipi_strvis((u_char *)model, 40, id->atap_model, 40); 301 scsipi_strvis((u_char *)serial_number, 20, id->atap_serial, 302 20); 303 scsipi_strvis((u_char *)firmware_revision, 8, 304 id->atap_revision, 8); 305 sa.sa_inqbuf.vendor = model; 306 sa.sa_inqbuf.product = serial_number; 307 sa.sa_inqbuf.revision = firmware_revision; 308 309 /* 310 * Determine the operating mode capabilities of the device. 311 */ 312 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16) 313 periph->periph_cap |= PERIPH_CAP_CMD16; 314 /* XXX This is gross. */ 315 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 316 317 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 318 319 if (drvp->drv_softc) 320 ata_probe_caps(drvp); 321 else { 322 s = splbio(); 323 drvp->drive_flags &= ~DRIVE_ATAPI; 324 splx(s); 325 } 326 } else { 327 s = splbio(); 328 drvp->drive_flags &= ~DRIVE_ATAPI; 329 splx(s); 330 } 331 } 332 333 static void 334 wdc_atapi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 335 void *arg) 336 { 337 struct scsipi_adapter *adapt = chan->chan_adapter; 338 struct scsipi_periph *periph; 339 struct scsipi_xfer *sc_xfer; 340 struct wdc_softc *wdc = device_private(adapt->adapt_dev); 341 struct atac_softc *atac = &wdc->sc_atac; 342 struct ata_xfer *xfer; 343 int channel = chan->chan_channel; 344 int drive, s; 345 346 switch (req) { 347 case ADAPTER_REQ_RUN_XFER: 348 sc_xfer = arg; 349 periph = sc_xfer->xs_periph; 350 drive = periph->periph_target; 351 352 ATADEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n", 353 device_xname(atac->atac_dev), channel, drive), 354 DEBUG_XFERS); 355 if (!device_is_active(atac->atac_dev)) { 356 sc_xfer->error = XS_DRIVER_STUFFUP; 357 scsipi_done(sc_xfer); 358 return; 359 } 360 361 xfer = ata_get_xfer(ATAXF_NOSLEEP); 362 if (xfer == NULL) { 363 sc_xfer->error = XS_RESOURCE_SHORTAGE; 364 scsipi_done(sc_xfer); 365 return; 366 } 367 368 if (sc_xfer->xs_control & XS_CTL_POLL) 369 xfer->c_flags |= C_POLL; 370 #if NATA_DMA 371 if ((atac->atac_channels[channel]->ch_drive[drive].drive_flags & 372 (DRIVE_DMA | DRIVE_UDMA)) && sc_xfer->datalen > 0) 373 xfer->c_flags |= C_DMA; 374 #endif 375 #if NATA_DMA && NATA_PIOBM 376 else 377 #endif 378 #if NATA_PIOBM 379 if ((atac->atac_cap & ATAC_CAP_PIOBM) && 380 sc_xfer->datalen > 0) 381 xfer->c_flags |= C_PIOBM; 382 #endif 383 xfer->c_drive = drive; 384 xfer->c_flags |= C_ATAPI; 385 #if NATA_DMA 386 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY || 387 sc_xfer->cmd->opcode == GPCMD_SEND_KEY || 388 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) { 389 /* 390 * DVD authentication commands must always be done in 391 * PIO mode. 392 */ 393 xfer->c_flags &= ~C_DMA; 394 } 395 396 /* 397 * DMA normally can't deal with transfers which are not a 398 * multiple of its databus width. It's a bug to request odd 399 * length transfers for ATAPI. 400 * 401 * Some devices also can't cope with unaligned DMA xfers 402 * either. Also some devices seem to not handle DMA xfers of 403 * less than 4 bytes. 404 * 405 * By enforcing at least 4 byte aligned offset and length for 406 * DMA, we might use PIO where DMA could be allowed but better 407 * safe than sorry as recent problems proved. 408 * 409 * Offending structures that are thus done by PIO instead of 410 * DMA are normally small structures since all bulkdata is 411 * aligned. But as the request may come from userland, we have 412 * to protect against it anyway. 413 * 414 * XXX check for the 32 bit wide flag? 415 */ 416 417 if (((uintptr_t) sc_xfer->data) & 0x03) 418 xfer->c_flags &= ~C_DMA; 419 if ((sc_xfer->datalen < 4) || (sc_xfer->datalen & 0x03)) 420 xfer->c_flags &= ~C_DMA; 421 #endif /* NATA_DMA */ 422 423 xfer->c_cmd = sc_xfer; 424 xfer->c_databuf = sc_xfer->data; 425 xfer->c_bcount = sc_xfer->datalen; 426 xfer->c_start = wdc_atapi_start; 427 xfer->c_intr = wdc_atapi_intr; 428 xfer->c_kill_xfer = wdc_atapi_kill_xfer; 429 xfer->c_dscpoll = 0; 430 s = splbio(); 431 ata_exec_xfer(atac->atac_channels[channel], xfer); 432 #ifdef DIAGNOSTIC 433 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 434 (sc_xfer->xs_status & XS_STS_DONE) == 0) 435 panic("wdc_atapi_scsipi_request: polled command " 436 "not done"); 437 #endif 438 splx(s); 439 return; 440 441 default: 442 /* Not supported, nothing to do. */ 443 ; 444 } 445 } 446 447 static void 448 wdc_atapi_start(struct ata_channel *chp, struct ata_xfer *xfer) 449 { 450 struct atac_softc *atac = chp->ch_atac; 451 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 452 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 453 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 454 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 455 int wait_flags = (sc_xfer->xs_control & XS_CTL_POLL) ? AT_POLL : 0; 456 const char *errstring; 457 458 ATADEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n", 459 device_xname(atac->atac_dev), chp->ch_channel, drvp->drive, 460 sc_xfer->xs_control), DEBUG_XFERS); 461 #if NATA_DMA 462 if ((xfer->c_flags & C_DMA) && (drvp->n_xfers <= NXFER)) 463 drvp->n_xfers++; 464 #endif 465 /* Do control operations specially. */ 466 if (__predict_false(drvp->state < READY)) { 467 /* If it's not a polled command, we need the kernel thread */ 468 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0 && 469 (chp->ch_flags & ATACH_TH_RUN) == 0) { 470 chp->ch_queue->queue_freeze++; 471 wakeup(&chp->ch_thread); 472 return; 473 } 474 /* 475 * disable interrupts, all commands here should be quick 476 * enough to be able to poll, and we don't go here that often 477 */ 478 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 479 WDCTL_4BIT | WDCTL_IDS); 480 if (wdc->select) 481 wdc->select(chp, xfer->c_drive); 482 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 483 WDSD_IBM | (xfer->c_drive << 4)); 484 /* Don't try to set mode if controller can't be adjusted */ 485 if (atac->atac_set_modes == NULL) 486 goto ready; 487 /* Also don't try if the drive didn't report its mode */ 488 if ((drvp->drive_flags & DRIVE_MODE) == 0) 489 goto ready; 490 errstring = "unbusy"; 491 if (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags)) 492 goto timeout; 493 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 494 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 495 errstring = "piomode"; 496 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 497 goto timeout; 498 if (chp->ch_status & WDCS_ERR) { 499 if (chp->ch_error == WDCE_ABRT) { 500 /* 501 * Some ATAPI drives reject PIO settings. 502 * Fall back to PIO mode 3 since that's the 503 * minimum for ATAPI. 504 */ 505 printf("%s:%d:%d: PIO mode %d rejected, " 506 "falling back to PIO mode 3\n", 507 device_xname(atac->atac_dev), 508 chp->ch_channel, xfer->c_drive, 509 drvp->PIO_mode); 510 if (drvp->PIO_mode > 3) 511 drvp->PIO_mode = 3; 512 } else 513 goto error; 514 } 515 #if NATA_DMA 516 #if NATA_UDMA 517 if (drvp->drive_flags & DRIVE_UDMA) { 518 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 519 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 520 } else 521 #endif 522 if (drvp->drive_flags & DRIVE_DMA) { 523 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 524 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 525 } else { 526 goto ready; 527 } 528 errstring = "dmamode"; 529 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 530 goto timeout; 531 if (chp->ch_status & WDCS_ERR) { 532 if (chp->ch_error == WDCE_ABRT) { 533 #if NATA_UDMA 534 if (drvp->drive_flags & DRIVE_UDMA) 535 goto error; 536 else 537 #endif 538 { 539 /* 540 * The drive rejected our DMA setting. 541 * Fall back to mode 1. 542 */ 543 printf("%s:%d:%d: DMA mode %d rejected, " 544 "falling back to DMA mode 0\n", 545 device_xname(atac->atac_dev), 546 chp->ch_channel, xfer->c_drive, 547 drvp->DMA_mode); 548 if (drvp->DMA_mode > 0) 549 drvp->DMA_mode = 0; 550 } 551 } else 552 goto error; 553 } 554 #endif /* NATA_DMA */ 555 ready: 556 drvp->state = READY; 557 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 558 WDCTL_4BIT); 559 delay(10); /* some drives need a little delay here */ 560 } 561 /* start timeout machinery */ 562 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 563 callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout), 564 wdctimeout, chp); 565 566 if (wdc->select) 567 wdc->select(chp, xfer->c_drive); 568 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 569 WDSD_IBM | (xfer->c_drive << 4)); 570 switch (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags)) { 571 case WDCWAIT_OK: 572 break; 573 case WDCWAIT_TOUT: 574 printf("wdc_atapi_start: not ready, st = %02x\n", 575 chp->ch_status); 576 sc_xfer->error = XS_TIMEOUT; 577 wdc_atapi_reset(chp, xfer); 578 return; 579 case WDCWAIT_THR: 580 return; 581 } 582 583 /* 584 * Even with WDCS_ERR, the device should accept a command packet 585 * Limit length to what can be stuffed into the cylinder register 586 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536, 587 * but not all devices do that and it's not obvious from the 588 * ATAPI spec that that behaviour should be expected. If more 589 * data is necessary, multiple data transfer phases will be done. 590 */ 591 592 wdccommand(chp, xfer->c_drive, ATAPI_PKT_CMD, 593 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff, 594 0, 0, 0, 595 #if NATA_DMA 596 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 597 #endif 598 0 599 ); 600 601 #if NATA_PIOBM 602 if (xfer->c_flags & C_PIOBM) { 603 int error; 604 int dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 605 ? WDC_DMA_READ : 0; 606 if (xfer->c_flags & C_POLL) { 607 /* XXX not supported yet --- fall back to PIO */ 608 xfer->c_flags &= ~C_PIOBM; 609 } else { 610 /* Init the DMA channel. */ 611 error = (*wdc->dma_init)(wdc->dma_arg, 612 chp->ch_channel, xfer->c_drive, 613 (char *)xfer->c_databuf, 614 xfer->c_bcount, 615 dma_flags | WDC_DMA_PIOBM_ATAPI); 616 if (error) { 617 if (error == EINVAL) { 618 /* 619 * We can't do DMA on this transfer 620 * for some reason. Fall back to 621 * PIO. 622 */ 623 xfer->c_flags &= ~C_PIOBM; 624 error = 0; 625 } else { 626 sc_xfer->error = XS_DRIVER_STUFFUP; 627 errstring = "piobm"; 628 goto error; 629 } 630 } 631 } 632 } 633 #endif 634 /* 635 * If there is no interrupt for CMD input, busy-wait for it (done in 636 * the interrupt routine. If it is a polled command, call the interrupt 637 * routine until command is done. 638 */ 639 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) != 640 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) { 641 /* Wait for at last 400ns for status bit to be valid */ 642 DELAY(1); 643 wdc_atapi_intr(chp, xfer, 0); 644 } else { 645 chp->ch_flags |= ATACH_IRQ_WAIT; 646 } 647 if (sc_xfer->xs_control & XS_CTL_POLL) { 648 #if NATA_DMA 649 if (chp->ch_flags & ATACH_DMA_WAIT) { 650 wdc_dmawait(chp, xfer, sc_xfer->timeout); 651 chp->ch_flags &= ~ATACH_DMA_WAIT; 652 } 653 #endif 654 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 655 /* Wait for at last 400ns for status bit to be valid */ 656 DELAY(1); 657 wdc_atapi_intr(chp, xfer, 0); 658 } 659 } 660 return; 661 timeout: 662 printf("%s:%d:%d: %s timed out\n", 663 device_xname(atac->atac_dev), chp->ch_channel, xfer->c_drive, 664 errstring); 665 sc_xfer->error = XS_TIMEOUT; 666 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 667 delay(10); /* some drives need a little delay here */ 668 wdc_atapi_reset(chp, xfer); 669 return; 670 error: 671 printf("%s:%d:%d: %s ", 672 device_xname(atac->atac_dev), chp->ch_channel, xfer->c_drive, 673 errstring); 674 printf("error (0x%x)\n", chp->ch_error); 675 sc_xfer->error = XS_SHORTSENSE; 676 sc_xfer->sense.atapi_sense = chp->ch_error; 677 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 678 delay(10); /* some drives need a little delay here */ 679 wdc_atapi_reset(chp, xfer); 680 return; 681 } 682 683 static int 684 wdc_atapi_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq) 685 { 686 struct atac_softc *atac = chp->ch_atac; 687 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 688 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 689 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 690 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 691 int len, phase, i, retries=0; 692 int ire; 693 #if NATA_DMA 694 int error; 695 #endif 696 #if NATA_DMA || NATA_PIOBM 697 int dma_flags = 0; 698 #endif 699 void *cmd; 700 701 ATADEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n", 702 device_xname(atac->atac_dev), chp->ch_channel, drvp->drive), 703 DEBUG_INTR); 704 705 /* Is it not a transfer, but a control operation? */ 706 if (drvp->state < READY) { 707 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n", 708 device_xname(atac->atac_dev), chp->ch_channel, 709 xfer->c_drive, drvp->state); 710 panic("wdc_atapi_intr: bad state"); 711 } 712 /* 713 * If we missed an interrupt in a PIO transfer, reset and restart. 714 * Don't try to continue transfer, we may have missed cycles. 715 */ 716 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 717 sc_xfer->error = XS_TIMEOUT; 718 wdc_atapi_reset(chp, xfer); 719 return 1; 720 } 721 722 #if NATA_PIOBM 723 /* Transfer-done interrupt for busmastering PIO operation */ 724 if ((xfer->c_flags & C_PIOBM) && (chp->ch_flags & ATACH_PIOBM_WAIT)) { 725 chp->ch_flags &= ~ATACH_PIOBM_WAIT; 726 727 /* restore transfer length */ 728 len = xfer->c_bcount; 729 if (xfer->c_lenoff < 0) 730 len += xfer->c_lenoff; 731 732 if (sc_xfer->xs_control & XS_CTL_DATA_IN) 733 goto end_piobm_datain; 734 else 735 goto end_piobm_dataout; 736 } 737 #endif 738 739 /* Ack interrupt done in wdc_wait_for_unbusy */ 740 if (wdc->select) 741 wdc->select(chp, xfer->c_drive); 742 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 743 WDSD_IBM | (xfer->c_drive << 4)); 744 if (wdc_wait_for_unbusy(chp, 745 (irq == 0) ? sc_xfer->timeout : 0, AT_POLL) == WDCWAIT_TOUT) { 746 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 747 return 0; /* IRQ was not for us */ 748 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n", 749 device_xname(atac->atac_dev), chp->ch_channel, 750 xfer->c_drive, xfer->c_bcount, xfer->c_skip); 751 #if NATA_DMA 752 if (xfer->c_flags & C_DMA) { 753 ata_dmaerr(drvp, 754 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 755 } 756 #endif 757 sc_xfer->error = XS_TIMEOUT; 758 wdc_atapi_reset(chp, xfer); 759 return 1; 760 } 761 if (wdc->irqack) 762 wdc->irqack(chp); 763 764 #if NATA_DMA 765 /* 766 * If we missed an IRQ and were using DMA, flag it as a DMA error 767 * and reset device. 768 */ 769 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) { 770 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 771 sc_xfer->error = XS_RESET; 772 wdc_atapi_reset(chp, xfer); 773 return (1); 774 } 775 #endif 776 /* 777 * if the request sense command was aborted, report the short sense 778 * previously recorded, else continue normal processing 779 */ 780 781 #if NATA_DMA || NATA_PIOBM 782 if (xfer->c_flags & (C_DMA | C_PIOBM)) 783 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 784 ? WDC_DMA_READ : 0; 785 #endif 786 again: 787 len = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_lo], 0) + 788 256 * bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_hi], 0); 789 ire = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_ireason], 0); 790 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ); 791 ATADEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x " 792 "ire 0x%x :", xfer->c_bcount, 793 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR); 794 795 switch (phase) { 796 case PHASE_CMDOUT: 797 cmd = sc_xfer->cmd; 798 ATADEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR); 799 #if NATA_DMA 800 /* Init the DMA channel if necessary */ 801 if (xfer->c_flags & C_DMA) { 802 error = (*wdc->dma_init)(wdc->dma_arg, 803 chp->ch_channel, xfer->c_drive, 804 xfer->c_databuf, xfer->c_bcount, dma_flags); 805 if (error) { 806 if (error == EINVAL) { 807 /* 808 * We can't do DMA on this transfer 809 * for some reason. Fall back to 810 * PIO. 811 */ 812 xfer->c_flags &= ~C_DMA; 813 error = 0; 814 } else { 815 sc_xfer->error = XS_DRIVER_STUFFUP; 816 break; 817 } 818 } 819 } 820 #endif 821 822 /* send packet command */ 823 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */ 824 wdc->dataout_pio(chp, drvp->drive_flags, cmd, sc_xfer->cmdlen); 825 826 #if NATA_DMA 827 /* Start the DMA channel if necessary */ 828 if (xfer->c_flags & C_DMA) { 829 (*wdc->dma_start)(wdc->dma_arg, 830 chp->ch_channel, xfer->c_drive); 831 chp->ch_flags |= ATACH_DMA_WAIT; 832 } 833 #endif 834 835 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 836 chp->ch_flags |= ATACH_IRQ_WAIT; 837 } 838 return 1; 839 840 case PHASE_DATAOUT: 841 /* write data */ 842 ATADEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR); 843 #if NATA_DMA 844 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 || 845 (xfer->c_flags & C_DMA) != 0) { 846 printf("wdc_atapi_intr: bad data phase DATAOUT\n"); 847 if (xfer->c_flags & C_DMA) { 848 ata_dmaerr(drvp, 849 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 850 } 851 sc_xfer->error = XS_TIMEOUT; 852 wdc_atapi_reset(chp, xfer); 853 return 1; 854 } 855 #endif 856 xfer->c_lenoff = len - xfer->c_bcount; 857 if (xfer->c_bcount < len) { 858 printf("wdc_atapi_intr: warning: write only " 859 "%d of %d requested bytes\n", xfer->c_bcount, len); 860 len = xfer->c_bcount; 861 } 862 863 #if NATA_PIOBM 864 if (xfer->c_flags & C_PIOBM) { 865 /* start the busmastering PIO */ 866 (*wdc->piobm_start)(wdc->dma_arg, 867 chp->ch_channel, xfer->c_drive, 868 xfer->c_skip, len, WDC_PIOBM_XFER_IRQ); 869 chp->ch_flags |= ATACH_DMA_WAIT | ATACH_IRQ_WAIT | 870 ATACH_PIOBM_WAIT; 871 return 1; 872 } 873 #endif 874 wdc->dataout_pio(chp, drvp->drive_flags, 875 (char *)xfer->c_databuf + xfer->c_skip, len); 876 877 #if NATA_PIOBM 878 end_piobm_dataout: 879 #endif 880 for (i = xfer->c_lenoff; i > 0; i -= 2) 881 bus_space_write_2(wdr->cmd_iot, 882 wdr->cmd_iohs[wd_data], 0, 0); 883 884 xfer->c_skip += len; 885 xfer->c_bcount -= len; 886 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 887 chp->ch_flags |= ATACH_IRQ_WAIT; 888 } 889 return 1; 890 891 case PHASE_DATAIN: 892 /* Read data */ 893 ATADEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR); 894 #if NATA_DMA 895 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 || 896 (xfer->c_flags & C_DMA) != 0) { 897 printf("wdc_atapi_intr: bad data phase DATAIN\n"); 898 if (xfer->c_flags & C_DMA) { 899 ata_dmaerr(drvp, 900 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 901 } 902 sc_xfer->error = XS_TIMEOUT; 903 wdc_atapi_reset(chp, xfer); 904 return 1; 905 } 906 #endif 907 xfer->c_lenoff = len - xfer->c_bcount; 908 if (xfer->c_bcount < len) { 909 printf("wdc_atapi_intr: warning: reading only " 910 "%d of %d bytes\n", xfer->c_bcount, len); 911 len = xfer->c_bcount; 912 } 913 914 #if NATA_PIOBM 915 if (xfer->c_flags & C_PIOBM) { 916 /* start the busmastering PIO */ 917 (*wdc->piobm_start)(wdc->dma_arg, 918 chp->ch_channel, xfer->c_drive, 919 xfer->c_skip, len, WDC_PIOBM_XFER_IRQ); 920 chp->ch_flags |= ATACH_DMA_WAIT | ATACH_IRQ_WAIT | 921 ATACH_PIOBM_WAIT; 922 return 1; 923 } 924 #endif 925 wdc->datain_pio(chp, drvp->drive_flags, 926 (char *)xfer->c_databuf + xfer->c_skip, len); 927 928 #if NATA_PIOBM 929 end_piobm_datain: 930 #endif 931 if (xfer->c_lenoff > 0) 932 wdcbit_bucket(chp, len - xfer->c_bcount); 933 934 xfer->c_skip += len; 935 xfer->c_bcount -= len; 936 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 937 chp->ch_flags |= ATACH_IRQ_WAIT; 938 } 939 return 1; 940 941 case PHASE_ABORTED: 942 case PHASE_COMPLETED: 943 ATADEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR); 944 #if NATA_DMA 945 if (xfer->c_flags & C_DMA) { 946 xfer->c_bcount -= sc_xfer->datalen; 947 } 948 #endif 949 sc_xfer->resid = xfer->c_bcount; 950 wdc_atapi_phase_complete(xfer); 951 return(1); 952 953 default: 954 if (++retries<500) { 955 DELAY(100); 956 chp->ch_status = bus_space_read_1(wdr->cmd_iot, 957 wdr->cmd_iohs[wd_status], 0); 958 chp->ch_error = bus_space_read_1(wdr->cmd_iot, 959 wdr->cmd_iohs[wd_error], 0); 960 goto again; 961 } 962 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase); 963 if (chp->ch_status & WDCS_ERR) { 964 sc_xfer->error = XS_SHORTSENSE; 965 sc_xfer->sense.atapi_sense = chp->ch_error; 966 } else { 967 #if NATA_DMA 968 if (xfer->c_flags & C_DMA) { 969 ata_dmaerr(drvp, 970 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 971 } 972 #endif 973 sc_xfer->error = XS_RESET; 974 wdc_atapi_reset(chp, xfer); 975 return (1); 976 } 977 } 978 ATADEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x " 979 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense), 980 DEBUG_INTR); 981 wdc_atapi_done(chp, xfer); 982 return (1); 983 } 984 985 static void 986 wdc_atapi_phase_complete(struct ata_xfer *xfer) 987 { 988 struct ata_channel *chp = xfer->c_chp; 989 struct atac_softc *atac = chp->ch_atac; 990 #if NATA_DMA || NATA_PIOBM 991 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 992 #endif 993 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 994 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 995 996 /* wait for DSC if needed */ 997 if (drvp->drive_flags & DRIVE_ATAPIST) { 998 ATADEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) " 999 "polldsc %d\n", device_xname(atac->atac_dev), 1000 chp->ch_channel, 1001 xfer->c_drive, xfer->c_dscpoll), DEBUG_XFERS); 1002 #if 1 1003 if (cold) 1004 panic("wdc_atapi_phase_complete: cold"); 1005 #endif 1006 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10, 1007 AT_POLL) == WDCWAIT_TOUT) { 1008 /* 10ms not enough, try again in 1 tick */ 1009 if (xfer->c_dscpoll++ > 1010 mstohz(sc_xfer->timeout)) { 1011 printf("%s:%d:%d: wait_for_dsc " 1012 "failed\n", 1013 device_xname(atac->atac_dev), 1014 chp->ch_channel, xfer->c_drive); 1015 sc_xfer->error = XS_TIMEOUT; 1016 wdc_atapi_reset(chp, xfer); 1017 return; 1018 } else 1019 callout_reset(&chp->ch_callout, 1, 1020 wdc_atapi_polldsc, xfer); 1021 return; 1022 } 1023 } 1024 1025 /* 1026 * Some drive occasionally set WDCS_ERR with 1027 * "ATA illegal length indication" in the error 1028 * register. If we read some data the sense is valid 1029 * anyway, so don't report the error. 1030 */ 1031 if (chp->ch_status & WDCS_ERR && 1032 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 1033 sc_xfer->resid == sc_xfer->datalen)) { 1034 /* save the short sense */ 1035 sc_xfer->error = XS_SHORTSENSE; 1036 sc_xfer->sense.atapi_sense = chp->ch_error; 1037 if ((sc_xfer->xs_periph->periph_quirks & 1038 PQUIRK_NOSENSE) == 0) { 1039 /* ask scsipi to send a REQUEST_SENSE */ 1040 sc_xfer->error = XS_BUSY; 1041 sc_xfer->status = SCSI_CHECK; 1042 } 1043 #if NATA_DMA || NATA_PIOBM 1044 else if (wdc->dma_status & 1045 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) { 1046 #if NATA_DMA 1047 ata_dmaerr(drvp, 1048 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 1049 #endif 1050 sc_xfer->error = XS_RESET; 1051 wdc_atapi_reset(chp, xfer); 1052 return; 1053 } 1054 #endif 1055 } 1056 if (xfer->c_bcount != 0) { 1057 ATADEBUG_PRINT(("wdc_atapi_intr: bcount value is " 1058 "%d after io\n", xfer->c_bcount), DEBUG_XFERS); 1059 } 1060 #ifdef DIAGNOSTIC 1061 if (xfer->c_bcount < 0) { 1062 printf("wdc_atapi_intr warning: bcount value " 1063 "is %d after io\n", xfer->c_bcount); 1064 } 1065 #endif 1066 ATADEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), " 1067 "error 0x%x sense 0x%x\n", sc_xfer->error, 1068 sc_xfer->sense.atapi_sense), DEBUG_INTR); 1069 wdc_atapi_done(chp, xfer); 1070 } 1071 1072 static void 1073 wdc_atapi_done(struct ata_channel *chp, struct ata_xfer *xfer) 1074 { 1075 struct atac_softc *atac = chp->ch_atac; 1076 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1077 int drive = xfer->c_drive; 1078 1079 ATADEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n", 1080 device_xname(atac->atac_dev), chp->ch_channel, xfer->c_drive, 1081 (u_int)xfer->c_flags), DEBUG_XFERS); 1082 callout_stop(&chp->ch_callout); 1083 /* mark controller inactive and free the command */ 1084 chp->ch_queue->active_xfer = NULL; 1085 ata_free_xfer(chp, xfer); 1086 1087 if (chp->ch_drive[drive].drive_flags & DRIVE_WAITDRAIN) { 1088 sc_xfer->error = XS_DRIVER_STUFFUP; 1089 chp->ch_drive[drive].drive_flags &= ~DRIVE_WAITDRAIN; 1090 wakeup(&chp->ch_queue->active_xfer); 1091 } 1092 1093 ATADEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS); 1094 scsipi_done(sc_xfer); 1095 ATADEBUG_PRINT(("atastart from wdc_atapi_done, flags 0x%x\n", 1096 chp->ch_flags), DEBUG_XFERS); 1097 atastart(chp); 1098 } 1099 1100 static void 1101 wdc_atapi_reset(struct ata_channel *chp, struct ata_xfer *xfer) 1102 { 1103 struct atac_softc *atac = chp->ch_atac; 1104 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 1105 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1106 1107 wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET); 1108 drvp->state = 0; 1109 if (wdc_wait_for_unbusy(chp, WDC_RESET_WAIT, AT_POLL) != 0) { 1110 printf("%s:%d:%d: reset failed\n", 1111 device_xname(atac->atac_dev), chp->ch_channel, 1112 xfer->c_drive); 1113 sc_xfer->error = XS_SELTIMEOUT; 1114 } 1115 wdc_atapi_done(chp, xfer); 1116 return; 1117 } 1118 1119 static void 1120 wdc_atapi_polldsc(void *arg) 1121 { 1122 1123 wdc_atapi_phase_complete(arg); 1124 } 1125
Indexes created Tue Sep 23 21:09:50 GMT 2025