atapi_wdc.c revision 1.121
1 /* $NetBSD: atapi_wdc.c,v 1.121 2016/03/20 10:29:12 tsutsui Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.121 2016/03/20 10:29:12 tsutsui Exp $"); 29 30 #ifndef ATADEBUG 31 #define ATADEBUG 32 #endif /* ATADEBUG */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/file.h> 38 #include <sys/stat.h> 39 #include <sys/buf.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <sys/syslog.h> 43 #include <sys/proc.h> 44 #include <sys/dvdio.h> 45 46 #include <sys/intr.h> 47 #include <sys/bus.h> 48 49 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 50 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 51 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 52 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 53 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 54 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 55 56 #include <dev/ata/ataconf.h> 57 #include <dev/ata/atareg.h> 58 #include <dev/ata/atavar.h> 59 #include <dev/ic/wdcreg.h> 60 #include <dev/ic/wdcvar.h> 61 62 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 63 64 #define DEBUG_INTR 0x01 65 #define DEBUG_XFERS 0x02 66 #define DEBUG_STATUS 0x04 67 #define DEBUG_FUNCS 0x08 68 #define DEBUG_PROBE 0x10 69 #ifdef ATADEBUG 70 int wdcdebug_atapi_mask = 0; 71 #define ATADEBUG_PRINT(args, level) \ 72 if (wdcdebug_atapi_mask & (level)) \ 73 printf args 74 #else 75 #define ATADEBUG_PRINT(args, level) 76 #endif 77 78 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */ 79 #define ATAPI_MODE_DELAY 1000 /* 1s, timeout for SET_FEATYRE cmds */ 80 81 static int wdc_atapi_get_params(struct scsipi_channel *, int, 82 struct ataparams *); 83 static void wdc_atapi_probe_device(struct atapibus_softc *, int); 84 static void wdc_atapi_minphys (struct buf *bp); 85 static void wdc_atapi_start(struct ata_channel *,struct ata_xfer *); 86 static int wdc_atapi_intr(struct ata_channel *, struct ata_xfer *, int); 87 static void wdc_atapi_kill_xfer(struct ata_channel *, 88 struct ata_xfer *, int); 89 static void wdc_atapi_phase_complete(struct ata_xfer *); 90 static void wdc_atapi_done(struct ata_channel *, struct ata_xfer *); 91 static void wdc_atapi_reset(struct ata_channel *, struct ata_xfer *); 92 static void wdc_atapi_scsipi_request(struct scsipi_channel *, 93 scsipi_adapter_req_t, void *); 94 static void wdc_atapi_kill_pending(struct scsipi_periph *); 95 static void wdc_atapi_polldsc(void *arg); 96 97 #define MAX_SIZE MAXPHYS 98 99 static const struct scsipi_bustype wdc_atapi_bustype = { 100 SCSIPI_BUSTYPE_ATAPI, 101 atapi_scsipi_cmd, 102 atapi_interpret_sense, 103 atapi_print_addr, 104 wdc_atapi_kill_pending, 105 NULL, 106 }; 107 108 void 109 wdc_atapibus_attach(struct atabus_softc *ata_sc) 110 { 111 struct ata_channel *chp = ata_sc->sc_chan; 112 struct atac_softc *atac = chp->ch_atac; 113 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 114 struct scsipi_channel *chan = &chp->ch_atapi_channel; 115 116 /* 117 * Fill in the scsipi_adapter. 118 */ 119 adapt->adapt_dev = atac->atac_dev; 120 adapt->adapt_nchannels = atac->atac_nchannels; 121 adapt->adapt_request = wdc_atapi_scsipi_request; 122 adapt->adapt_minphys = wdc_atapi_minphys; 123 if (atac->atac_cap & ATAC_CAP_NOIRQ) 124 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY; 125 atac->atac_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device; 126 127 /* 128 * Fill in the scsipi_channel. 129 */ 130 memset(chan, 0, sizeof(*chan)); 131 chan->chan_adapter = adapt; 132 chan->chan_bustype = &wdc_atapi_bustype; 133 chan->chan_channel = chp->ch_channel; 134 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 135 chan->chan_openings = 1; 136 chan->chan_max_periph = 1; 137 chan->chan_ntargets = 2; 138 chan->chan_nluns = 1; 139 140 chp->atapibus = config_found_ia(ata_sc->sc_dev, "atapi", chan, 141 atapiprint); 142 } 143 144 static void 145 wdc_atapi_minphys(struct buf *bp) 146 { 147 148 if (bp->b_bcount > MAX_SIZE) 149 bp->b_bcount = MAX_SIZE; 150 minphys(bp); 151 } 152 153 /* 154 * Kill off all pending xfers for a periph. 155 * 156 * Must be called at splbio(). 157 */ 158 static void 159 wdc_atapi_kill_pending(struct scsipi_periph *periph) 160 { 161 struct atac_softc *atac = 162 device_private(periph->periph_channel->chan_adapter->adapt_dev); 163 struct ata_channel *chp = 164 atac->atac_channels[periph->periph_channel->chan_channel]; 165 166 ata_kill_pending(&chp->ch_drive[periph->periph_target]); 167 } 168 169 static void 170 wdc_atapi_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, int reason) 171 { 172 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 173 174 /* remove this command from xfer queue */ 175 switch (reason) { 176 case KILL_GONE: 177 sc_xfer->error = XS_DRIVER_STUFFUP; 178 break; 179 case KILL_RESET: 180 sc_xfer->error = XS_RESET; 181 break; 182 default: 183 printf("wdc_ata_bio_kill_xfer: unknown reason %d\n", 184 reason); 185 panic("wdc_ata_bio_kill_xfer"); 186 } 187 ata_free_xfer(chp, xfer); 188 scsipi_done(sc_xfer); 189 } 190 191 static int 192 wdc_atapi_get_params(struct scsipi_channel *chan, int drive, 193 struct ataparams *id) 194 { 195 struct wdc_softc *wdc = device_private(chan->chan_adapter->adapt_dev); 196 struct atac_softc *atac = &wdc->sc_atac; 197 struct wdc_regs *wdr = &wdc->regs[chan->chan_channel]; 198 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 199 struct ata_command ata_c; 200 201 memset(&ata_c, 0, sizeof(struct ata_command)); 202 ata_c.r_command = ATAPI_SOFT_RESET; 203 ata_c.r_st_bmask = 0; 204 ata_c.r_st_pmask = 0; 205 ata_c.flags = AT_WAIT | AT_POLL; 206 ata_c.timeout = WDC_RESET_WAIT; 207 if (wdc_exec_command(&chp->ch_drive[drive], &ata_c) != ATACMD_COMPLETE) { 208 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for" 209 " drive %s:%d:%d: driver failed\n", 210 device_xname(atac->atac_dev), chp->ch_channel, drive); 211 panic("wdc_atapi_get_params"); 212 } 213 if (ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 214 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET " 215 "failed for drive %s:%d:%d: error 0x%x\n", 216 device_xname(atac->atac_dev), chp->ch_channel, drive, 217 ata_c.r_error), DEBUG_PROBE); 218 return -1; 219 } 220 chp->ch_drive[drive].state = 0; 221 222 (void)bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_status], 0); 223 224 /* Some ATAPI devices need a bit more time after software reset. */ 225 delay(5000); 226 if (ata_get_params(&chp->ch_drive[drive], AT_WAIT, id) != 0) { 227 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE " 228 "failed for drive %s:%d:%d: error 0x%x\n", 229 device_xname(atac->atac_dev), chp->ch_channel, drive, 230 ata_c.r_error), DEBUG_PROBE); 231 return -1; 232 } 233 return 0; 234 } 235 236 static void 237 wdc_atapi_probe_device(struct atapibus_softc *sc, int target) 238 { 239 struct scsipi_channel *chan = sc->sc_channel; 240 struct scsipi_periph *periph; 241 struct ataparams ids; 242 struct ataparams *id = &ids; 243 struct wdc_softc *wdc = device_private(chan->chan_adapter->adapt_dev); 244 struct atac_softc *atac = &wdc->sc_atac; 245 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 246 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 247 struct scsipibus_attach_args sa; 248 char serial_number[21], model[41], firmware_revision[9]; 249 int s; 250 251 /* skip if already attached */ 252 if (scsipi_lookup_periph(chan, target, 0) != NULL) 253 return; 254 255 /* if no ATAPI device detected at wdc attach time, skip */ 256 if (drvp->drive_type != ATA_DRIVET_ATAPI) { 257 ATADEBUG_PRINT(("wdc_atapi_probe_device: " 258 "drive %d not present\n", target), DEBUG_PROBE); 259 return; 260 } 261 262 if (wdc_atapi_get_params(chan, target, id) == 0) { 263 #ifdef ATAPI_DEBUG_PROBE 264 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 265 device_xname(sc->sc_dev), target, 266 id->atap_config & ATAPI_CFG_CMD_MASK, 267 id->atap_config & ATAPI_CFG_DRQ_MASK); 268 #endif 269 periph = scsipi_alloc_periph(M_NOWAIT); 270 if (periph == NULL) { 271 aprint_error_dev(sc->sc_dev, 272 "unable to allocate periph for drive %d\n", 273 target); 274 return; 275 } 276 periph->periph_dev = NULL; 277 periph->periph_channel = chan; 278 periph->periph_switch = &atapi_probe_periphsw; 279 periph->periph_target = target; 280 periph->periph_lun = 0; 281 periph->periph_quirks = PQUIRK_ONLYBIG; 282 283 #ifdef SCSIPI_DEBUG 284 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 285 SCSIPI_DEBUG_TARGET == target) 286 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 287 #endif 288 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 289 if (id->atap_config & ATAPI_CFG_REMOV) 290 periph->periph_flags |= PERIPH_REMOVABLE; 291 if (periph->periph_type == T_SEQUENTIAL) { 292 s = splbio(); 293 drvp->drive_flags |= ATA_DRIVE_ATAPIDSCW; 294 splx(s); 295 } 296 297 sa.sa_periph = periph; 298 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 299 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 300 T_REMOV : T_FIXED; 301 scsipi_strvis((u_char *)model, 40, id->atap_model, 40); 302 scsipi_strvis((u_char *)serial_number, 20, id->atap_serial, 303 20); 304 scsipi_strvis((u_char *)firmware_revision, 8, 305 id->atap_revision, 8); 306 sa.sa_inqbuf.vendor = model; 307 sa.sa_inqbuf.product = serial_number; 308 sa.sa_inqbuf.revision = firmware_revision; 309 310 /* 311 * Determine the operating mode capabilities of the device. 312 */ 313 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16) 314 periph->periph_cap |= PERIPH_CAP_CMD16; 315 /* XXX This is gross. */ 316 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 317 318 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 319 320 if (drvp->drv_softc) 321 ata_probe_caps(drvp); 322 else { 323 s = splbio(); 324 drvp->drive_type = ATA_DRIVET_NONE; 325 splx(s); 326 } 327 } else { 328 s = splbio(); 329 drvp->drive_type = ATA_DRIVET_NONE; 330 splx(s); 331 } 332 } 333 334 static void 335 wdc_atapi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 336 void *arg) 337 { 338 struct scsipi_adapter *adapt = chan->chan_adapter; 339 struct scsipi_periph *periph; 340 struct scsipi_xfer *sc_xfer; 341 struct wdc_softc *wdc = device_private(adapt->adapt_dev); 342 struct atac_softc *atac = &wdc->sc_atac; 343 struct ata_xfer *xfer; 344 int channel = chan->chan_channel; 345 int drive, s; 346 347 switch (req) { 348 case ADAPTER_REQ_RUN_XFER: 349 sc_xfer = arg; 350 periph = sc_xfer->xs_periph; 351 drive = periph->periph_target; 352 353 ATADEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n", 354 device_xname(atac->atac_dev), channel, drive), 355 DEBUG_XFERS); 356 if (!device_is_active(atac->atac_dev)) { 357 sc_xfer->error = XS_DRIVER_STUFFUP; 358 scsipi_done(sc_xfer); 359 return; 360 } 361 362 xfer = ata_get_xfer(ATAXF_NOSLEEP); 363 if (xfer == NULL) { 364 sc_xfer->error = XS_RESOURCE_SHORTAGE; 365 scsipi_done(sc_xfer); 366 return; 367 } 368 369 if (sc_xfer->xs_control & XS_CTL_POLL) 370 xfer->c_flags |= C_POLL; 371 #if NATA_DMA 372 if ((atac->atac_channels[channel]->ch_drive[drive].drive_flags & 373 (ATA_DRIVE_DMA | ATA_DRIVE_UDMA)) && sc_xfer->datalen > 0) 374 xfer->c_flags |= C_DMA; 375 #endif 376 #if NATA_DMA && NATA_PIOBM 377 else 378 #endif 379 #if NATA_PIOBM 380 if ((atac->atac_cap & ATAC_CAP_PIOBM) && 381 sc_xfer->datalen > 0) 382 xfer->c_flags |= C_PIOBM; 383 #endif 384 xfer->c_drive = drive; 385 xfer->c_flags |= C_ATAPI; 386 #if NATA_DMA 387 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY || 388 sc_xfer->cmd->opcode == GPCMD_SEND_KEY || 389 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) { 390 /* 391 * DVD authentication commands must always be done in 392 * PIO mode. 393 */ 394 xfer->c_flags &= ~C_DMA; 395 } 396 397 /* 398 * DMA normally can't deal with transfers which are not a 399 * multiple of its databus width. It's a bug to request odd 400 * length transfers for ATAPI. 401 * 402 * Some devices also can't cope with unaligned DMA xfers 403 * either. Also some devices seem to not handle DMA xfers of 404 * less than 4 bytes. 405 * 406 * By enforcing at least 4 byte aligned offset and length for 407 * DMA, we might use PIO where DMA could be allowed but better 408 * safe than sorry as recent problems proved. 409 * 410 * Offending structures that are thus done by PIO instead of 411 * DMA are normally small structures since all bulkdata is 412 * aligned. But as the request may come from userland, we have 413 * to protect against it anyway. 414 * 415 * XXX check for the 32 bit wide flag? 416 */ 417 418 if (((uintptr_t) sc_xfer->data) & 0x03) 419 xfer->c_flags &= ~C_DMA; 420 if ((sc_xfer->datalen < 4) || (sc_xfer->datalen & 0x03)) 421 xfer->c_flags &= ~C_DMA; 422 #endif /* NATA_DMA */ 423 424 xfer->c_cmd = sc_xfer; 425 xfer->c_databuf = sc_xfer->data; 426 xfer->c_bcount = sc_xfer->datalen; 427 xfer->c_start = wdc_atapi_start; 428 xfer->c_intr = wdc_atapi_intr; 429 xfer->c_kill_xfer = wdc_atapi_kill_xfer; 430 xfer->c_dscpoll = 0; 431 s = splbio(); 432 ata_exec_xfer(atac->atac_channels[channel], xfer); 433 #ifdef DIAGNOSTIC 434 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 435 (sc_xfer->xs_status & XS_STS_DONE) == 0) 436 panic("wdc_atapi_scsipi_request: polled command " 437 "not done"); 438 #endif 439 splx(s); 440 return; 441 442 default: 443 /* Not supported, nothing to do. */ 444 ; 445 } 446 } 447 448 static void 449 wdc_atapi_start(struct ata_channel *chp, struct ata_xfer *xfer) 450 { 451 struct atac_softc *atac = chp->ch_atac; 452 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 453 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 454 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 455 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 456 int wait_flags = (sc_xfer->xs_control & XS_CTL_POLL) ? AT_POLL : 0; 457 const char *errstring; 458 459 ATADEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n", 460 device_xname(atac->atac_dev), chp->ch_channel, drvp->drive, 461 sc_xfer->xs_control), DEBUG_XFERS); 462 #if NATA_DMA 463 if ((xfer->c_flags & C_DMA) && (drvp->n_xfers <= NXFER)) 464 drvp->n_xfers++; 465 #endif 466 /* Do control operations specially. */ 467 if (__predict_false(drvp->state < READY)) { 468 /* If it's not a polled command, we need the kernel thread */ 469 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0 && 470 (chp->ch_flags & ATACH_TH_RUN) == 0) { 471 chp->ch_queue->queue_freeze++; 472 wakeup(&chp->ch_thread); 473 return; 474 } 475 /* 476 * disable interrupts, all commands here should be quick 477 * enough to be able to poll, and we don't go here that often 478 */ 479 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 480 WDCTL_4BIT | WDCTL_IDS); 481 if (wdc->select) 482 wdc->select(chp, xfer->c_drive); 483 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 484 WDSD_IBM | (xfer->c_drive << 4)); 485 /* Don't try to set mode if controller can't be adjusted */ 486 if (atac->atac_set_modes == NULL) 487 goto ready; 488 /* Also don't try if the drive didn't report its mode */ 489 if ((drvp->drive_flags & ATA_DRIVE_MODE) == 0) 490 goto ready; 491 errstring = "unbusy"; 492 if (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags)) 493 goto timeout; 494 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 495 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 496 errstring = "piomode"; 497 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 498 goto timeout; 499 if (chp->ch_status & WDCS_ERR) { 500 if (chp->ch_error == WDCE_ABRT) { 501 /* 502 * Some ATAPI drives reject PIO settings. 503 * Fall back to PIO mode 3 since that's the 504 * minimum for ATAPI. 505 */ 506 printf("%s:%d:%d: PIO mode %d rejected, " 507 "falling back to PIO mode 3\n", 508 device_xname(atac->atac_dev), 509 chp->ch_channel, xfer->c_drive, 510 drvp->PIO_mode); 511 if (drvp->PIO_mode > 3) 512 drvp->PIO_mode = 3; 513 } else 514 goto error; 515 } 516 #if NATA_DMA 517 #if NATA_UDMA 518 if (drvp->drive_flags & ATA_DRIVE_UDMA) { 519 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 520 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 521 } else 522 #endif 523 if (drvp->drive_flags & ATA_DRIVE_DMA) { 524 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 525 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 526 } else { 527 goto ready; 528 } 529 errstring = "dmamode"; 530 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 531 goto timeout; 532 if (chp->ch_status & WDCS_ERR) { 533 if (chp->ch_error == WDCE_ABRT) { 534 #if NATA_UDMA 535 if (drvp->drive_flags & ATA_DRIVE_UDMA) 536 goto error; 537 else 538 #endif 539 { 540 /* 541 * The drive rejected our DMA setting. 542 * Fall back to mode 1. 543 */ 544 printf("%s:%d:%d: DMA mode %d rejected, " 545 "falling back to DMA mode 0\n", 546 device_xname(atac->atac_dev), 547 chp->ch_channel, xfer->c_drive, 548 drvp->DMA_mode); 549 if (drvp->DMA_mode > 0) 550 drvp->DMA_mode = 0; 551 } 552 } else 553 goto error; 554 } 555 #endif /* NATA_DMA */ 556 ready: 557 drvp->state = READY; 558 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 559 WDCTL_4BIT); 560 delay(10); /* some drives need a little delay here */ 561 } 562 /* start timeout machinery */ 563 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 564 callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout), 565 wdctimeout, chp); 566 567 if (wdc->select) 568 wdc->select(chp, xfer->c_drive); 569 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 570 WDSD_IBM | (xfer->c_drive << 4)); 571 switch (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags)) { 572 case WDCWAIT_OK: 573 break; 574 case WDCWAIT_TOUT: 575 printf("wdc_atapi_start: not ready, st = %02x\n", 576 chp->ch_status); 577 sc_xfer->error = XS_TIMEOUT; 578 wdc_atapi_reset(chp, xfer); 579 return; 580 case WDCWAIT_THR: 581 return; 582 } 583 584 /* 585 * Even with WDCS_ERR, the device should accept a command packet 586 * Limit length to what can be stuffed into the cylinder register 587 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536, 588 * but not all devices do that and it's not obvious from the 589 * ATAPI spec that that behaviour should be expected. If more 590 * data is necessary, multiple data transfer phases will be done. 591 */ 592 593 wdccommand(chp, xfer->c_drive, ATAPI_PKT_CMD, 594 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff, 595 0, 0, 0, 596 #if NATA_DMA 597 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 598 #endif 599 0 600 ); 601 602 #if NATA_PIOBM 603 if (xfer->c_flags & C_PIOBM) { 604 int error; 605 int dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 606 ? WDC_DMA_READ : 0; 607 if (xfer->c_flags & C_POLL) { 608 /* XXX not supported yet --- fall back to PIO */ 609 xfer->c_flags &= ~C_PIOBM; 610 } else { 611 /* Init the DMA channel. */ 612 error = (*wdc->dma_init)(wdc->dma_arg, 613 chp->ch_channel, xfer->c_drive, 614 (char *)xfer->c_databuf, 615 xfer->c_bcount, 616 dma_flags | WDC_DMA_PIOBM_ATAPI); 617 if (error) { 618 if (error == EINVAL) { 619 /* 620 * We can't do DMA on this transfer 621 * for some reason. Fall back to 622 * PIO. 623 */ 624 xfer->c_flags &= ~C_PIOBM; 625 error = 0; 626 } else { 627 sc_xfer->error = XS_DRIVER_STUFFUP; 628 errstring = "piobm"; 629 goto error; 630 } 631 } 632 } 633 } 634 #endif 635 /* 636 * If there is no interrupt for CMD input, busy-wait for it (done in 637 * the interrupt routine. If it is a polled command, call the interrupt 638 * routine until command is done. 639 */ 640 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) != 641 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) { 642 /* Wait for at last 400ns for status bit to be valid */ 643 DELAY(1); 644 wdc_atapi_intr(chp, xfer, 0); 645 } else { 646 chp->ch_flags |= ATACH_IRQ_WAIT; 647 } 648 if (sc_xfer->xs_control & XS_CTL_POLL) { 649 #if NATA_DMA 650 if (chp->ch_flags & ATACH_DMA_WAIT) { 651 wdc_dmawait(chp, xfer, sc_xfer->timeout); 652 chp->ch_flags &= ~ATACH_DMA_WAIT; 653 } 654 #endif 655 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 656 /* Wait for at last 400ns for status bit to be valid */ 657 DELAY(1); 658 wdc_atapi_intr(chp, xfer, 0); 659 } 660 } 661 return; 662 timeout: 663 printf("%s:%d:%d: %s timed out\n", 664 device_xname(atac->atac_dev), chp->ch_channel, xfer->c_drive, 665 errstring); 666 sc_xfer->error = XS_TIMEOUT; 667 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 668 delay(10); /* some drives need a little delay here */ 669 wdc_atapi_reset(chp, xfer); 670 return; 671 error: 672 printf("%s:%d:%d: %s ", 673 device_xname(atac->atac_dev), chp->ch_channel, xfer->c_drive, 674 errstring); 675 printf("error (0x%x)\n", chp->ch_error); 676 sc_xfer->error = XS_SHORTSENSE; 677 sc_xfer->sense.atapi_sense = chp->ch_error; 678 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 679 delay(10); /* some drives need a little delay here */ 680 wdc_atapi_reset(chp, xfer); 681 return; 682 } 683 684 static int 685 wdc_atapi_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq) 686 { 687 struct atac_softc *atac = chp->ch_atac; 688 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 689 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 690 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 691 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 692 int len, phase, i, retries=0; 693 int ire; 694 #if NATA_DMA 695 int error; 696 #endif 697 #if NATA_DMA || NATA_PIOBM 698 int dma_flags = 0; 699 #endif 700 void *cmd; 701 702 ATADEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n", 703 device_xname(atac->atac_dev), chp->ch_channel, drvp->drive), 704 DEBUG_INTR); 705 706 /* Is it not a transfer, but a control operation? */ 707 if (drvp->state < READY) { 708 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n", 709 device_xname(atac->atac_dev), chp->ch_channel, 710 xfer->c_drive, drvp->state); 711 panic("wdc_atapi_intr: bad state"); 712 } 713 /* 714 * If we missed an interrupt in a PIO transfer, reset and restart. 715 * Don't try to continue transfer, we may have missed cycles. 716 */ 717 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 718 sc_xfer->error = XS_TIMEOUT; 719 wdc_atapi_reset(chp, xfer); 720 return 1; 721 } 722 723 #if NATA_PIOBM 724 /* Transfer-done interrupt for busmastering PIO operation */ 725 if ((xfer->c_flags & C_PIOBM) && (chp->ch_flags & ATACH_PIOBM_WAIT)) { 726 chp->ch_flags &= ~ATACH_PIOBM_WAIT; 727 728 /* restore transfer length */ 729 len = xfer->c_bcount; 730 if (xfer->c_lenoff < 0) 731 len += xfer->c_lenoff; 732 733 if (sc_xfer->xs_control & XS_CTL_DATA_IN) 734 goto end_piobm_datain; 735 else 736 goto end_piobm_dataout; 737 } 738 #endif 739 740 /* Ack interrupt done in wdc_wait_for_unbusy */ 741 if (wdc->select) 742 wdc->select(chp, xfer->c_drive); 743 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 744 WDSD_IBM | (xfer->c_drive << 4)); 745 if (wdc_wait_for_unbusy(chp, 746 (irq == 0) ? sc_xfer->timeout : 0, AT_POLL) == WDCWAIT_TOUT) { 747 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 748 return 0; /* IRQ was not for us */ 749 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n", 750 device_xname(atac->atac_dev), chp->ch_channel, 751 xfer->c_drive, xfer->c_bcount, xfer->c_skip); 752 #if NATA_DMA 753 if (xfer->c_flags & C_DMA) { 754 ata_dmaerr(drvp, 755 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 756 } 757 #endif 758 sc_xfer->error = XS_TIMEOUT; 759 wdc_atapi_reset(chp, xfer); 760 return 1; 761 } 762 if (wdc->irqack) 763 wdc->irqack(chp); 764 765 #if NATA_DMA 766 /* 767 * If we missed an IRQ and were using DMA, flag it as a DMA error 768 * and reset device. 769 */ 770 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) { 771 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 772 sc_xfer->error = XS_RESET; 773 wdc_atapi_reset(chp, xfer); 774 return (1); 775 } 776 #endif 777 /* 778 * if the request sense command was aborted, report the short sense 779 * previously recorded, else continue normal processing 780 */ 781 782 #if NATA_DMA || NATA_PIOBM 783 if (xfer->c_flags & (C_DMA | C_PIOBM)) 784 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 785 ? WDC_DMA_READ : 0; 786 #endif 787 again: 788 len = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_lo], 0) + 789 256 * bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_hi], 0); 790 ire = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_ireason], 0); 791 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ); 792 ATADEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x " 793 "ire 0x%x :", xfer->c_bcount, 794 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR); 795 796 switch (phase) { 797 case PHASE_CMDOUT: 798 cmd = sc_xfer->cmd; 799 ATADEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR); 800 #if NATA_DMA 801 /* Init the DMA channel if necessary */ 802 if (xfer->c_flags & C_DMA) { 803 error = (*wdc->dma_init)(wdc->dma_arg, 804 chp->ch_channel, xfer->c_drive, 805 xfer->c_databuf, xfer->c_bcount, dma_flags); 806 if (error) { 807 if (error == EINVAL) { 808 /* 809 * We can't do DMA on this transfer 810 * for some reason. Fall back to 811 * PIO. 812 */ 813 xfer->c_flags &= ~C_DMA; 814 error = 0; 815 } else { 816 sc_xfer->error = XS_DRIVER_STUFFUP; 817 break; 818 } 819 } 820 } 821 #endif 822 823 /* send packet command */ 824 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */ 825 wdc->dataout_pio(chp, drvp->drive_flags, cmd, sc_xfer->cmdlen); 826 827 #if NATA_DMA 828 /* Start the DMA channel if necessary */ 829 if (xfer->c_flags & C_DMA) { 830 (*wdc->dma_start)(wdc->dma_arg, 831 chp->ch_channel, xfer->c_drive); 832 chp->ch_flags |= ATACH_DMA_WAIT; 833 } 834 #endif 835 836 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 837 chp->ch_flags |= ATACH_IRQ_WAIT; 838 } 839 return 1; 840 841 case PHASE_DATAOUT: 842 /* write data */ 843 ATADEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR); 844 #if NATA_DMA 845 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 || 846 (xfer->c_flags & C_DMA) != 0) { 847 printf("wdc_atapi_intr: bad data phase DATAOUT\n"); 848 if (xfer->c_flags & C_DMA) { 849 ata_dmaerr(drvp, 850 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 851 } 852 sc_xfer->error = XS_TIMEOUT; 853 wdc_atapi_reset(chp, xfer); 854 return 1; 855 } 856 #endif 857 xfer->c_lenoff = len - xfer->c_bcount; 858 if (xfer->c_bcount < len) { 859 printf("wdc_atapi_intr: warning: write only " 860 "%d of %d requested bytes\n", xfer->c_bcount, len); 861 len = xfer->c_bcount; 862 } 863 864 #if NATA_PIOBM 865 if (xfer->c_flags & C_PIOBM) { 866 /* start the busmastering PIO */ 867 (*wdc->piobm_start)(wdc->dma_arg, 868 chp->ch_channel, xfer->c_drive, 869 xfer->c_skip, len, WDC_PIOBM_XFER_IRQ); 870 chp->ch_flags |= ATACH_DMA_WAIT | ATACH_IRQ_WAIT | 871 ATACH_PIOBM_WAIT; 872 return 1; 873 } 874 #endif 875 wdc->dataout_pio(chp, drvp->drive_flags, 876 (char *)xfer->c_databuf + xfer->c_skip, len); 877 878 #if NATA_PIOBM 879 end_piobm_dataout: 880 #endif 881 for (i = xfer->c_lenoff; i > 0; i -= 2) 882 bus_space_write_2(wdr->cmd_iot, 883 wdr->cmd_iohs[wd_data], 0, 0); 884 885 xfer->c_skip += len; 886 xfer->c_bcount -= len; 887 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 888 chp->ch_flags |= ATACH_IRQ_WAIT; 889 } 890 return 1; 891 892 case PHASE_DATAIN: 893 /* Read data */ 894 ATADEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR); 895 #if NATA_DMA 896 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 || 897 (xfer->c_flags & C_DMA) != 0) { 898 printf("wdc_atapi_intr: bad data phase DATAIN\n"); 899 if (xfer->c_flags & C_DMA) { 900 ata_dmaerr(drvp, 901 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 902 } 903 sc_xfer->error = XS_TIMEOUT; 904 wdc_atapi_reset(chp, xfer); 905 return 1; 906 } 907 #endif 908 xfer->c_lenoff = len - xfer->c_bcount; 909 if (xfer->c_bcount < len) { 910 printf("wdc_atapi_intr: warning: reading only " 911 "%d of %d bytes\n", xfer->c_bcount, len); 912 len = xfer->c_bcount; 913 } 914 915 #if NATA_PIOBM 916 if (xfer->c_flags & C_PIOBM) { 917 /* start the busmastering PIO */ 918 (*wdc->piobm_start)(wdc->dma_arg, 919 chp->ch_channel, xfer->c_drive, 920 xfer->c_skip, len, WDC_PIOBM_XFER_IRQ); 921 chp->ch_flags |= ATACH_DMA_WAIT | ATACH_IRQ_WAIT | 922 ATACH_PIOBM_WAIT; 923 return 1; 924 } 925 #endif 926 wdc->datain_pio(chp, drvp->drive_flags, 927 (char *)xfer->c_databuf + xfer->c_skip, len); 928 929 #if NATA_PIOBM 930 end_piobm_datain: 931 #endif 932 if (xfer->c_lenoff > 0) 933 wdcbit_bucket(chp, xfer->c_lenoff); 934 935 xfer->c_skip += len; 936 xfer->c_bcount -= len; 937 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 938 chp->ch_flags |= ATACH_IRQ_WAIT; 939 } 940 return 1; 941 942 case PHASE_ABORTED: 943 case PHASE_COMPLETED: 944 ATADEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR); 945 #if NATA_DMA 946 if (xfer->c_flags & C_DMA) { 947 xfer->c_bcount -= sc_xfer->datalen; 948 } 949 #endif 950 sc_xfer->resid = xfer->c_bcount; 951 wdc_atapi_phase_complete(xfer); 952 return(1); 953 954 default: 955 if (++retries<500) { 956 DELAY(100); 957 chp->ch_status = bus_space_read_1(wdr->cmd_iot, 958 wdr->cmd_iohs[wd_status], 0); 959 chp->ch_error = bus_space_read_1(wdr->cmd_iot, 960 wdr->cmd_iohs[wd_error], 0); 961 goto again; 962 } 963 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase); 964 if (chp->ch_status & WDCS_ERR) { 965 sc_xfer->error = XS_SHORTSENSE; 966 sc_xfer->sense.atapi_sense = chp->ch_error; 967 } else { 968 #if NATA_DMA 969 if (xfer->c_flags & C_DMA) { 970 ata_dmaerr(drvp, 971 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 972 } 973 #endif 974 sc_xfer->error = XS_RESET; 975 wdc_atapi_reset(chp, xfer); 976 return (1); 977 } 978 } 979 ATADEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x " 980 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense), 981 DEBUG_INTR); 982 wdc_atapi_done(chp, xfer); 983 return (1); 984 } 985 986 static void 987 wdc_atapi_phase_complete(struct ata_xfer *xfer) 988 { 989 struct ata_channel *chp = xfer->c_chp; 990 struct atac_softc *atac = chp->ch_atac; 991 #if NATA_DMA || NATA_PIOBM 992 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 993 #endif 994 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 995 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 996 997 /* wait for DSC if needed */ 998 if (drvp->drive_flags & ATA_DRIVE_ATAPIDSCW) { 999 ATADEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) " 1000 "polldsc %d\n", device_xname(atac->atac_dev), 1001 chp->ch_channel, 1002 xfer->c_drive, xfer->c_dscpoll), DEBUG_XFERS); 1003 #if 1 1004 if (cold) 1005 panic("wdc_atapi_phase_complete: cold"); 1006 #endif 1007 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10, 1008 AT_POLL) == WDCWAIT_TOUT) { 1009 /* 10ms not enough, try again in 1 tick */ 1010 if (xfer->c_dscpoll++ > 1011 mstohz(sc_xfer->timeout)) { 1012 printf("%s:%d:%d: wait_for_dsc " 1013 "failed\n", 1014 device_xname(atac->atac_dev), 1015 chp->ch_channel, xfer->c_drive); 1016 sc_xfer->error = XS_TIMEOUT; 1017 wdc_atapi_reset(chp, xfer); 1018 return; 1019 } else 1020 callout_reset(&chp->ch_callout, 1, 1021 wdc_atapi_polldsc, xfer); 1022 return; 1023 } 1024 } 1025 1026 /* 1027 * Some drive occasionally set WDCS_ERR with 1028 * "ATA illegal length indication" in the error 1029 * register. If we read some data the sense is valid 1030 * anyway, so don't report the error. 1031 */ 1032 if (chp->ch_status & WDCS_ERR && 1033 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 1034 sc_xfer->resid == sc_xfer->datalen)) { 1035 /* save the short sense */ 1036 sc_xfer->error = XS_SHORTSENSE; 1037 sc_xfer->sense.atapi_sense = chp->ch_error; 1038 if ((sc_xfer->xs_periph->periph_quirks & 1039 PQUIRK_NOSENSE) == 0) { 1040 /* ask scsipi to send a REQUEST_SENSE */ 1041 sc_xfer->error = XS_BUSY; 1042 sc_xfer->status = SCSI_CHECK; 1043 } 1044 #if NATA_DMA || NATA_PIOBM 1045 else if (wdc->dma_status & 1046 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) { 1047 #if NATA_DMA 1048 ata_dmaerr(drvp, 1049 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 1050 #endif 1051 sc_xfer->error = XS_RESET; 1052 wdc_atapi_reset(chp, xfer); 1053 return; 1054 } 1055 #endif 1056 } 1057 if (xfer->c_bcount != 0) { 1058 ATADEBUG_PRINT(("wdc_atapi_intr: bcount value is " 1059 "%d after io\n", xfer->c_bcount), DEBUG_XFERS); 1060 } 1061 #ifdef DIAGNOSTIC 1062 if (xfer->c_bcount < 0) { 1063 printf("wdc_atapi_intr warning: bcount value " 1064 "is %d after io\n", xfer->c_bcount); 1065 } 1066 #endif 1067 ATADEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), " 1068 "error 0x%x sense 0x%x\n", sc_xfer->error, 1069 sc_xfer->sense.atapi_sense), DEBUG_INTR); 1070 wdc_atapi_done(chp, xfer); 1071 } 1072 1073 static void 1074 wdc_atapi_done(struct ata_channel *chp, struct ata_xfer *xfer) 1075 { 1076 struct atac_softc *atac = chp->ch_atac; 1077 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1078 int drive = xfer->c_drive; 1079 1080 ATADEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n", 1081 device_xname(atac->atac_dev), chp->ch_channel, xfer->c_drive, 1082 (u_int)xfer->c_flags), DEBUG_XFERS); 1083 callout_stop(&chp->ch_callout); 1084 /* mark controller inactive and free the command */ 1085 chp->ch_queue->active_xfer = NULL; 1086 ata_free_xfer(chp, xfer); 1087 1088 if (chp->ch_drive[drive].drive_flags & ATA_DRIVE_WAITDRAIN) { 1089 sc_xfer->error = XS_DRIVER_STUFFUP; 1090 chp->ch_drive[drive].drive_flags &= ~ATA_DRIVE_WAITDRAIN; 1091 wakeup(&chp->ch_queue->active_xfer); 1092 } 1093 1094 ATADEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS); 1095 scsipi_done(sc_xfer); 1096 ATADEBUG_PRINT(("atastart from wdc_atapi_done, flags 0x%x\n", 1097 chp->ch_flags), DEBUG_XFERS); 1098 atastart(chp); 1099 } 1100 1101 static void 1102 wdc_atapi_reset(struct ata_channel *chp, struct ata_xfer *xfer) 1103 { 1104 struct atac_softc *atac = chp->ch_atac; 1105 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 1106 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 1107 1108 wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET); 1109 drvp->state = 0; 1110 if (wdc_wait_for_unbusy(chp, WDC_RESET_WAIT, AT_POLL) != 0) { 1111 printf("%s:%d:%d: reset failed\n", 1112 device_xname(atac->atac_dev), chp->ch_channel, 1113 xfer->c_drive); 1114 sc_xfer->error = XS_SELTIMEOUT; 1115 } 1116 wdc_atapi_done(chp, xfer); 1117 return; 1118 } 1119 1120 static void 1121 wdc_atapi_polldsc(void *arg) 1122 { 1123 1124 wdc_atapi_phase_complete(arg); 1125 } 1126
Indexes created Tue Sep 23 20:09:58 GMT 2025