atapi_wdc.c revision 1.139
1 /* $NetBSD: atapi_wdc.c,v 1.139 2021/04/24 23:36:58 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.139 2021/04/24 23:36:58 thorpej Exp $"); 29 30 #ifndef ATADEBUG 31 #define ATADEBUG 32 #endif /* ATADEBUG */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/file.h> 38 #include <sys/stat.h> 39 #include <sys/buf.h> 40 #include <sys/malloc.h> 41 #include <sys/device.h> 42 #include <sys/syslog.h> 43 #include <sys/proc.h> 44 #include <sys/dvdio.h> 45 46 #include <sys/intr.h> 47 #include <sys/bus.h> 48 49 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 50 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 51 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 52 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 53 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 54 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 55 56 #include <dev/ata/ataconf.h> 57 #include <dev/ata/atareg.h> 58 #include <dev/ata/atavar.h> 59 #include <dev/ic/wdcreg.h> 60 #include <dev/ic/wdcvar.h> 61 62 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 63 64 #define DEBUG_INTR 0x01 65 #define DEBUG_XFERS 0x02 66 #define DEBUG_STATUS 0x04 67 #define DEBUG_FUNCS 0x08 68 #define DEBUG_PROBE 0x10 69 #ifdef ATADEBUG 70 #ifndef ATADEBUG_ATAPI_MASK 71 #define ATADEBUG_ATAPI_MASK 0x0 72 #endif 73 int wdcdebug_atapi_mask = ATADEBUG_ATAPI_MASK; 74 #define ATADEBUG_PRINT(args, level) \ 75 if (wdcdebug_atapi_mask & (level)) \ 76 printf args 77 #else 78 #define ATADEBUG_PRINT(args, level) 79 #endif 80 81 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */ 82 #define ATAPI_MODE_DELAY 1000 /* 1s, timeout for SET_FEATYRE cmds */ 83 84 static int wdc_atapi_get_params(struct scsipi_channel *, int, 85 struct ataparams *); 86 static void wdc_atapi_probe_device(struct atapibus_softc *, int); 87 static void wdc_atapi_minphys (struct buf *bp); 88 static int wdc_atapi_start(struct ata_channel *,struct ata_xfer *); 89 static int wdc_atapi_intr(struct ata_channel *, struct ata_xfer *, int); 90 static void wdc_atapi_kill_xfer(struct ata_channel *, 91 struct ata_xfer *, int); 92 static void wdc_atapi_phase_complete(struct ata_xfer *, int); 93 static void wdc_atapi_poll(struct ata_channel *, struct ata_xfer *); 94 static void wdc_atapi_done(struct ata_channel *, struct ata_xfer *); 95 static void wdc_atapi_reset(struct ata_channel *, struct ata_xfer *); 96 static void wdc_atapi_scsipi_request(struct scsipi_channel *, 97 scsipi_adapter_req_t, void *); 98 static void wdc_atapi_kill_pending(struct scsipi_periph *); 99 static void wdc_atapi_polldsc(void *arg); 100 101 #define MAX_SIZE MAXPHYS 102 103 static const struct scsipi_bustype wdc_atapi_bustype = { 104 .bustype_type = SCSIPI_BUSTYPE_ATAPI, 105 .bustype_cmd = atapi_scsipi_cmd, 106 .bustype_interpret_sense = atapi_interpret_sense, 107 .bustype_printaddr = atapi_print_addr, 108 .bustype_kill_pending = wdc_atapi_kill_pending, 109 .bustype_async_event_xfer_mode = NULL, 110 }; 111 112 void 113 wdc_atapibus_attach(struct atabus_softc *ata_sc) 114 { 115 struct ata_channel *chp = ata_sc->sc_chan; 116 struct atac_softc *atac = chp->ch_atac; 117 struct scsipi_adapter *adapt = &atac->atac_atapi_adapter._generic; 118 struct scsipi_channel *chan = &chp->ch_atapi_channel; 119 120 /* 121 * Fill in the scsipi_adapter. 122 */ 123 adapt->adapt_dev = atac->atac_dev; 124 adapt->adapt_nchannels = atac->atac_nchannels; 125 adapt->adapt_request = wdc_atapi_scsipi_request; 126 adapt->adapt_minphys = wdc_atapi_minphys; 127 if (atac->atac_cap & ATAC_CAP_NOIRQ) 128 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY; 129 atac->atac_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device; 130 131 /* 132 * Fill in the scsipi_channel. 133 */ 134 memset(chan, 0, sizeof(*chan)); 135 chan->chan_adapter = adapt; 136 chan->chan_bustype = &wdc_atapi_bustype; 137 chan->chan_channel = chp->ch_channel; 138 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 139 chan->chan_openings = 1; 140 chan->chan_max_periph = 1; 141 chan->chan_ntargets = chp->ch_ndrives; 142 chan->chan_nluns = 1; 143 144 chp->atapibus = config_found(ata_sc->sc_dev, chan, atapiprint, 145 CFARG_IATTR, "atapi", 146 CFARG_EOL); 147 } 148 149 static void 150 wdc_atapi_minphys(struct buf *bp) 151 { 152 153 if (bp->b_bcount > MAX_SIZE) 154 bp->b_bcount = MAX_SIZE; 155 minphys(bp); 156 } 157 158 /* 159 * Kill off all pending xfers for a periph. 160 * 161 * Must be called with adapter lock held 162 */ 163 static void 164 wdc_atapi_kill_pending(struct scsipi_periph *periph) 165 { 166 struct atac_softc *atac = 167 device_private(periph->periph_channel->chan_adapter->adapt_dev); 168 struct ata_channel *chp = 169 atac->atac_channels[periph->periph_channel->chan_channel]; 170 171 ata_kill_pending(&chp->ch_drive[periph->periph_target]); 172 } 173 174 static void 175 wdc_atapi_kill_xfer(struct ata_channel *chp, struct ata_xfer *xfer, int reason) 176 { 177 struct scsipi_xfer *sc_xfer = xfer->c_scsipi; 178 bool deactivate = true; 179 180 /* remove this command from xfer queue */ 181 switch (reason) { 182 case KILL_GONE_INACTIVE: 183 deactivate = false; 184 /* FALLTHROUGH */ 185 case KILL_GONE: 186 sc_xfer->error = XS_DRIVER_STUFFUP; 187 break; 188 case KILL_RESET: 189 sc_xfer->error = XS_RESET; 190 break; 191 default: 192 printf("wdc_ata_bio_kill_xfer: unknown reason %d\n", 193 reason); 194 panic("wdc_ata_bio_kill_xfer"); 195 } 196 197 if (deactivate) 198 ata_deactivate_xfer(chp, xfer); 199 200 ata_free_xfer(chp, xfer); 201 scsipi_done(sc_xfer); 202 } 203 204 static int 205 wdc_atapi_get_params(struct scsipi_channel *chan, int drive, 206 struct ataparams *id) 207 { 208 struct wdc_softc *wdc = device_private(chan->chan_adapter->adapt_dev); 209 struct atac_softc *atac = &wdc->sc_atac; 210 struct wdc_regs *wdr = &wdc->regs[chan->chan_channel]; 211 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 212 struct ata_xfer *xfer; 213 int rv; 214 215 xfer = ata_get_xfer(chp, false); 216 if (xfer == NULL) { 217 printf("wdc_atapi_get_params: no xfer\n"); 218 return EBUSY; 219 } 220 221 xfer->c_ata_c.r_command = ATAPI_SOFT_RESET; 222 xfer->c_ata_c.r_st_bmask = 0; 223 xfer->c_ata_c.r_st_pmask = 0; 224 xfer->c_ata_c.flags = AT_WAIT | AT_POLL; 225 xfer->c_ata_c.timeout = WDC_RESET_WAIT; 226 227 wdc_exec_command(&chp->ch_drive[drive], xfer); 228 ata_wait_cmd(chp, xfer); 229 230 if (xfer->c_ata_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 231 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET " 232 "failed for drive %s:%d:%d: error 0x%x\n", 233 device_xname(atac->atac_dev), chp->ch_channel, drive, 234 xfer->c_ata_c.r_error), DEBUG_PROBE); 235 rv = -1; 236 goto out_xfer; 237 } 238 chp->ch_drive[drive].state = 0; 239 240 ata_free_xfer(chp, xfer); 241 242 (void)bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_status], 0); 243 244 /* Some ATAPI devices need a bit more time after software reset. */ 245 delay(5000); 246 if (ata_get_params(&chp->ch_drive[drive], AT_WAIT, id) != 0) { 247 ATADEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE " 248 "failed for drive %s:%d:%d\n", 249 device_xname(atac->atac_dev), chp->ch_channel, drive), 250 DEBUG_PROBE); 251 rv = -1; 252 goto out; 253 } 254 rv = 0; 255 out: 256 return rv; 257 258 out_xfer: 259 ata_free_xfer(chp, xfer); 260 return rv; 261 } 262 263 static void 264 wdc_atapi_probe_device(struct atapibus_softc *sc, int target) 265 { 266 struct scsipi_channel *chan = sc->sc_channel; 267 struct scsipi_periph *periph; 268 struct ataparams ids; 269 struct ataparams *id = &ids; 270 struct wdc_softc *wdc = device_private(chan->chan_adapter->adapt_dev); 271 struct atac_softc *atac = &wdc->sc_atac; 272 struct ata_channel *chp = atac->atac_channels[chan->chan_channel]; 273 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 274 struct scsipibus_attach_args sa; 275 char serial_number[21], model[41], firmware_revision[9]; 276 int s; 277 278 /* skip if already attached */ 279 if (scsipi_lookup_periph(chan, target, 0) != NULL) 280 return; 281 282 /* if no ATAPI device detected at wdc attach time, skip */ 283 if (drvp->drive_type != ATA_DRIVET_ATAPI) { 284 ATADEBUG_PRINT(("wdc_atapi_probe_device: " 285 "drive %d not present\n", target), DEBUG_PROBE); 286 return; 287 } 288 289 if (wdc_atapi_get_params(chan, target, id) == 0) { 290 #ifdef ATAPI_DEBUG_PROBE 291 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 292 device_xname(sc->sc_dev), target, 293 id->atap_config & ATAPI_CFG_CMD_MASK, 294 id->atap_config & ATAPI_CFG_DRQ_MASK); 295 #endif 296 periph = scsipi_alloc_periph(M_WAITOK); 297 periph->periph_dev = NULL; 298 periph->periph_channel = chan; 299 periph->periph_switch = &atapi_probe_periphsw; 300 periph->periph_target = target; 301 periph->periph_lun = 0; 302 periph->periph_quirks = PQUIRK_ONLYBIG; 303 304 #ifdef SCSIPI_DEBUG 305 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 306 SCSIPI_DEBUG_TARGET == target) 307 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 308 #endif 309 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 310 if (id->atap_config & ATAPI_CFG_REMOV) 311 periph->periph_flags |= PERIPH_REMOVABLE; 312 if (periph->periph_type == T_SEQUENTIAL) { 313 s = splbio(); 314 drvp->drive_flags |= ATA_DRIVE_ATAPIDSCW; 315 splx(s); 316 } 317 318 sa.sa_periph = periph; 319 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 320 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 321 T_REMOV : T_FIXED; 322 strnvisx(model, sizeof(model), id->atap_model, 323 sizeof(id->atap_model), VIS_TRIM|VIS_SAFE|VIS_OCTAL); 324 strnvisx(serial_number, sizeof(serial_number), 325 id->atap_serial, sizeof(id->atap_serial), 326 VIS_TRIM|VIS_SAFE|VIS_OCTAL); 327 strnvisx(firmware_revision, sizeof(firmware_revision), 328 id->atap_revision, sizeof(id->atap_revision), 329 VIS_TRIM|VIS_SAFE|VIS_OCTAL); 330 sa.sa_inqbuf.vendor = model; 331 sa.sa_inqbuf.product = serial_number; 332 sa.sa_inqbuf.revision = firmware_revision; 333 334 /* 335 * Determine the operating mode capabilities of the device. 336 */ 337 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16) 338 periph->periph_cap |= PERIPH_CAP_CMD16; 339 /* XXX This is gross. */ 340 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 341 342 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 343 344 if (drvp->drv_softc) 345 ata_probe_caps(drvp); 346 else { 347 s = splbio(); 348 drvp->drive_type = ATA_DRIVET_NONE; 349 splx(s); 350 } 351 } else { 352 s = splbio(); 353 drvp->drive_type = ATA_DRIVET_NONE; 354 splx(s); 355 } 356 } 357 358 static const struct ata_xfer_ops wdc_atapi_xfer_ops = { 359 .c_start = wdc_atapi_start, 360 .c_intr = wdc_atapi_intr, 361 .c_poll = wdc_atapi_poll, 362 .c_abort = wdc_atapi_reset, 363 .c_kill_xfer = wdc_atapi_kill_xfer, 364 }; 365 366 static void 367 wdc_atapi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 368 void *arg) 369 { 370 struct scsipi_adapter *adapt = chan->chan_adapter; 371 struct scsipi_periph *periph; 372 struct scsipi_xfer *sc_xfer; 373 struct wdc_softc *wdc = device_private(adapt->adapt_dev); 374 struct atac_softc *atac = &wdc->sc_atac; 375 struct ata_xfer *xfer; 376 int channel = chan->chan_channel; 377 int drive, s; 378 379 switch (req) { 380 case ADAPTER_REQ_RUN_XFER: 381 sc_xfer = arg; 382 periph = sc_xfer->xs_periph; 383 drive = periph->periph_target; 384 385 ATADEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n", 386 device_xname(atac->atac_dev), channel, drive), 387 DEBUG_XFERS); 388 if (!device_is_active(atac->atac_dev)) { 389 sc_xfer->error = XS_DRIVER_STUFFUP; 390 scsipi_done(sc_xfer); 391 return; 392 } 393 394 xfer = ata_get_xfer(atac->atac_channels[channel], false); 395 if (xfer == NULL) { 396 sc_xfer->error = XS_RESOURCE_SHORTAGE; 397 scsipi_done(sc_xfer); 398 return; 399 } 400 401 if (sc_xfer->xs_control & XS_CTL_POLL) 402 xfer->c_flags |= C_POLL; 403 #if NATA_DMA 404 if ((atac->atac_channels[channel]->ch_drive[drive].drive_flags & 405 (ATA_DRIVE_DMA | ATA_DRIVE_UDMA)) && sc_xfer->datalen > 0) 406 xfer->c_flags |= C_DMA; 407 #endif 408 #if NATA_DMA && NATA_PIOBM 409 else 410 #endif 411 #if NATA_PIOBM 412 if ((atac->atac_cap & ATAC_CAP_PIOBM) && 413 sc_xfer->datalen > 0) 414 xfer->c_flags |= C_PIOBM; 415 #endif 416 xfer->c_drive = drive; 417 xfer->c_flags |= C_ATAPI; 418 #if NATA_DMA 419 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY || 420 sc_xfer->cmd->opcode == GPCMD_SEND_KEY || 421 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) { 422 /* 423 * DVD authentication commands must always be done in 424 * PIO mode. 425 */ 426 xfer->c_flags &= ~C_DMA; 427 } 428 429 /* 430 * DMA normally can't deal with transfers which are not a 431 * multiple of its databus width. It's a bug to request odd 432 * length transfers for ATAPI. 433 * 434 * Some devices also can't cope with unaligned DMA xfers 435 * either. Also some devices seem to not handle DMA xfers of 436 * less than 4 bytes. 437 * 438 * By enforcing at least 4 byte aligned offset and length for 439 * DMA, we might use PIO where DMA could be allowed but better 440 * safe than sorry as recent problems proved. 441 * 442 * Offending structures that are thus done by PIO instead of 443 * DMA are normally small structures since all bulkdata is 444 * aligned. But as the request may come from userland, we have 445 * to protect against it anyway. 446 * 447 * XXX check for the 32 bit wide flag? 448 */ 449 450 if (((uintptr_t) sc_xfer->data) & 0x03) 451 xfer->c_flags &= ~C_DMA; 452 if ((sc_xfer->datalen < 4) || (sc_xfer->datalen & 0x03)) 453 xfer->c_flags &= ~C_DMA; 454 #endif /* NATA_DMA */ 455 456 xfer->c_databuf = sc_xfer->data; 457 xfer->c_bcount = sc_xfer->datalen; 458 xfer->ops = &wdc_atapi_xfer_ops; 459 xfer->c_scsipi = sc_xfer; 460 xfer->c_atapi.c_dscpoll = 0; 461 s = splbio(); 462 ata_exec_xfer(atac->atac_channels[channel], xfer); 463 #ifdef DIAGNOSTIC 464 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 465 (sc_xfer->xs_status & XS_STS_DONE) == 0) 466 panic("wdc_atapi_scsipi_request: polled command " 467 "not done"); 468 #endif 469 splx(s); 470 return; 471 472 default: 473 /* Not supported, nothing to do. */ 474 ; 475 } 476 } 477 478 static int 479 wdc_atapi_start(struct ata_channel *chp, struct ata_xfer *xfer) 480 { 481 struct atac_softc *atac = chp->ch_atac; 482 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 483 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 484 struct scsipi_xfer *sc_xfer = xfer->c_scsipi; 485 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 486 int wait_flags = (sc_xfer->xs_control & XS_CTL_POLL) ? AT_POLL : 0; 487 int tfd; 488 const char *errstring; 489 490 ATADEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n", 491 device_xname(atac->atac_dev), chp->ch_channel, drvp->drive, 492 sc_xfer->xs_control), DEBUG_XFERS); 493 494 ata_channel_lock_owned(chp); 495 496 #if NATA_DMA 497 if ((xfer->c_flags & C_DMA) && (drvp->n_xfers <= NXFER)) 498 drvp->n_xfers++; 499 #endif 500 /* Do control operations specially. */ 501 if (__predict_false(drvp->state < READY)) { 502 /* If it's not a polled command, we need the kernel thread */ 503 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0 504 && !ata_is_thread_run(chp)) 505 return ATASTART_TH; 506 /* 507 * disable interrupts, all commands here should be quick 508 * enough to be able to poll, and we don't go here that often 509 */ 510 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 511 WDCTL_4BIT | WDCTL_IDS); 512 if (wdc->select) 513 wdc->select(chp, xfer->c_drive); 514 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 515 WDSD_IBM | (xfer->c_drive << 4)); 516 /* Don't try to set mode if controller can't be adjusted */ 517 if (atac->atac_set_modes == NULL) 518 goto ready; 519 /* Also don't try if the drive didn't report its mode */ 520 if ((drvp->drive_flags & ATA_DRIVE_MODE) == 0) 521 goto ready; 522 errstring = "unbusy"; 523 if (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags, &tfd)) 524 goto timeout; 525 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 526 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 527 errstring = "piomode"; 528 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags, 529 &tfd)) 530 goto timeout; 531 if (ATACH_ST(tfd) & WDCS_ERR) { 532 if (ATACH_ST(tfd) == WDCE_ABRT) { 533 /* 534 * Some ATAPI drives reject PIO settings. 535 * Fall back to PIO mode 3 since that's the 536 * minimum for ATAPI. 537 */ 538 printf("%s:%d:%d: PIO mode %d rejected, " 539 "falling back to PIO mode 3\n", 540 device_xname(atac->atac_dev), 541 chp->ch_channel, xfer->c_drive, 542 drvp->PIO_mode); 543 if (drvp->PIO_mode > 3) 544 drvp->PIO_mode = 3; 545 } else 546 goto error; 547 } 548 #if NATA_DMA 549 #if NATA_UDMA 550 if (drvp->drive_flags & ATA_DRIVE_UDMA) { 551 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 552 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 553 } else 554 #endif 555 if (drvp->drive_flags & ATA_DRIVE_DMA) { 556 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 557 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 558 } else { 559 goto ready; 560 } 561 errstring = "dmamode"; 562 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags, 563 &tfd)) 564 goto timeout; 565 if (ATACH_ST(tfd) & WDCS_ERR) { 566 if (ATACH_ERR(tfd) == WDCE_ABRT) { 567 #if NATA_UDMA 568 if (drvp->drive_flags & ATA_DRIVE_UDMA) 569 goto error; 570 else 571 #endif 572 { 573 /* 574 * The drive rejected our DMA setting. 575 * Fall back to mode 1. 576 */ 577 printf("%s:%d:%d: DMA mode %d rejected, " 578 "falling back to DMA mode 0\n", 579 device_xname(atac->atac_dev), 580 chp->ch_channel, xfer->c_drive, 581 drvp->DMA_mode); 582 if (drvp->DMA_mode > 0) 583 drvp->DMA_mode = 0; 584 } 585 } else 586 goto error; 587 } 588 #endif /* NATA_DMA */ 589 ready: 590 drvp->state = READY; 591 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, 592 WDCTL_4BIT); 593 delay(10); /* some drives need a little delay here */ 594 } 595 /* start timeout machinery */ 596 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 597 callout_reset(&chp->c_timo_callout, mstohz(sc_xfer->timeout), 598 wdctimeout, chp); 599 600 if (wdc->select) 601 wdc->select(chp, xfer->c_drive); 602 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 603 WDSD_IBM | (xfer->c_drive << 4)); 604 switch (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags, &tfd)) { 605 case WDCWAIT_OK: 606 break; 607 case WDCWAIT_TOUT: 608 printf("wdc_atapi_start: not ready, st = %02x\n", 609 ATACH_ST(tfd)); 610 sc_xfer->error = XS_TIMEOUT; 611 return ATASTART_ABORT; 612 case WDCWAIT_THR: 613 return ATASTART_TH; 614 } 615 616 /* 617 * Even with WDCS_ERR, the device should accept a command packet 618 * Limit length to what can be stuffed into the cylinder register 619 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536, 620 * but not all devices do that and it's not obvious from the 621 * ATAPI spec that that behaviour should be expected. If more 622 * data is necessary, multiple data transfer phases will be done. 623 */ 624 625 wdccommand(chp, xfer->c_drive, ATAPI_PKT_CMD, 626 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff, 627 0, 0, 0, 628 #if NATA_DMA 629 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 630 #endif 631 0 632 ); 633 634 #if NATA_PIOBM 635 if (xfer->c_flags & C_PIOBM) { 636 int error; 637 int dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 638 ? WDC_DMA_READ : 0; 639 if (xfer->c_flags & C_POLL) { 640 /* XXX not supported yet --- fall back to PIO */ 641 xfer->c_flags &= ~C_PIOBM; 642 } else { 643 /* Init the DMA channel. */ 644 error = (*wdc->dma_init)(wdc->dma_arg, 645 chp->ch_channel, xfer->c_drive, 646 (char *)xfer->c_databuf, 647 xfer->c_bcount, 648 dma_flags | WDC_DMA_PIOBM_ATAPI); 649 if (error) { 650 if (error == EINVAL) { 651 /* 652 * We can't do DMA on this transfer 653 * for some reason. Fall back to 654 * PIO. 655 */ 656 xfer->c_flags &= ~C_PIOBM; 657 error = 0; 658 } else { 659 sc_xfer->error = XS_DRIVER_STUFFUP; 660 errstring = "piobm"; 661 goto error; 662 } 663 } 664 } 665 } 666 #endif 667 /* 668 * If there is no interrupt for CMD input, busy-wait for it (done in 669 * the interrupt routine. Poll routine will exit early in this case. 670 */ 671 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) != 672 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) 673 return ATASTART_POLL; 674 else { 675 chp->ch_flags |= ATACH_IRQ_WAIT; 676 return ATASTART_STARTED; 677 } 678 679 timeout: 680 printf("%s:%d:%d: %s timed out\n", 681 device_xname(atac->atac_dev), chp->ch_channel, xfer->c_drive, 682 errstring); 683 sc_xfer->error = XS_TIMEOUT; 684 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 685 delay(10); /* some drives need a little delay here */ 686 return ATASTART_ABORT; 687 688 error: 689 printf("%s:%d:%d: %s ", 690 device_xname(atac->atac_dev), chp->ch_channel, xfer->c_drive, 691 errstring); 692 printf("error (0x%x)\n", ATACH_ERR(tfd)); 693 sc_xfer->error = XS_SHORTSENSE; 694 sc_xfer->sense.atapi_sense = ATACH_ERR(tfd); 695 bus_space_write_1(wdr->ctl_iot, wdr->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 696 delay(10); /* some drives need a little delay here */ 697 return ATASTART_ABORT; 698 } 699 700 static void 701 wdc_atapi_poll(struct ata_channel *chp, struct ata_xfer *xfer) 702 { 703 /* 704 * If there is no interrupt for CMD input, busy-wait for it (done in 705 * the interrupt routine. If it is a polled command, call the interrupt 706 * routine until command is done. 707 */ 708 const bool poll = ((xfer->c_scsipi->xs_control & XS_CTL_POLL) != 0); 709 710 /* Wait for at last 400ns for status bit to be valid */ 711 DELAY(1); 712 wdc_atapi_intr(chp, xfer, 0); 713 714 if (!poll) 715 return; 716 717 #if NATA_DMA 718 if (chp->ch_flags & ATACH_DMA_WAIT) { 719 wdc_dmawait(chp, xfer, xfer->c_scsipi->timeout); 720 chp->ch_flags &= ~ATACH_DMA_WAIT; 721 } 722 #endif 723 while ((xfer->c_scsipi->xs_status & XS_STS_DONE) == 0) { 724 /* Wait for at last 400ns for status bit to be valid */ 725 DELAY(1); 726 wdc_atapi_intr(chp, xfer, 0); 727 } 728 } 729 730 static int 731 wdc_atapi_intr(struct ata_channel *chp, struct ata_xfer *xfer, int irq) 732 { 733 struct atac_softc *atac = chp->ch_atac; 734 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 735 struct wdc_regs *wdr = &wdc->regs[chp->ch_channel]; 736 struct scsipi_xfer *sc_xfer = xfer->c_scsipi; 737 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 738 int len, phase, i, retries=0; 739 int ire, tfd; 740 #if NATA_DMA 741 int error; 742 #endif 743 #if NATA_DMA || NATA_PIOBM 744 int dma_flags = 0; 745 #endif 746 void *cmd; 747 748 ATADEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n", 749 device_xname(atac->atac_dev), chp->ch_channel, drvp->drive), 750 DEBUG_INTR); 751 752 ata_channel_lock(chp); 753 754 /* Is it not a transfer, but a control operation? */ 755 if (drvp->state < READY) { 756 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n", 757 device_xname(atac->atac_dev), chp->ch_channel, 758 xfer->c_drive, drvp->state); 759 panic("wdc_atapi_intr: bad state"); 760 } 761 /* 762 * If we missed an interrupt in a PIO transfer, reset and restart. 763 * Don't try to continue transfer, we may have missed cycles. 764 */ 765 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 766 ata_channel_unlock(chp); 767 sc_xfer->error = XS_TIMEOUT; 768 wdc_atapi_reset(chp, xfer); 769 return 1; 770 } 771 772 #if NATA_PIOBM 773 /* Transfer-done interrupt for busmastering PIO operation */ 774 if ((xfer->c_flags & C_PIOBM) && (chp->ch_flags & ATACH_PIOBM_WAIT)) { 775 chp->ch_flags &= ~ATACH_PIOBM_WAIT; 776 777 /* restore transfer length */ 778 len = xfer->c_bcount; 779 if (xfer->c_atapi.c_lenoff < 0) 780 len += xfer->c_atapi.c_lenoff; 781 782 if (sc_xfer->xs_control & XS_CTL_DATA_IN) 783 goto end_piobm_datain; 784 else 785 goto end_piobm_dataout; 786 } 787 #endif 788 789 /* Ack interrupt done in wdc_wait_for_unbusy */ 790 if (wdc->select) 791 wdc->select(chp, xfer->c_drive); 792 bus_space_write_1(wdr->cmd_iot, wdr->cmd_iohs[wd_sdh], 0, 793 WDSD_IBM | (xfer->c_drive << 4)); 794 if (wdc_wait_for_unbusy(chp, 795 (irq == 0) ? sc_xfer->timeout : 0, AT_POLL, &tfd) == WDCWAIT_TOUT) { 796 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 797 ata_channel_unlock(chp); 798 return 0; /* IRQ was not for us */ 799 } 800 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n", 801 device_xname(atac->atac_dev), chp->ch_channel, 802 xfer->c_drive, xfer->c_bcount, xfer->c_skip); 803 #if NATA_DMA 804 if (xfer->c_flags & C_DMA) { 805 ata_dmaerr(drvp, 806 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 807 } 808 #endif 809 sc_xfer->error = XS_TIMEOUT; 810 ata_channel_unlock(chp); 811 wdc_atapi_reset(chp, xfer); 812 return 1; 813 } 814 if (wdc->irqack) 815 wdc->irqack(chp); 816 817 #if NATA_DMA 818 /* 819 * If we missed an IRQ and were using DMA, flag it as a DMA error 820 * and reset device. 821 */ 822 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) { 823 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 824 sc_xfer->error = XS_RESET; 825 ata_channel_unlock(chp); 826 wdc_atapi_reset(chp, xfer); 827 return (1); 828 } 829 #endif 830 /* 831 * if the request sense command was aborted, report the short sense 832 * previously recorded, else continue normal processing 833 */ 834 835 #if NATA_DMA || NATA_PIOBM 836 if (xfer->c_flags & (C_DMA | C_PIOBM)) 837 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 838 ? WDC_DMA_READ : 0; 839 #endif 840 again: 841 len = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_lo], 0) + 842 256 * bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_cyl_hi], 0); 843 ire = bus_space_read_1(wdr->cmd_iot, wdr->cmd_iohs[wd_ireason], 0); 844 phase = (ire & (WDCI_CMD | WDCI_IN)) | (ATACH_ST(tfd) & WDCS_DRQ); 845 ATADEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x " 846 "ire 0x%x :", xfer->c_bcount, 847 len, ATACH_ST(tfd), ATACH_ERR(tfd), ire), DEBUG_INTR); 848 849 switch (phase) { 850 case PHASE_CMDOUT: 851 cmd = sc_xfer->cmd; 852 ATADEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR); 853 #if NATA_DMA 854 /* Init the DMA channel if necessary */ 855 if (xfer->c_flags & C_DMA) { 856 error = (*wdc->dma_init)(wdc->dma_arg, 857 chp->ch_channel, xfer->c_drive, 858 xfer->c_databuf, xfer->c_bcount, dma_flags); 859 if (error) { 860 if (error == EINVAL) { 861 /* 862 * We can't do DMA on this transfer 863 * for some reason. Fall back to 864 * PIO. 865 */ 866 xfer->c_flags &= ~C_DMA; 867 error = 0; 868 } else { 869 sc_xfer->error = XS_DRIVER_STUFFUP; 870 break; 871 } 872 } 873 } 874 #endif 875 876 /* send packet command */ 877 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */ 878 wdc->dataout_pio(chp, drvp->drive_flags, cmd, sc_xfer->cmdlen); 879 880 #if NATA_DMA 881 /* Start the DMA channel if necessary */ 882 if (xfer->c_flags & C_DMA) { 883 (*wdc->dma_start)(wdc->dma_arg, 884 chp->ch_channel, xfer->c_drive); 885 chp->ch_flags |= ATACH_DMA_WAIT; 886 } 887 #endif 888 889 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 890 chp->ch_flags |= ATACH_IRQ_WAIT; 891 } 892 893 ata_channel_unlock(chp); 894 return 1; 895 896 case PHASE_DATAOUT: 897 /* write data */ 898 ATADEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR); 899 #if NATA_DMA 900 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 || 901 (xfer->c_flags & C_DMA) != 0) { 902 printf("wdc_atapi_intr: bad data phase DATAOUT\n"); 903 if (xfer->c_flags & C_DMA) { 904 ata_dmaerr(drvp, 905 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 906 } 907 sc_xfer->error = XS_TIMEOUT; 908 ata_channel_unlock(chp); 909 wdc_atapi_reset(chp, xfer); 910 return 1; 911 } 912 #endif 913 xfer->c_atapi.c_lenoff = len - xfer->c_bcount; 914 if (xfer->c_bcount < len) { 915 printf("wdc_atapi_intr: warning: write only " 916 "%d of %d requested bytes\n", xfer->c_bcount, len); 917 len = xfer->c_bcount; 918 } 919 920 #if NATA_PIOBM 921 if (xfer->c_flags & C_PIOBM) { 922 /* start the busmastering PIO */ 923 (*wdc->piobm_start)(wdc->dma_arg, 924 chp->ch_channel, xfer->c_drive, 925 xfer->c_skip, len, WDC_PIOBM_XFER_IRQ); 926 chp->ch_flags |= ATACH_DMA_WAIT | ATACH_IRQ_WAIT | 927 ATACH_PIOBM_WAIT; 928 ata_channel_unlock(chp); 929 return 1; 930 } 931 #endif 932 wdc->dataout_pio(chp, drvp->drive_flags, 933 (char *)xfer->c_databuf + xfer->c_skip, len); 934 935 #if NATA_PIOBM 936 end_piobm_dataout: 937 #endif 938 for (i = xfer->c_atapi.c_lenoff; i > 0; i -= 2) 939 bus_space_write_2(wdr->cmd_iot, 940 wdr->cmd_iohs[wd_data], 0, 0); 941 942 xfer->c_skip += len; 943 xfer->c_bcount -= len; 944 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 945 chp->ch_flags |= ATACH_IRQ_WAIT; 946 } 947 ata_channel_unlock(chp); 948 return 1; 949 950 case PHASE_DATAIN: 951 /* Read data */ 952 ATADEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR); 953 #if NATA_DMA 954 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 || 955 (xfer->c_flags & C_DMA) != 0) { 956 printf("wdc_atapi_intr: bad data phase DATAIN\n"); 957 if (xfer->c_flags & C_DMA) { 958 ata_dmaerr(drvp, 959 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 960 } 961 sc_xfer->error = XS_TIMEOUT; 962 ata_channel_unlock(chp); 963 wdc_atapi_reset(chp, xfer); 964 return 1; 965 } 966 #endif 967 xfer->c_atapi.c_lenoff = len - xfer->c_bcount; 968 if (xfer->c_bcount < len) { 969 printf("wdc_atapi_intr: warning: reading only " 970 "%d of %d bytes\n", xfer->c_bcount, len); 971 len = xfer->c_bcount; 972 } 973 974 #if NATA_PIOBM 975 if (xfer->c_flags & C_PIOBM) { 976 /* start the busmastering PIO */ 977 (*wdc->piobm_start)(wdc->dma_arg, 978 chp->ch_channel, xfer->c_drive, 979 xfer->c_skip, len, WDC_PIOBM_XFER_IRQ); 980 chp->ch_flags |= ATACH_DMA_WAIT | ATACH_IRQ_WAIT | 981 ATACH_PIOBM_WAIT; 982 ata_channel_unlock(chp); 983 return 1; 984 } 985 #endif 986 wdc->datain_pio(chp, drvp->drive_flags, 987 (char *)xfer->c_databuf + xfer->c_skip, len); 988 989 #if NATA_PIOBM 990 end_piobm_datain: 991 #endif 992 if (xfer->c_atapi.c_lenoff > 0) 993 wdcbit_bucket(chp, xfer->c_atapi.c_lenoff); 994 995 xfer->c_skip += len; 996 xfer->c_bcount -= len; 997 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 998 chp->ch_flags |= ATACH_IRQ_WAIT; 999 } 1000 ata_channel_unlock(chp); 1001 return 1; 1002 1003 case PHASE_ABORTED: 1004 case PHASE_COMPLETED: 1005 ATADEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR); 1006 #if NATA_DMA 1007 if (xfer->c_flags & C_DMA) { 1008 xfer->c_bcount -= sc_xfer->datalen; 1009 } 1010 #endif 1011 sc_xfer->resid = xfer->c_bcount; 1012 /* this will unlock channel lock too */ 1013 wdc_atapi_phase_complete(xfer, tfd); 1014 return(1); 1015 1016 default: 1017 if (++retries<500) { 1018 DELAY(100); 1019 tfd = ATACH_ERR_ST( 1020 bus_space_read_1(wdr->cmd_iot, 1021 wdr->cmd_iohs[wd_error], 0), 1022 bus_space_read_1(wdr->cmd_iot, 1023 wdr->cmd_iohs[wd_status], 0) 1024 ); 1025 goto again; 1026 } 1027 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase); 1028 if (ATACH_ST(tfd) & WDCS_ERR) { 1029 sc_xfer->error = XS_SHORTSENSE; 1030 sc_xfer->sense.atapi_sense = ATACH_ERR(tfd); 1031 } else { 1032 #if NATA_DMA 1033 if (xfer->c_flags & C_DMA) { 1034 ata_dmaerr(drvp, 1035 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 1036 } 1037 #endif 1038 sc_xfer->error = XS_RESET; 1039 ata_channel_unlock(chp); 1040 wdc_atapi_reset(chp, xfer); 1041 return (1); 1042 } 1043 } 1044 ATADEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x " 1045 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense), 1046 DEBUG_INTR); 1047 ata_channel_unlock(chp); 1048 wdc_atapi_done(chp, xfer); 1049 return (1); 1050 } 1051 1052 static void 1053 wdc_atapi_phase_complete(struct ata_xfer *xfer, int tfd) 1054 { 1055 struct ata_channel *chp = xfer->c_chp; 1056 struct atac_softc *atac = chp->ch_atac; 1057 #if NATA_DMA || NATA_PIOBM 1058 struct wdc_softc *wdc = CHAN_TO_WDC(chp); 1059 #endif 1060 struct scsipi_xfer *sc_xfer = xfer->c_scsipi; 1061 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 1062 1063 ata_channel_lock_owned(chp); 1064 1065 /* wait for DSC if needed */ 1066 if (drvp->drive_flags & ATA_DRIVE_ATAPIDSCW) { 1067 ATADEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) " 1068 "polldsc %d\n", device_xname(atac->atac_dev), 1069 chp->ch_channel, 1070 xfer->c_drive, xfer->c_atapi.c_dscpoll), DEBUG_XFERS); 1071 #if 1 1072 if (cold) 1073 panic("wdc_atapi_phase_complete: cold"); 1074 #endif 1075 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10, 1076 AT_POLL, &tfd) == WDCWAIT_TOUT) { 1077 /* 10ms not enough, try again in 1 tick */ 1078 if (xfer->c_atapi.c_dscpoll++ > 1079 mstohz(sc_xfer->timeout)) { 1080 printf("%s:%d:%d: wait_for_dsc " 1081 "failed\n", 1082 device_xname(atac->atac_dev), 1083 chp->ch_channel, xfer->c_drive); 1084 ata_channel_unlock(chp); 1085 sc_xfer->error = XS_TIMEOUT; 1086 wdc_atapi_reset(chp, xfer); 1087 } else { 1088 callout_reset(&chp->c_timo_callout, 1, 1089 wdc_atapi_polldsc, chp); 1090 ata_channel_unlock(chp); 1091 } 1092 return; 1093 } 1094 } 1095 1096 /* 1097 * Some drive occasionally set WDCS_ERR with 1098 * "ATA illegal length indication" in the error 1099 * register. If we read some data the sense is valid 1100 * anyway, so don't report the error. 1101 */ 1102 if (ATACH_ST(tfd) & WDCS_ERR && 1103 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 1104 sc_xfer->resid == sc_xfer->datalen)) { 1105 /* save the short sense */ 1106 sc_xfer->error = XS_SHORTSENSE; 1107 sc_xfer->sense.atapi_sense = ATACH_ERR(tfd); 1108 if ((sc_xfer->xs_periph->periph_quirks & 1109 PQUIRK_NOSENSE) == 0) { 1110 /* ask scsipi to send a REQUEST_SENSE */ 1111 sc_xfer->error = XS_BUSY; 1112 sc_xfer->status = SCSI_CHECK; 1113 } 1114 #if NATA_DMA || NATA_PIOBM 1115 else if (wdc->dma_status & 1116 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) { 1117 #if NATA_DMA 1118 ata_dmaerr(drvp, 1119 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 1120 #endif 1121 sc_xfer->error = XS_RESET; 1122 ata_channel_unlock(chp); 1123 wdc_atapi_reset(chp, xfer); 1124 return; 1125 } 1126 #endif 1127 } 1128 if (xfer->c_bcount != 0) { 1129 ATADEBUG_PRINT(("wdc_atapi_intr: bcount value is " 1130 "%d after io\n", xfer->c_bcount), DEBUG_XFERS); 1131 } 1132 #ifdef DIAGNOSTIC 1133 if (xfer->c_bcount < 0) { 1134 printf("wdc_atapi_intr warning: bcount value " 1135 "is %d after io\n", xfer->c_bcount); 1136 } 1137 #endif 1138 ATADEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), " 1139 "error 0x%x sense 0x%x\n", sc_xfer->error, 1140 sc_xfer->sense.atapi_sense), DEBUG_INTR); 1141 ata_channel_unlock(chp); 1142 wdc_atapi_done(chp, xfer); 1143 } 1144 1145 static void 1146 wdc_atapi_done(struct ata_channel *chp, struct ata_xfer *xfer) 1147 { 1148 struct atac_softc *atac = chp->ch_atac; 1149 struct scsipi_xfer *sc_xfer = xfer->c_scsipi; 1150 1151 ATADEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n", 1152 device_xname(atac->atac_dev), chp->ch_channel, xfer->c_drive, 1153 (u_int)xfer->c_flags), DEBUG_XFERS); 1154 1155 if (ata_waitdrain_xfer_check(chp, xfer)) 1156 return; 1157 1158 ata_deactivate_xfer(chp, xfer); 1159 ata_free_xfer(chp, xfer); 1160 1161 ATADEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS); 1162 scsipi_done(sc_xfer); 1163 ATADEBUG_PRINT(("atastart from wdc_atapi_done, flags 0x%x\n", 1164 chp->ch_flags), DEBUG_XFERS); 1165 atastart(chp); 1166 } 1167 1168 static void 1169 wdc_atapi_reset(struct ata_channel *chp, struct ata_xfer *xfer) 1170 { 1171 struct atac_softc *atac = chp->ch_atac; 1172 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 1173 struct scsipi_xfer *sc_xfer = xfer->c_scsipi; 1174 int tfd; 1175 1176 ata_channel_lock(chp); 1177 wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET); 1178 drvp->state = 0; 1179 if (wdc_wait_for_unbusy(chp, WDC_RESET_WAIT, AT_POLL, &tfd) != 0) { 1180 printf("%s:%d:%d: reset failed\n", 1181 device_xname(atac->atac_dev), chp->ch_channel, 1182 xfer->c_drive); 1183 sc_xfer->error = XS_SELTIMEOUT; 1184 } 1185 ata_channel_unlock(chp); 1186 wdc_atapi_done(chp, xfer); 1187 return; 1188 } 1189 1190 static void 1191 wdc_atapi_polldsc(void *arg) 1192 { 1193 struct ata_channel *chp = arg; 1194 struct ata_xfer *xfer = ata_queue_get_active_xfer(chp); 1195 1196 KASSERT(xfer != NULL); 1197 1198 ata_channel_lock(chp); 1199 1200 /* this will unlock channel lock too */ 1201 wdc_atapi_phase_complete(xfer, 0); 1202 } 1203
Indexes created Wed Sep 24 05:09:52 GMT 2025