atapi_wdc.c revision 1.30 1 /* $NetBSD: atapi_wdc.c,v 1.30 2000/01/17 00:01:01 bouyer Exp $ */
2
3 /*
4 * Copyright (c) 1998 Manuel Bouyer.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by the University of
17 * California, Berkeley and its contributors.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32 * SUCH DAMAGE.
33 *
34 */
35
36 #ifndef WDCDEBUG
37 #define WDCDEBUG
38 #endif /* WDCDEBUG */
39
40 #include <sys/param.h>
41 #include <sys/systm.h>
42 #include <sys/kernel.h>
43 #include <sys/file.h>
44 #include <sys/stat.h>
45 #include <sys/buf.h>
46 #include <sys/malloc.h>
47 #include <sys/device.h>
48 #include <sys/syslog.h>
49 #include <sys/proc.h>
50
51 #include <vm/vm.h>
52
53 #include <machine/intr.h>
54 #include <machine/bus.h>
55
56 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
57 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
58 #define bus_space_write_multi_stream_4 bus_space_write_multi_4
59 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
60 #define bus_space_read_multi_stream_4 bus_space_read_multi_4
61 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
62
63 #include <dev/ata/atareg.h>
64 #include <dev/ata/atavar.h>
65 #include <dev/ic/wdcreg.h>
66 #include <dev/ic/wdcvar.h>
67 #include <dev/scsipi/scsipi_all.h>
68 #include <dev/scsipi/scsipiconf.h>
69 #include <dev/scsipi/atapiconf.h>
70
71 #define DEBUG_INTR 0x01
72 #define DEBUG_XFERS 0x02
73 #define DEBUG_STATUS 0x04
74 #define DEBUG_FUNCS 0x08
75 #define DEBUG_PROBE 0x10
76 #ifdef WDCDEBUG
77 int wdcdebug_atapi_mask = 0;
78 #define WDCDEBUG_PRINT(args, level) \
79 if (wdcdebug_atapi_mask & (level)) \
80 printf args
81 #else
82 #define WDCDEBUG_PRINT(args, level)
83 #endif
84
85 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */
86
87 void wdc_atapi_minphys __P((struct buf *bp));
88 void wdc_atapi_start __P((struct channel_softc *,struct wdc_xfer *));
89 int wdc_atapi_intr __P((struct channel_softc *, struct wdc_xfer *, int));
90 void wdc_atapi_kill_xfer __P((struct channel_softc *, struct wdc_xfer *));
91 int wdc_atapi_ctrl __P((struct channel_softc *, struct wdc_xfer *, int));
92 void wdc_atapi_done __P((struct channel_softc *, struct wdc_xfer *));
93 void wdc_atapi_reset __P((struct channel_softc *, struct wdc_xfer *));
94 int wdc_atapi_send_cmd __P((struct scsipi_xfer *sc_xfer));
95
96 #define MAX_SIZE MAXPHYS
97
98 void
99 wdc_atapibus_attach(chp)
100 struct channel_softc *chp;
101 {
102 struct wdc_softc *wdc = chp->wdc;
103 int channel = chp->channel;
104 struct ata_atapi_attach aa_link;
105
106 /*
107 * Fill in the adapter.
108 */
109 wdc->sc_atapi_adapter.scsipi_cmd = wdc_atapi_send_cmd;
110 wdc->sc_atapi_adapter.scsipi_minphys = wdc_atapi_minphys;
111
112 memset(&aa_link, 0, sizeof(struct ata_atapi_attach));
113 aa_link.aa_type = T_ATAPI;
114 aa_link.aa_channel = channel;
115 aa_link.aa_openings = 1;
116 aa_link.aa_drv_data = chp->ch_drive; /* pass the whole array */
117 aa_link.aa_bus_private = &wdc->sc_atapi_adapter;
118 chp->atapibus = config_found(&wdc->sc_dev, (void *)&aa_link,
119 atapi_print);
120 }
121
122 void
123 wdc_atapi_minphys (struct buf *bp)
124 {
125 if(bp->b_bcount > MAX_SIZE)
126 bp->b_bcount = MAX_SIZE;
127 minphys(bp);
128 }
129
130 /*
131 * Kill off all pending xfers for a scsipi_link.
132 *
133 * Must be called at splbio().
134 */
135 void
136 atapi_kill_pending(sc_link)
137 struct scsipi_link *sc_link;
138 {
139 struct wdc_softc *wdc = (void *)sc_link->adapter_softc;
140 struct channel_softc *chp =
141 wdc->channels[sc_link->scsipi_atapi.channel];
142
143 wdc_kill_pending(chp);
144 }
145
146 void
147 wdc_atapi_kill_xfer(chp, xfer)
148 struct channel_softc *chp;
149 struct wdc_xfer *xfer;
150 {
151 struct scsipi_xfer *sc_xfer = xfer->cmd;
152
153 untimeout(wdctimeout, chp);
154 /* remove this command from xfer queue */
155 wdc_free_xfer(chp, xfer);
156 sc_xfer->xs_status |= XS_STS_DONE;
157 sc_xfer->error = XS_DRIVER_STUFFUP;
158 scsipi_done(sc_xfer);
159 }
160
161 int
162 wdc_atapi_get_params(ab_link, drive, flags, id)
163 struct scsipi_link *ab_link;
164 u_int8_t drive;
165 int flags;
166 struct ataparams *id;
167 {
168 struct wdc_softc *wdc = (void*)ab_link->adapter_softc;
169 struct channel_softc *chp =
170 wdc->channels[ab_link->scsipi_atapi.channel];
171 struct wdc_command wdc_c;
172
173 /* if no ATAPI device detected at wdc attach time, skip */
174 /*
175 * XXX this will break scsireprobe if this is of any interest for
176 * ATAPI devices one day.
177 */
178 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) {
179 WDCDEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n",
180 drive), DEBUG_PROBE);
181 return -1;
182 }
183 memset(&wdc_c, 0, sizeof(struct wdc_command));
184 wdc_c.r_command = ATAPI_SOFT_RESET;
185 wdc_c.r_st_bmask = 0;
186 wdc_c.r_st_pmask = 0;
187 wdc_c.flags = AT_POLL;
188 wdc_c.timeout = WDC_RESET_WAIT;
189 if (wdc_exec_command(&chp->ch_drive[drive], &wdc_c) != WDC_COMPLETE) {
190 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for"
191 " drive %s:%d:%d: driver failed\n",
192 chp->wdc->sc_dev.dv_xname, chp->channel, drive);
193 panic("wdc_atapi_get_params");
194 }
195 if (wdc_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
196 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET "
197 "failed for drive %s:%d:%d: error 0x%x\n",
198 chp->wdc->sc_dev.dv_xname, chp->channel, drive,
199 wdc_c.r_error), DEBUG_PROBE);
200 return -1;
201 }
202 chp->ch_drive[drive].state = 0;
203
204 bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
205
206 /* Some ATAPI devices need a bit more time after software reset. */
207 delay(5000);
208 if (ata_get_params(&chp->ch_drive[drive], AT_POLL, id) != 0) {
209 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE "
210 "failed for drive %s:%d:%d: error 0x%x\n",
211 chp->wdc->sc_dev.dv_xname, chp->channel, drive,
212 wdc_c.r_error), DEBUG_PROBE);
213 return -1;
214 }
215 return COMPLETE;
216 }
217
218 int
219 wdc_atapi_send_cmd(sc_xfer)
220 struct scsipi_xfer *sc_xfer;
221 {
222 struct wdc_softc *wdc = (void*)sc_xfer->sc_link->adapter_softc;
223 struct wdc_xfer *xfer;
224 int flags = sc_xfer->xs_control;
225 int channel = sc_xfer->sc_link->scsipi_atapi.channel;
226 int drive = sc_xfer->sc_link->scsipi_atapi.drive;
227 int s, ret;
228
229 WDCDEBUG_PRINT(("wdc_atapi_send_cmd %s:%d:%d\n",
230 wdc->sc_dev.dv_xname, channel, drive), DEBUG_XFERS);
231
232 xfer = wdc_get_xfer((flags & XS_CTL_NOSLEEP) ?
233 WDC_NOSLEEP : WDC_CANSLEEP);
234 if (xfer == NULL) {
235 return TRY_AGAIN_LATER;
236 }
237 if (sc_xfer->xs_control & XS_CTL_POLL)
238 xfer->c_flags |= C_POLL;
239 xfer->drive = drive;
240 xfer->c_flags |= C_ATAPI;
241 xfer->cmd = sc_xfer;
242 xfer->databuf = sc_xfer->data;
243 xfer->c_bcount = sc_xfer->datalen;
244 xfer->c_start = wdc_atapi_start;
245 xfer->c_intr = wdc_atapi_intr;
246 xfer->c_kill_xfer = wdc_atapi_kill_xfer;
247 s = splbio();
248 wdc_exec_xfer(wdc->channels[channel], xfer);
249 #ifdef DIAGNOSTIC
250 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 &&
251 (sc_xfer->xs_status & XS_STS_DONE) == 0)
252 panic("wdc_atapi_send_cmd: polled command not done");
253 #endif
254 ret = (sc_xfer->xs_status & XS_STS_DONE) ?
255 COMPLETE : SUCCESSFULLY_QUEUED;
256 splx(s);
257 return ret;
258 }
259
260 void
261 wdc_atapi_start(chp, xfer)
262 struct channel_softc *chp;
263 struct wdc_xfer *xfer;
264 {
265 struct scsipi_xfer *sc_xfer = xfer->cmd;
266 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
267
268 WDCDEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n",
269 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive,
270 sc_xfer->xs_control), DEBUG_XFERS);
271 /* Adjust C_DMA, it may have changed if we are requesting sense */
272 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
273 (sc_xfer->datalen > 0 || (xfer->c_flags & C_SENSE))) {
274 if (drvp->n_xfers <= NXFER)
275 drvp->n_xfers++;
276 xfer->c_flags |= C_DMA;
277 } else {
278 xfer->c_flags &= ~C_DMA;
279 }
280 /* start timeout machinery */
281 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0)
282 timeout(wdctimeout, chp, sc_xfer->timeout * hz / 1000);
283 /* Do control operations specially. */
284 if (drvp->state < READY) {
285 if (drvp->state != PIOMODE) {
286 printf("%s:%d:%d: bad state %d in wdc_atapi_start\n",
287 chp->wdc->sc_dev.dv_xname, chp->channel,
288 xfer->drive, drvp->state);
289 panic("wdc_atapi_start: bad state");
290 }
291 wdc_atapi_ctrl(chp, xfer, 0);
292 return;
293 }
294 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
295 WDSD_IBM | (xfer->drive << 4));
296 if (wait_for_unbusy(chp, ATAPI_DELAY) < 0) {
297 printf("wdc_atapi_start: not ready, st = %02x\n",
298 chp->ch_status);
299 sc_xfer->error = XS_TIMEOUT;
300 wdc_atapi_reset(chp, xfer);
301 return;
302 }
303
304 /*
305 * Even with WDCS_ERR, the device should accept a command packet
306 * Limit length to what can be stuffed into the cylinder register
307 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536,
308 * but not all devices do that and it's not obvious from the
309 * ATAPI spec that that behaviour should be expected. If more
310 * data is necessary, multiple data transfer phases will be done.
311 */
312
313 wdccommand(chp, xfer->drive, ATAPI_PKT_CMD,
314 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff,
315 0, 0, 0,
316 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0);
317
318 /*
319 * If there is no interrupt for CMD input, busy-wait for it (done in
320 * the interrupt routine. If it is a polled command, call the interrupt
321 * routine until command is done.
322 */
323 if ((sc_xfer->sc_link->scsipi_atapi.cap & ATAPI_CFG_DRQ_MASK) !=
324 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) {
325 /* Wait for at last 400ns for status bit to be valid */
326 DELAY(1);
327 wdc_atapi_intr(chp, xfer, 0);
328 } else {
329 chp->ch_flags |= WDCF_IRQ_WAIT;
330 }
331 if (sc_xfer->xs_control & XS_CTL_POLL) {
332 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) {
333 /* Wait for at last 400ns for status bit to be valid */
334 DELAY(1);
335 wdc_atapi_intr(chp, xfer, 0);
336 }
337 }
338 }
339
340 int
341 wdc_atapi_intr(chp, xfer, irq)
342 struct channel_softc *chp;
343 struct wdc_xfer *xfer;
344 int irq;
345 {
346 struct scsipi_xfer *sc_xfer = xfer->cmd;
347 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
348 int len, phase, i, retries=0;
349 int ire, dma_err = 0;
350 int dma_flags = 0;
351 struct scsipi_generic _cmd_reqsense;
352 struct scsipi_sense *cmd_reqsense =
353 (struct scsipi_sense *)&_cmd_reqsense;
354 void *cmd;
355
356 WDCDEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n",
357 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive), DEBUG_INTR);
358
359 /* Is it not a transfer, but a control operation? */
360 if (drvp->state < READY) {
361 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n",
362 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
363 drvp->state);
364 panic("wdc_atapi_intr: bad state\n");
365 }
366 /*
367 * If we missed an interrupt in a PIO transfer, reset and restart.
368 * Don't try to continue transfer, we may have missed cycles.
369 */
370 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) {
371 sc_xfer->error = XS_TIMEOUT;
372 wdc_atapi_reset(chp, xfer);
373 return 1;
374 }
375
376 /* Ack interrupt done in wait_for_unbusy */
377 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
378 WDSD_IBM | (xfer->drive << 4));
379 if (wait_for_unbusy(chp,
380 (irq == 0) ? sc_xfer->timeout : 0) != 0) {
381 if (irq && (xfer->c_flags & C_TIMEOU) == 0)
382 return 0; /* IRQ was not for us */
383 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n",
384 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
385 xfer->c_bcount, xfer->c_skip);
386 if (xfer->c_flags & C_DMA)
387 ata_dmaerr(drvp);
388 sc_xfer->error = XS_TIMEOUT;
389 wdc_atapi_reset(chp, xfer);
390 return 1;
391 }
392 /* If we missed an IRQ and were using DMA, flag it as a DMA error */
393 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA))
394 ata_dmaerr(drvp);
395 /*
396 * if the request sense command was aborted, report the short sense
397 * previously recorded, else continue normal processing
398 */
399
400 if ((xfer->c_flags & C_SENSE) != 0 &&
401 (chp->ch_status & WDCS_ERR) != 0 &&
402 (chp->ch_error & WDCE_ABRT) != 0) {
403 WDCDEBUG_PRINT(("wdc_atapi_intr: request_sense aborted, "
404 "calling wdc_atapi_done(), sense 0x%x\n",
405 sc_xfer->sense.atapi_sense), DEBUG_INTR);
406 wdc_atapi_done(chp, xfer);
407 return 1;
408 }
409
410 if (xfer->c_flags & C_DMA) {
411 dma_flags = ((sc_xfer->xs_control & XS_CTL_DATA_IN) ||
412 (xfer->c_flags & C_SENSE)) ? WDC_DMA_READ : 0;
413 dma_flags |= sc_xfer->xs_control & XS_CTL_POLL ?
414 WDC_DMA_POLL : 0;
415 }
416 again:
417 len = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo) +
418 256 * bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_hi);
419 ire = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_ireason);
420 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ);
421 WDCDEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x "
422 "ire 0x%x :", xfer->c_bcount,
423 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR);
424
425 switch (phase) {
426 case PHASE_CMDOUT:
427 if (xfer->c_flags & C_SENSE) {
428 memset(cmd_reqsense, 0, sizeof(struct scsipi_generic));
429 cmd_reqsense->opcode = REQUEST_SENSE;
430 cmd_reqsense->length = xfer->c_bcount;
431 cmd = cmd_reqsense;
432 } else {
433 cmd = sc_xfer->cmd;
434 }
435 WDCDEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR);
436 /* Init the DMA channel if necessary */
437 if (xfer->c_flags & C_DMA) {
438 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg,
439 chp->channel, xfer->drive,
440 xfer->databuf, xfer->c_bcount, dma_flags) != 0) {
441 sc_xfer->error = XS_DRIVER_STUFFUP;
442 break;
443 }
444 }
445 /* send packet command */
446 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */
447 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
448 if (drvp->drive_flags & DRIVE_CAP32) {
449 bus_space_write_multi_4(chp->data32iot,
450 chp->data32ioh, 0,
451 (u_int32_t *)cmd,
452 sc_xfer->cmdlen >> 2);
453 } else {
454 bus_space_write_multi_2(chp->cmd_iot,
455 chp->cmd_ioh, wd_data,
456 (u_int16_t *)cmd,
457 sc_xfer->cmdlen >> 1);
458 }
459 } else {
460 if (drvp->drive_flags & DRIVE_CAP32) {
461 bus_space_write_multi_stream_4(chp->data32iot,
462 chp->data32ioh, 0,
463 (u_int32_t *)cmd,
464 sc_xfer->cmdlen >> 2);
465 } else {
466 bus_space_write_multi_stream_2(chp->cmd_iot,
467 chp->cmd_ioh, wd_data,
468 (u_int16_t *)cmd,
469 sc_xfer->cmdlen >> 1);
470 }
471 }
472 /* Start the DMA channel if necessary */
473 if (xfer->c_flags & C_DMA) {
474 (*chp->wdc->dma_start)(chp->wdc->dma_arg,
475 chp->channel, xfer->drive, dma_flags);
476 }
477
478 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
479 chp->ch_flags |= WDCF_IRQ_WAIT;
480 }
481 return 1;
482
483 case PHASE_DATAOUT:
484 /* write data */
485 WDCDEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR);
486 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 ||
487 (xfer->c_flags & C_DMA) != 0) {
488 printf("wdc_atapi_intr: bad data phase DATAOUT\n");
489 if (xfer->c_flags & C_DMA) {
490 (*chp->wdc->dma_finish)(chp->wdc->dma_arg,
491 chp->channel, xfer->drive, dma_flags);
492 ata_dmaerr(drvp);
493 }
494 sc_xfer->error = XS_TIMEOUT;
495 wdc_atapi_reset(chp, xfer);
496 return 1;
497 }
498 if (xfer->c_bcount < len) {
499 printf("wdc_atapi_intr: warning: write only "
500 "%d of %d requested bytes\n", xfer->c_bcount, len);
501 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
502 bus_space_write_multi_2(chp->cmd_iot,
503 chp->cmd_ioh, wd_data,
504 (u_int16_t *)((char *)xfer->databuf +
505 xfer->c_skip),
506 xfer->c_bcount >> 1);
507 } else {
508 bus_space_write_multi_stream_2(chp->cmd_iot,
509 chp->cmd_ioh, wd_data,
510 (u_int16_t *)((char *)xfer->databuf +
511 xfer->c_skip),
512 xfer->c_bcount >> 1);
513 }
514 for (i = xfer->c_bcount; i < len; i += 2)
515 bus_space_write_2(chp->cmd_iot, chp->cmd_ioh,
516 wd_data, 0);
517 xfer->c_skip += xfer->c_bcount;
518 xfer->c_bcount = 0;
519 } else {
520 if (drvp->drive_flags & DRIVE_CAP32) {
521 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
522 bus_space_write_multi_4(chp->data32iot,
523 chp->data32ioh, 0,
524 (u_int32_t *)((char *)xfer->databuf +
525 xfer->c_skip),
526 len >> 2);
527 else
528 bus_space_write_multi_stream_4(chp->data32iot,
529 chp->data32ioh, wd_data,
530 (u_int32_t *)((char *)xfer->databuf +
531 xfer->c_skip),
532 len >> 2);
533
534 xfer->c_skip += len & 0xfffffffc;
535 xfer->c_bcount -= len & 0xfffffffc;
536 len = len & 0x03;
537 }
538 if (len > 0) {
539 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
540 bus_space_write_multi_2(chp->cmd_iot,
541 chp->cmd_ioh, wd_data,
542 (u_int16_t *)((char *)xfer->databuf +
543 xfer->c_skip),
544 len >> 1);
545 else
546 bus_space_write_multi_stream_2(chp->cmd_iot,
547 chp->cmd_ioh, wd_data,
548 (u_int16_t *)((char *)xfer->databuf +
549 xfer->c_skip),
550 len >> 1);
551 xfer->c_skip += len;
552 xfer->c_bcount -= len;
553 }
554 }
555 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
556 chp->ch_flags |= WDCF_IRQ_WAIT;
557 }
558 return 1;
559
560 case PHASE_DATAIN:
561 /* Read data */
562 WDCDEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR);
563 if (((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 &&
564 (xfer->c_flags & C_SENSE) == 0) ||
565 (xfer->c_flags & C_DMA) != 0) {
566 printf("wdc_atapi_intr: bad data phase DATAIN\n");
567 if (xfer->c_flags & C_DMA) {
568 (*chp->wdc->dma_finish)(chp->wdc->dma_arg,
569 chp->channel, xfer->drive, dma_flags);
570 ata_dmaerr(drvp);
571 }
572 sc_xfer->error = XS_TIMEOUT;
573 wdc_atapi_reset(chp, xfer);
574 return 1;
575 }
576 if (xfer->c_bcount < len) {
577 printf("wdc_atapi_intr: warning: reading only "
578 "%d of %d bytes\n", xfer->c_bcount, len);
579 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
580 bus_space_read_multi_2(chp->cmd_iot,
581 chp->cmd_ioh, wd_data,
582 (u_int16_t *)((char *)xfer->databuf +
583 xfer->c_skip),
584 xfer->c_bcount >> 1);
585 } else {
586 bus_space_read_multi_stream_2(chp->cmd_iot,
587 chp->cmd_ioh, wd_data,
588 (u_int16_t *)((char *)xfer->databuf +
589 xfer->c_skip),
590 xfer->c_bcount >> 1);
591 }
592 wdcbit_bucket(chp, len - xfer->c_bcount);
593 xfer->c_skip += xfer->c_bcount;
594 xfer->c_bcount = 0;
595 } else {
596 if (drvp->drive_flags & DRIVE_CAP32) {
597 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
598 bus_space_read_multi_4(chp->data32iot,
599 chp->data32ioh, 0,
600 (u_int32_t *)((char *)xfer->databuf +
601 xfer->c_skip),
602 len >> 2);
603 else
604 bus_space_read_multi_stream_4(chp->data32iot,
605 chp->data32ioh, wd_data,
606 (u_int32_t *)((char *)xfer->databuf +
607 xfer->c_skip),
608 len >> 2);
609
610 xfer->c_skip += len & 0xfffffffc;
611 xfer->c_bcount -= len & 0xfffffffc;
612 len = len & 0x03;
613 }
614 if (len > 0) {
615 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
616 bus_space_read_multi_2(chp->cmd_iot,
617 chp->cmd_ioh, wd_data,
618 (u_int16_t *)((char *)xfer->databuf +
619 xfer->c_skip),
620 len >> 1);
621 else
622 bus_space_read_multi_stream_2(chp->cmd_iot,
623 chp->cmd_ioh, wd_data,
624 (u_int16_t *)((char *)xfer->databuf +
625 xfer->c_skip),
626 len >> 1);
627 xfer->c_skip += len;
628 xfer->c_bcount -=len;
629 }
630 }
631 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
632 chp->ch_flags |= WDCF_IRQ_WAIT;
633 }
634 return 1;
635
636 case PHASE_ABORTED:
637 case PHASE_COMPLETED:
638 WDCDEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR);
639 /* turn off DMA channel */
640 if (xfer->c_flags & C_DMA) {
641 dma_err = (*chp->wdc->dma_finish)(chp->wdc->dma_arg,
642 chp->channel, xfer->drive, dma_flags);
643 if (xfer->c_flags & C_SENSE)
644 xfer->c_bcount -=
645 sizeof(sc_xfer->sense.scsi_sense);
646 else
647 xfer->c_bcount -= sc_xfer->datalen;
648 }
649 if (xfer->c_flags & C_SENSE) {
650 if ((chp->ch_status & WDCS_ERR) || dma_err < 0) {
651 /*
652 * request sense failed ! it's not suppossed
653 * to be possible
654 */
655 if (xfer->c_flags & C_DMA)
656 ata_dmaerr(drvp);
657 sc_xfer->error = XS_RESET;
658 wdc_atapi_reset(chp, xfer);
659 return (1);
660 } else if (xfer->c_bcount <
661 sizeof(sc_xfer->sense.scsi_sense)) {
662 /* use the sense we just read */
663 sc_xfer->error = XS_SENSE;
664 } else {
665 /*
666 * command completed, but no data was read.
667 * use the short sense we saved previsouly.
668 */
669 sc_xfer->error = XS_SHORTSENSE;
670 }
671 } else {
672 sc_xfer->resid = xfer->c_bcount;
673 if (chp->ch_status & WDCS_ERR) {
674 /* save the short sense */
675 sc_xfer->error = XS_SHORTSENSE;
676 sc_xfer->sense.atapi_sense = chp->ch_error;
677 if ((sc_xfer->sc_link->quirks &
678 ADEV_NOSENSE) == 0) {
679 /*
680 * let the driver issue a
681 * 'request sense'
682 */
683 xfer->databuf = &sc_xfer->sense;
684 xfer->c_bcount =
685 sizeof(sc_xfer->sense.scsi_sense);
686 xfer->c_skip = 0;
687 xfer->c_flags |= C_SENSE;
688 untimeout(wdctimeout, chp);
689 wdc_atapi_start(chp, xfer);
690 return 1;
691 }
692 } else if (dma_err < 0) {
693 ata_dmaerr(drvp);
694 sc_xfer->error = XS_RESET;
695 wdc_atapi_reset(chp, xfer);
696 return (1);
697 }
698 }
699 if (xfer->c_bcount != 0) {
700 WDCDEBUG_PRINT(("wdc_atapi_intr: bcount value is "
701 "%d after io\n", xfer->c_bcount), DEBUG_XFERS);
702 }
703 #ifdef DIAGNOSTIC
704 if (xfer->c_bcount < 0) {
705 printf("wdc_atapi_intr warning: bcount value "
706 "is %d after io\n", xfer->c_bcount);
707 }
708 #endif
709 break;
710
711 default:
712 if (++retries<500) {
713 DELAY(100);
714 chp->ch_status = bus_space_read_1(chp->cmd_iot,
715 chp->cmd_ioh, wd_status);
716 chp->ch_error = bus_space_read_1(chp->cmd_iot,
717 chp->cmd_ioh, wd_error);
718 goto again;
719 }
720 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase);
721 if (chp->ch_status & WDCS_ERR) {
722 sc_xfer->error = XS_SHORTSENSE;
723 sc_xfer->sense.atapi_sense = chp->ch_error;
724 } else {
725 if (xfer->c_flags & C_DMA)
726 ata_dmaerr(drvp);
727 sc_xfer->error = XS_RESET;
728 wdc_atapi_reset(chp, xfer);
729 return (1);
730 }
731 }
732 WDCDEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x "
733 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense),
734 DEBUG_INTR);
735 wdc_atapi_done(chp, xfer);
736 return (1);
737 }
738
739 int
740 wdc_atapi_ctrl(chp, xfer, irq)
741 struct channel_softc *chp;
742 struct wdc_xfer *xfer;
743 int irq;
744 {
745 struct scsipi_xfer *sc_xfer = xfer->cmd;
746 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
747 char *errstring = NULL;
748 int delay = (irq == 0) ? ATAPI_DELAY : 0;
749
750 /* Ack interrupt done in wait_for_unbusy */
751 again:
752 WDCDEBUG_PRINT(("wdc_atapi_ctrl %s:%d:%d state %d\n",
753 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive, drvp->state),
754 DEBUG_INTR | DEBUG_FUNCS);
755 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
756 WDSD_IBM | (xfer->drive << 4));
757 switch (drvp->state) {
758 case PIOMODE:
759 piomode:
760 /* Don't try to set mode if controller can't be adjusted */
761 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0)
762 goto ready;
763 /* Also don't try if the drive didn't report its mode */
764 if ((drvp->drive_flags & DRIVE_MODE) == 0)
765 goto ready;;
766 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
767 0x08 | drvp->PIO_mode, WDSF_SET_MODE);
768 drvp->state = PIOMODE_WAIT;
769 break;
770 case PIOMODE_WAIT:
771 errstring = "piomode";
772 if (wait_for_unbusy(chp, delay))
773 goto timeout;
774 if (chp->ch_status & WDCS_ERR) {
775 if (drvp->PIO_mode < 3) {
776 drvp->PIO_mode = 3;
777 goto piomode;
778 } else {
779 goto error;
780 }
781 }
782 /* fall through */
783
784 case DMAMODE:
785 if (drvp->drive_flags & DRIVE_UDMA) {
786 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
787 0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
788 } else if (drvp->drive_flags & DRIVE_DMA) {
789 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
790 0x20 | drvp->DMA_mode, WDSF_SET_MODE);
791 } else {
792 goto ready;
793 }
794 drvp->state = DMAMODE_WAIT;
795 break;
796 case DMAMODE_WAIT:
797 errstring = "dmamode";
798 if (wait_for_unbusy(chp, delay))
799 goto timeout;
800 if (chp->ch_status & WDCS_ERR)
801 goto error;
802 /* fall through */
803
804 case READY:
805 ready:
806 drvp->state = READY;
807 xfer->c_intr = wdc_atapi_intr;
808 untimeout(wdctimeout, chp);
809 wdc_atapi_start(chp, xfer);
810 return 1;
811 }
812 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
813 chp->ch_flags |= WDCF_IRQ_WAIT;
814 xfer->c_intr = wdc_atapi_ctrl;
815 } else {
816 goto again;
817 }
818 return 1;
819
820 timeout:
821 if (irq && (xfer->c_flags & C_TIMEOU) == 0) {
822 return 0; /* IRQ was not for us */
823 }
824 printf("%s:%d:%d: %s timed out\n",
825 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
826 sc_xfer->error = XS_TIMEOUT;
827 wdc_atapi_reset(chp, xfer);
828 return 1;
829 error:
830 printf("%s:%d:%d: %s ",
831 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
832 errstring);
833 printf("error (0x%x)\n", chp->ch_error);
834 sc_xfer->error = XS_SHORTSENSE;
835 sc_xfer->sense.atapi_sense = chp->ch_error;
836 wdc_atapi_reset(chp, xfer);
837 return 1;
838 }
839
840 void
841 wdc_atapi_done(chp, xfer)
842 struct channel_softc *chp;
843 struct wdc_xfer *xfer;
844 {
845 struct scsipi_xfer *sc_xfer = xfer->cmd;
846
847 WDCDEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n",
848 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
849 (u_int)xfer->c_flags), DEBUG_XFERS);
850 untimeout(wdctimeout, chp);
851 /* remove this command from xfer queue */
852 wdc_free_xfer(chp, xfer);
853 sc_xfer->xs_status |= XS_STS_DONE;
854
855 WDCDEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS);
856 scsipi_done(sc_xfer);
857 WDCDEBUG_PRINT(("wdcstart from wdc_atapi_done, flags 0x%x\n",
858 chp->ch_flags), DEBUG_XFERS);
859 wdcstart(chp);
860 }
861
862 void
863 wdc_atapi_reset(chp, xfer)
864 struct channel_softc *chp;
865 struct wdc_xfer *xfer;
866 {
867 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
868 struct scsipi_xfer *sc_xfer = xfer->cmd;
869
870 wdccommandshort(chp, xfer->drive, ATAPI_SOFT_RESET);
871 drvp->state = 0;
872 if (wait_for_unbusy(chp, WDC_RESET_WAIT) != 0) {
873 printf("%s:%d:%d: reset failed\n",
874 chp->wdc->sc_dev.dv_xname, chp->channel,
875 xfer->drive);
876 sc_xfer->error = XS_SELTIMEOUT;
877 }
878 wdc_atapi_done(chp, xfer);
879 return;
880 }
881