atapi_wdc.c revision 1.31
1 /* $NetBSD: atapi_wdc.c,v 1.31 2000/03/20 22:57:00 enami Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 * 34 */ 35 36 #ifndef WDCDEBUG 37 #define WDCDEBUG 38 #endif /* WDCDEBUG */ 39 40 #include <sys/param.h> 41 #include <sys/systm.h> 42 #include <sys/kernel.h> 43 #include <sys/file.h> 44 #include <sys/stat.h> 45 #include <sys/buf.h> 46 #include <sys/malloc.h> 47 #include <sys/device.h> 48 #include <sys/syslog.h> 49 #include <sys/proc.h> 50 51 #include <vm/vm.h> 52 53 #include <machine/intr.h> 54 #include <machine/bus.h> 55 56 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 57 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 58 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 59 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 60 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 61 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 62 63 #include <dev/ata/atareg.h> 64 #include <dev/ata/atavar.h> 65 #include <dev/ic/wdcreg.h> 66 #include <dev/ic/wdcvar.h> 67 #include <dev/scsipi/scsipi_all.h> 68 #include <dev/scsipi/scsipiconf.h> 69 #include <dev/scsipi/atapiconf.h> 70 71 #define DEBUG_INTR 0x01 72 #define DEBUG_XFERS 0x02 73 #define DEBUG_STATUS 0x04 74 #define DEBUG_FUNCS 0x08 75 #define DEBUG_PROBE 0x10 76 #ifdef WDCDEBUG 77 int wdcdebug_atapi_mask = 0; 78 #define WDCDEBUG_PRINT(args, level) \ 79 if (wdcdebug_atapi_mask & (level)) \ 80 printf args 81 #else 82 #define WDCDEBUG_PRINT(args, level) 83 #endif 84 85 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */ 86 87 void wdc_atapi_minphys __P((struct buf *bp)); 88 void wdc_atapi_start __P((struct channel_softc *,struct wdc_xfer *)); 89 int wdc_atapi_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 90 void wdc_atapi_kill_xfer __P((struct channel_softc *, struct wdc_xfer *)); 91 int wdc_atapi_ctrl __P((struct channel_softc *, struct wdc_xfer *, int)); 92 void wdc_atapi_done __P((struct channel_softc *, struct wdc_xfer *)); 93 void wdc_atapi_reset __P((struct channel_softc *, struct wdc_xfer *)); 94 int wdc_atapi_send_cmd __P((struct scsipi_xfer *sc_xfer)); 95 96 #define MAX_SIZE MAXPHYS 97 98 void 99 wdc_atapibus_attach(chp) 100 struct channel_softc *chp; 101 { 102 struct wdc_softc *wdc = chp->wdc; 103 int channel = chp->channel; 104 struct ata_atapi_attach aa_link; 105 106 /* 107 * Fill in the adapter. 108 */ 109 wdc->sc_atapi_adapter.scsipi_cmd = wdc_atapi_send_cmd; 110 wdc->sc_atapi_adapter.scsipi_minphys = wdc_atapi_minphys; 111 112 memset(&aa_link, 0, sizeof(struct ata_atapi_attach)); 113 aa_link.aa_type = T_ATAPI; 114 aa_link.aa_channel = channel; 115 aa_link.aa_openings = 1; 116 aa_link.aa_drv_data = chp->ch_drive; /* pass the whole array */ 117 aa_link.aa_bus_private = &wdc->sc_atapi_adapter; 118 chp->atapibus = config_found(&wdc->sc_dev, (void *)&aa_link, 119 atapi_print); 120 } 121 122 void 123 wdc_atapi_minphys (struct buf *bp) 124 { 125 if(bp->b_bcount > MAX_SIZE) 126 bp->b_bcount = MAX_SIZE; 127 minphys(bp); 128 } 129 130 /* 131 * Kill off all pending xfers for a scsipi_link. 132 * 133 * Must be called at splbio(). 134 */ 135 void 136 atapi_kill_pending(sc_link) 137 struct scsipi_link *sc_link; 138 { 139 struct wdc_softc *wdc = (void *)sc_link->adapter_softc; 140 struct channel_softc *chp = 141 wdc->channels[sc_link->scsipi_atapi.channel]; 142 143 wdc_kill_pending(chp); 144 } 145 146 void 147 wdc_atapi_kill_xfer(chp, xfer) 148 struct channel_softc *chp; 149 struct wdc_xfer *xfer; 150 { 151 struct scsipi_xfer *sc_xfer = xfer->cmd; 152 153 untimeout(wdctimeout, chp); 154 /* remove this command from xfer queue */ 155 wdc_free_xfer(chp, xfer); 156 sc_xfer->xs_status |= XS_STS_DONE; 157 sc_xfer->error = XS_DRIVER_STUFFUP; 158 scsipi_done(sc_xfer); 159 } 160 161 int 162 wdc_atapi_get_params(ab_link, drive, flags, id) 163 struct scsipi_link *ab_link; 164 u_int8_t drive; 165 int flags; 166 struct ataparams *id; 167 { 168 struct wdc_softc *wdc = (void*)ab_link->adapter_softc; 169 struct channel_softc *chp = 170 wdc->channels[ab_link->scsipi_atapi.channel]; 171 struct wdc_command wdc_c; 172 173 /* if no ATAPI device detected at wdc attach time, skip */ 174 /* 175 * XXX this will break scsireprobe if this is of any interest for 176 * ATAPI devices one day. 177 */ 178 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) { 179 WDCDEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n", 180 drive), DEBUG_PROBE); 181 return -1; 182 } 183 memset(&wdc_c, 0, sizeof(struct wdc_command)); 184 wdc_c.r_command = ATAPI_SOFT_RESET; 185 wdc_c.r_st_bmask = 0; 186 wdc_c.r_st_pmask = 0; 187 wdc_c.flags = AT_POLL; 188 wdc_c.timeout = WDC_RESET_WAIT; 189 if (wdc_exec_command(&chp->ch_drive[drive], &wdc_c) != WDC_COMPLETE) { 190 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for" 191 " drive %s:%d:%d: driver failed\n", 192 chp->wdc->sc_dev.dv_xname, chp->channel, drive); 193 panic("wdc_atapi_get_params"); 194 } 195 if (wdc_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 196 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET " 197 "failed for drive %s:%d:%d: error 0x%x\n", 198 chp->wdc->sc_dev.dv_xname, chp->channel, drive, 199 wdc_c.r_error), DEBUG_PROBE); 200 return -1; 201 } 202 chp->ch_drive[drive].state = 0; 203 204 bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status); 205 206 /* Some ATAPI devices need a bit more time after software reset. */ 207 delay(5000); 208 if (ata_get_params(&chp->ch_drive[drive], AT_POLL, id) != 0) { 209 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE " 210 "failed for drive %s:%d:%d: error 0x%x\n", 211 chp->wdc->sc_dev.dv_xname, chp->channel, drive, 212 wdc_c.r_error), DEBUG_PROBE); 213 return -1; 214 } 215 return COMPLETE; 216 } 217 218 int 219 wdc_atapi_send_cmd(sc_xfer) 220 struct scsipi_xfer *sc_xfer; 221 { 222 struct wdc_softc *wdc = (void*)sc_xfer->sc_link->adapter_softc; 223 struct wdc_xfer *xfer; 224 int flags = sc_xfer->xs_control; 225 int channel = sc_xfer->sc_link->scsipi_atapi.channel; 226 int drive = sc_xfer->sc_link->scsipi_atapi.drive; 227 int s, ret; 228 229 WDCDEBUG_PRINT(("wdc_atapi_send_cmd %s:%d:%d\n", 230 wdc->sc_dev.dv_xname, channel, drive), DEBUG_XFERS); 231 232 if ((wdc->sc_dev.dv_flags & DVF_ACTIVE) == 0) { 233 sc_xfer->xs_status |= XS_STS_DONE; 234 sc_xfer->error = XS_DRIVER_STUFFUP; 235 scsipi_done(sc_xfer); 236 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 237 return (SUCCESSFULLY_QUEUED); 238 else 239 return (COMPLETE); 240 } 241 242 xfer = wdc_get_xfer((flags & XS_CTL_NOSLEEP) ? 243 WDC_NOSLEEP : WDC_CANSLEEP); 244 if (xfer == NULL) { 245 return TRY_AGAIN_LATER; 246 } 247 if (sc_xfer->xs_control & XS_CTL_POLL) 248 xfer->c_flags |= C_POLL; 249 xfer->drive = drive; 250 xfer->c_flags |= C_ATAPI; 251 xfer->cmd = sc_xfer; 252 xfer->databuf = sc_xfer->data; 253 xfer->c_bcount = sc_xfer->datalen; 254 xfer->c_start = wdc_atapi_start; 255 xfer->c_intr = wdc_atapi_intr; 256 xfer->c_kill_xfer = wdc_atapi_kill_xfer; 257 s = splbio(); 258 wdc_exec_xfer(wdc->channels[channel], xfer); 259 #ifdef DIAGNOSTIC 260 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 261 (sc_xfer->xs_status & XS_STS_DONE) == 0) 262 panic("wdc_atapi_send_cmd: polled command not done"); 263 #endif 264 ret = (sc_xfer->xs_status & XS_STS_DONE) ? 265 COMPLETE : SUCCESSFULLY_QUEUED; 266 splx(s); 267 return ret; 268 } 269 270 void 271 wdc_atapi_start(chp, xfer) 272 struct channel_softc *chp; 273 struct wdc_xfer *xfer; 274 { 275 struct scsipi_xfer *sc_xfer = xfer->cmd; 276 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 277 278 WDCDEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n", 279 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive, 280 sc_xfer->xs_control), DEBUG_XFERS); 281 /* Adjust C_DMA, it may have changed if we are requesting sense */ 282 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 283 (sc_xfer->datalen > 0 || (xfer->c_flags & C_SENSE))) { 284 if (drvp->n_xfers <= NXFER) 285 drvp->n_xfers++; 286 xfer->c_flags |= C_DMA; 287 } else { 288 xfer->c_flags &= ~C_DMA; 289 } 290 /* start timeout machinery */ 291 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 292 timeout(wdctimeout, chp, sc_xfer->timeout * hz / 1000); 293 /* Do control operations specially. */ 294 if (drvp->state < READY) { 295 if (drvp->state != PIOMODE) { 296 printf("%s:%d:%d: bad state %d in wdc_atapi_start\n", 297 chp->wdc->sc_dev.dv_xname, chp->channel, 298 xfer->drive, drvp->state); 299 panic("wdc_atapi_start: bad state"); 300 } 301 wdc_atapi_ctrl(chp, xfer, 0); 302 return; 303 } 304 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 305 WDSD_IBM | (xfer->drive << 4)); 306 if (wait_for_unbusy(chp, ATAPI_DELAY) < 0) { 307 printf("wdc_atapi_start: not ready, st = %02x\n", 308 chp->ch_status); 309 sc_xfer->error = XS_TIMEOUT; 310 wdc_atapi_reset(chp, xfer); 311 return; 312 } 313 314 /* 315 * Even with WDCS_ERR, the device should accept a command packet 316 * Limit length to what can be stuffed into the cylinder register 317 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536, 318 * but not all devices do that and it's not obvious from the 319 * ATAPI spec that that behaviour should be expected. If more 320 * data is necessary, multiple data transfer phases will be done. 321 */ 322 323 wdccommand(chp, xfer->drive, ATAPI_PKT_CMD, 324 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff, 325 0, 0, 0, 326 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0); 327 328 /* 329 * If there is no interrupt for CMD input, busy-wait for it (done in 330 * the interrupt routine. If it is a polled command, call the interrupt 331 * routine until command is done. 332 */ 333 if ((sc_xfer->sc_link->scsipi_atapi.cap & ATAPI_CFG_DRQ_MASK) != 334 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) { 335 /* Wait for at last 400ns for status bit to be valid */ 336 DELAY(1); 337 wdc_atapi_intr(chp, xfer, 0); 338 } else { 339 chp->ch_flags |= WDCF_IRQ_WAIT; 340 } 341 if (sc_xfer->xs_control & XS_CTL_POLL) { 342 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 343 /* Wait for at last 400ns for status bit to be valid */ 344 DELAY(1); 345 wdc_atapi_intr(chp, xfer, 0); 346 } 347 } 348 } 349 350 int 351 wdc_atapi_intr(chp, xfer, irq) 352 struct channel_softc *chp; 353 struct wdc_xfer *xfer; 354 int irq; 355 { 356 struct scsipi_xfer *sc_xfer = xfer->cmd; 357 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 358 int len, phase, i, retries=0; 359 int ire, dma_err = 0; 360 int dma_flags = 0; 361 struct scsipi_generic _cmd_reqsense; 362 struct scsipi_sense *cmd_reqsense = 363 (struct scsipi_sense *)&_cmd_reqsense; 364 void *cmd; 365 366 WDCDEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n", 367 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive), DEBUG_INTR); 368 369 /* Is it not a transfer, but a control operation? */ 370 if (drvp->state < READY) { 371 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n", 372 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 373 drvp->state); 374 panic("wdc_atapi_intr: bad state\n"); 375 } 376 /* 377 * If we missed an interrupt in a PIO transfer, reset and restart. 378 * Don't try to continue transfer, we may have missed cycles. 379 */ 380 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 381 sc_xfer->error = XS_TIMEOUT; 382 wdc_atapi_reset(chp, xfer); 383 return 1; 384 } 385 386 /* Ack interrupt done in wait_for_unbusy */ 387 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 388 WDSD_IBM | (xfer->drive << 4)); 389 if (wait_for_unbusy(chp, 390 (irq == 0) ? sc_xfer->timeout : 0) != 0) { 391 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 392 return 0; /* IRQ was not for us */ 393 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n", 394 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 395 xfer->c_bcount, xfer->c_skip); 396 if (xfer->c_flags & C_DMA) 397 ata_dmaerr(drvp); 398 sc_xfer->error = XS_TIMEOUT; 399 wdc_atapi_reset(chp, xfer); 400 return 1; 401 } 402 /* If we missed an IRQ and were using DMA, flag it as a DMA error */ 403 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) 404 ata_dmaerr(drvp); 405 /* 406 * if the request sense command was aborted, report the short sense 407 * previously recorded, else continue normal processing 408 */ 409 410 if ((xfer->c_flags & C_SENSE) != 0 && 411 (chp->ch_status & WDCS_ERR) != 0 && 412 (chp->ch_error & WDCE_ABRT) != 0) { 413 WDCDEBUG_PRINT(("wdc_atapi_intr: request_sense aborted, " 414 "calling wdc_atapi_done(), sense 0x%x\n", 415 sc_xfer->sense.atapi_sense), DEBUG_INTR); 416 wdc_atapi_done(chp, xfer); 417 return 1; 418 } 419 420 if (xfer->c_flags & C_DMA) { 421 dma_flags = ((sc_xfer->xs_control & XS_CTL_DATA_IN) || 422 (xfer->c_flags & C_SENSE)) ? WDC_DMA_READ : 0; 423 dma_flags |= sc_xfer->xs_control & XS_CTL_POLL ? 424 WDC_DMA_POLL : 0; 425 } 426 again: 427 len = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo) + 428 256 * bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_hi); 429 ire = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_ireason); 430 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ); 431 WDCDEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x " 432 "ire 0x%x :", xfer->c_bcount, 433 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR); 434 435 switch (phase) { 436 case PHASE_CMDOUT: 437 if (xfer->c_flags & C_SENSE) { 438 memset(cmd_reqsense, 0, sizeof(struct scsipi_generic)); 439 cmd_reqsense->opcode = REQUEST_SENSE; 440 cmd_reqsense->length = xfer->c_bcount; 441 cmd = cmd_reqsense; 442 } else { 443 cmd = sc_xfer->cmd; 444 } 445 WDCDEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR); 446 /* Init the DMA channel if necessary */ 447 if (xfer->c_flags & C_DMA) { 448 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 449 chp->channel, xfer->drive, 450 xfer->databuf, xfer->c_bcount, dma_flags) != 0) { 451 sc_xfer->error = XS_DRIVER_STUFFUP; 452 break; 453 } 454 } 455 /* send packet command */ 456 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */ 457 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 458 if (drvp->drive_flags & DRIVE_CAP32) { 459 bus_space_write_multi_4(chp->data32iot, 460 chp->data32ioh, 0, 461 (u_int32_t *)cmd, 462 sc_xfer->cmdlen >> 2); 463 } else { 464 bus_space_write_multi_2(chp->cmd_iot, 465 chp->cmd_ioh, wd_data, 466 (u_int16_t *)cmd, 467 sc_xfer->cmdlen >> 1); 468 } 469 } else { 470 if (drvp->drive_flags & DRIVE_CAP32) { 471 bus_space_write_multi_stream_4(chp->data32iot, 472 chp->data32ioh, 0, 473 (u_int32_t *)cmd, 474 sc_xfer->cmdlen >> 2); 475 } else { 476 bus_space_write_multi_stream_2(chp->cmd_iot, 477 chp->cmd_ioh, wd_data, 478 (u_int16_t *)cmd, 479 sc_xfer->cmdlen >> 1); 480 } 481 } 482 /* Start the DMA channel if necessary */ 483 if (xfer->c_flags & C_DMA) { 484 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 485 chp->channel, xfer->drive, dma_flags); 486 } 487 488 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 489 chp->ch_flags |= WDCF_IRQ_WAIT; 490 } 491 return 1; 492 493 case PHASE_DATAOUT: 494 /* write data */ 495 WDCDEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR); 496 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 || 497 (xfer->c_flags & C_DMA) != 0) { 498 printf("wdc_atapi_intr: bad data phase DATAOUT\n"); 499 if (xfer->c_flags & C_DMA) { 500 (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 501 chp->channel, xfer->drive, dma_flags); 502 ata_dmaerr(drvp); 503 } 504 sc_xfer->error = XS_TIMEOUT; 505 wdc_atapi_reset(chp, xfer); 506 return 1; 507 } 508 if (xfer->c_bcount < len) { 509 printf("wdc_atapi_intr: warning: write only " 510 "%d of %d requested bytes\n", xfer->c_bcount, len); 511 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 512 bus_space_write_multi_2(chp->cmd_iot, 513 chp->cmd_ioh, wd_data, 514 (u_int16_t *)((char *)xfer->databuf + 515 xfer->c_skip), 516 xfer->c_bcount >> 1); 517 } else { 518 bus_space_write_multi_stream_2(chp->cmd_iot, 519 chp->cmd_ioh, wd_data, 520 (u_int16_t *)((char *)xfer->databuf + 521 xfer->c_skip), 522 xfer->c_bcount >> 1); 523 } 524 for (i = xfer->c_bcount; i < len; i += 2) 525 bus_space_write_2(chp->cmd_iot, chp->cmd_ioh, 526 wd_data, 0); 527 xfer->c_skip += xfer->c_bcount; 528 xfer->c_bcount = 0; 529 } else { 530 if (drvp->drive_flags & DRIVE_CAP32) { 531 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 532 bus_space_write_multi_4(chp->data32iot, 533 chp->data32ioh, 0, 534 (u_int32_t *)((char *)xfer->databuf + 535 xfer->c_skip), 536 len >> 2); 537 else 538 bus_space_write_multi_stream_4(chp->data32iot, 539 chp->data32ioh, wd_data, 540 (u_int32_t *)((char *)xfer->databuf + 541 xfer->c_skip), 542 len >> 2); 543 544 xfer->c_skip += len & 0xfffffffc; 545 xfer->c_bcount -= len & 0xfffffffc; 546 len = len & 0x03; 547 } 548 if (len > 0) { 549 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 550 bus_space_write_multi_2(chp->cmd_iot, 551 chp->cmd_ioh, wd_data, 552 (u_int16_t *)((char *)xfer->databuf + 553 xfer->c_skip), 554 len >> 1); 555 else 556 bus_space_write_multi_stream_2(chp->cmd_iot, 557 chp->cmd_ioh, wd_data, 558 (u_int16_t *)((char *)xfer->databuf + 559 xfer->c_skip), 560 len >> 1); 561 xfer->c_skip += len; 562 xfer->c_bcount -= len; 563 } 564 } 565 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 566 chp->ch_flags |= WDCF_IRQ_WAIT; 567 } 568 return 1; 569 570 case PHASE_DATAIN: 571 /* Read data */ 572 WDCDEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR); 573 if (((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 && 574 (xfer->c_flags & C_SENSE) == 0) || 575 (xfer->c_flags & C_DMA) != 0) { 576 printf("wdc_atapi_intr: bad data phase DATAIN\n"); 577 if (xfer->c_flags & C_DMA) { 578 (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 579 chp->channel, xfer->drive, dma_flags); 580 ata_dmaerr(drvp); 581 } 582 sc_xfer->error = XS_TIMEOUT; 583 wdc_atapi_reset(chp, xfer); 584 return 1; 585 } 586 if (xfer->c_bcount < len) { 587 printf("wdc_atapi_intr: warning: reading only " 588 "%d of %d bytes\n", xfer->c_bcount, len); 589 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 590 bus_space_read_multi_2(chp->cmd_iot, 591 chp->cmd_ioh, wd_data, 592 (u_int16_t *)((char *)xfer->databuf + 593 xfer->c_skip), 594 xfer->c_bcount >> 1); 595 } else { 596 bus_space_read_multi_stream_2(chp->cmd_iot, 597 chp->cmd_ioh, wd_data, 598 (u_int16_t *)((char *)xfer->databuf + 599 xfer->c_skip), 600 xfer->c_bcount >> 1); 601 } 602 wdcbit_bucket(chp, len - xfer->c_bcount); 603 xfer->c_skip += xfer->c_bcount; 604 xfer->c_bcount = 0; 605 } else { 606 if (drvp->drive_flags & DRIVE_CAP32) { 607 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 608 bus_space_read_multi_4(chp->data32iot, 609 chp->data32ioh, 0, 610 (u_int32_t *)((char *)xfer->databuf + 611 xfer->c_skip), 612 len >> 2); 613 else 614 bus_space_read_multi_stream_4(chp->data32iot, 615 chp->data32ioh, wd_data, 616 (u_int32_t *)((char *)xfer->databuf + 617 xfer->c_skip), 618 len >> 2); 619 620 xfer->c_skip += len & 0xfffffffc; 621 xfer->c_bcount -= len & 0xfffffffc; 622 len = len & 0x03; 623 } 624 if (len > 0) { 625 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 626 bus_space_read_multi_2(chp->cmd_iot, 627 chp->cmd_ioh, wd_data, 628 (u_int16_t *)((char *)xfer->databuf + 629 xfer->c_skip), 630 len >> 1); 631 else 632 bus_space_read_multi_stream_2(chp->cmd_iot, 633 chp->cmd_ioh, wd_data, 634 (u_int16_t *)((char *)xfer->databuf + 635 xfer->c_skip), 636 len >> 1); 637 xfer->c_skip += len; 638 xfer->c_bcount -=len; 639 } 640 } 641 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 642 chp->ch_flags |= WDCF_IRQ_WAIT; 643 } 644 return 1; 645 646 case PHASE_ABORTED: 647 case PHASE_COMPLETED: 648 WDCDEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR); 649 /* turn off DMA channel */ 650 if (xfer->c_flags & C_DMA) { 651 dma_err = (*chp->wdc->dma_finish)(chp->wdc->dma_arg, 652 chp->channel, xfer->drive, dma_flags); 653 if (xfer->c_flags & C_SENSE) 654 xfer->c_bcount -= 655 sizeof(sc_xfer->sense.scsi_sense); 656 else 657 xfer->c_bcount -= sc_xfer->datalen; 658 } 659 if (xfer->c_flags & C_SENSE) { 660 if ((chp->ch_status & WDCS_ERR) || dma_err < 0) { 661 /* 662 * request sense failed ! it's not suppossed 663 * to be possible 664 */ 665 if (xfer->c_flags & C_DMA) 666 ata_dmaerr(drvp); 667 sc_xfer->error = XS_RESET; 668 wdc_atapi_reset(chp, xfer); 669 return (1); 670 } else if (xfer->c_bcount < 671 sizeof(sc_xfer->sense.scsi_sense)) { 672 /* use the sense we just read */ 673 sc_xfer->error = XS_SENSE; 674 } else { 675 /* 676 * command completed, but no data was read. 677 * use the short sense we saved previsouly. 678 */ 679 sc_xfer->error = XS_SHORTSENSE; 680 } 681 } else { 682 sc_xfer->resid = xfer->c_bcount; 683 if (chp->ch_status & WDCS_ERR) { 684 /* save the short sense */ 685 sc_xfer->error = XS_SHORTSENSE; 686 sc_xfer->sense.atapi_sense = chp->ch_error; 687 if ((sc_xfer->sc_link->quirks & 688 ADEV_NOSENSE) == 0) { 689 /* 690 * let the driver issue a 691 * 'request sense' 692 */ 693 xfer->databuf = &sc_xfer->sense; 694 xfer->c_bcount = 695 sizeof(sc_xfer->sense.scsi_sense); 696 xfer->c_skip = 0; 697 xfer->c_flags |= C_SENSE; 698 untimeout(wdctimeout, chp); 699 wdc_atapi_start(chp, xfer); 700 return 1; 701 } 702 } else if (dma_err < 0) { 703 ata_dmaerr(drvp); 704 sc_xfer->error = XS_RESET; 705 wdc_atapi_reset(chp, xfer); 706 return (1); 707 } 708 } 709 if (xfer->c_bcount != 0) { 710 WDCDEBUG_PRINT(("wdc_atapi_intr: bcount value is " 711 "%d after io\n", xfer->c_bcount), DEBUG_XFERS); 712 } 713 #ifdef DIAGNOSTIC 714 if (xfer->c_bcount < 0) { 715 printf("wdc_atapi_intr warning: bcount value " 716 "is %d after io\n", xfer->c_bcount); 717 } 718 #endif 719 break; 720 721 default: 722 if (++retries<500) { 723 DELAY(100); 724 chp->ch_status = bus_space_read_1(chp->cmd_iot, 725 chp->cmd_ioh, wd_status); 726 chp->ch_error = bus_space_read_1(chp->cmd_iot, 727 chp->cmd_ioh, wd_error); 728 goto again; 729 } 730 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase); 731 if (chp->ch_status & WDCS_ERR) { 732 sc_xfer->error = XS_SHORTSENSE; 733 sc_xfer->sense.atapi_sense = chp->ch_error; 734 } else { 735 if (xfer->c_flags & C_DMA) 736 ata_dmaerr(drvp); 737 sc_xfer->error = XS_RESET; 738 wdc_atapi_reset(chp, xfer); 739 return (1); 740 } 741 } 742 WDCDEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x " 743 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense), 744 DEBUG_INTR); 745 wdc_atapi_done(chp, xfer); 746 return (1); 747 } 748 749 int 750 wdc_atapi_ctrl(chp, xfer, irq) 751 struct channel_softc *chp; 752 struct wdc_xfer *xfer; 753 int irq; 754 { 755 struct scsipi_xfer *sc_xfer = xfer->cmd; 756 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 757 char *errstring = NULL; 758 int delay = (irq == 0) ? ATAPI_DELAY : 0; 759 760 /* Ack interrupt done in wait_for_unbusy */ 761 again: 762 WDCDEBUG_PRINT(("wdc_atapi_ctrl %s:%d:%d state %d\n", 763 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive, drvp->state), 764 DEBUG_INTR | DEBUG_FUNCS); 765 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 766 WDSD_IBM | (xfer->drive << 4)); 767 switch (drvp->state) { 768 case PIOMODE: 769 piomode: 770 /* Don't try to set mode if controller can't be adjusted */ 771 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 772 goto ready; 773 /* Also don't try if the drive didn't report its mode */ 774 if ((drvp->drive_flags & DRIVE_MODE) == 0) 775 goto ready;; 776 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 777 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 778 drvp->state = PIOMODE_WAIT; 779 break; 780 case PIOMODE_WAIT: 781 errstring = "piomode"; 782 if (wait_for_unbusy(chp, delay)) 783 goto timeout; 784 if (chp->ch_status & WDCS_ERR) { 785 if (drvp->PIO_mode < 3) { 786 drvp->PIO_mode = 3; 787 goto piomode; 788 } else { 789 goto error; 790 } 791 } 792 /* fall through */ 793 794 case DMAMODE: 795 if (drvp->drive_flags & DRIVE_UDMA) { 796 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 797 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 798 } else if (drvp->drive_flags & DRIVE_DMA) { 799 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 800 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 801 } else { 802 goto ready; 803 } 804 drvp->state = DMAMODE_WAIT; 805 break; 806 case DMAMODE_WAIT: 807 errstring = "dmamode"; 808 if (wait_for_unbusy(chp, delay)) 809 goto timeout; 810 if (chp->ch_status & WDCS_ERR) 811 goto error; 812 /* fall through */ 813 814 case READY: 815 ready: 816 drvp->state = READY; 817 xfer->c_intr = wdc_atapi_intr; 818 untimeout(wdctimeout, chp); 819 wdc_atapi_start(chp, xfer); 820 return 1; 821 } 822 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 823 chp->ch_flags |= WDCF_IRQ_WAIT; 824 xfer->c_intr = wdc_atapi_ctrl; 825 } else { 826 goto again; 827 } 828 return 1; 829 830 timeout: 831 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 832 return 0; /* IRQ was not for us */ 833 } 834 printf("%s:%d:%d: %s timed out\n", 835 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 836 sc_xfer->error = XS_TIMEOUT; 837 wdc_atapi_reset(chp, xfer); 838 return 1; 839 error: 840 printf("%s:%d:%d: %s ", 841 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 842 errstring); 843 printf("error (0x%x)\n", chp->ch_error); 844 sc_xfer->error = XS_SHORTSENSE; 845 sc_xfer->sense.atapi_sense = chp->ch_error; 846 wdc_atapi_reset(chp, xfer); 847 return 1; 848 } 849 850 void 851 wdc_atapi_done(chp, xfer) 852 struct channel_softc *chp; 853 struct wdc_xfer *xfer; 854 { 855 struct scsipi_xfer *sc_xfer = xfer->cmd; 856 857 WDCDEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n", 858 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 859 (u_int)xfer->c_flags), DEBUG_XFERS); 860 untimeout(wdctimeout, chp); 861 /* remove this command from xfer queue */ 862 wdc_free_xfer(chp, xfer); 863 sc_xfer->xs_status |= XS_STS_DONE; 864 865 WDCDEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS); 866 scsipi_done(sc_xfer); 867 WDCDEBUG_PRINT(("wdcstart from wdc_atapi_done, flags 0x%x\n", 868 chp->ch_flags), DEBUG_XFERS); 869 wdcstart(chp); 870 } 871 872 void 873 wdc_atapi_reset(chp, xfer) 874 struct channel_softc *chp; 875 struct wdc_xfer *xfer; 876 { 877 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 878 struct scsipi_xfer *sc_xfer = xfer->cmd; 879 880 wdccommandshort(chp, xfer->drive, ATAPI_SOFT_RESET); 881 drvp->state = 0; 882 if (wait_for_unbusy(chp, WDC_RESET_WAIT) != 0) { 883 printf("%s:%d:%d: reset failed\n", 884 chp->wdc->sc_dev.dv_xname, chp->channel, 885 xfer->drive); 886 sc_xfer->error = XS_SELTIMEOUT; 887 } 888 wdc_atapi_done(chp, xfer); 889 return; 890 } 891
Indexes created Wed Sep 24 05:09:52 GMT 2025