atapi_wdc.c revision 1.45 1 /* $NetBSD: atapi_wdc.c,v 1.45 2001/12/01 00:00:29 bouyer Exp $ */
2
3 /*
4 * Copyright (c) 1998 Manuel Bouyer.
5 *
6 * Redistribution and use in source and binary forms, with or without
7 * modification, are permitted provided that the following conditions
8 * are met:
9 * 1. Redistributions of source code must retain the above copyright
10 * notice, this list of conditions and the following disclaimer.
11 * 2. Redistributions in binary form must reproduce the above copyright
12 * notice, this list of conditions and the following disclaimer in the
13 * documentation and/or other materials provided with the distribution.
14 * 3. All advertising materials mentioning features or use of this software
15 * must display the following acknowledgement:
16 * This product includes software developed by the University of
17 * California, Berkeley and its contributors.
18 * 4. Neither the name of the University nor the names of its contributors
19 * may be used to endorse or promote products derived from this software
20 * without specific prior written permission.
21 *
22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
32 *
33 */
34
35 #include <sys/cdefs.h>
36 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.45 2001/12/01 00:00:29 bouyer Exp $");
37
38 #ifndef WDCDEBUG
39 #define WDCDEBUG
40 #endif /* WDCDEBUG */
41
42 #include <sys/param.h>
43 #include <sys/systm.h>
44 #include <sys/kernel.h>
45 #include <sys/file.h>
46 #include <sys/stat.h>
47 #include <sys/buf.h>
48 #include <sys/malloc.h>
49 #include <sys/device.h>
50 #include <sys/syslog.h>
51 #include <sys/proc.h>
52 #include <sys/dvdio.h>
53
54 #include <machine/intr.h>
55 #include <machine/bus.h>
56
57 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
58 #define bus_space_write_multi_stream_2 bus_space_write_multi_2
59 #define bus_space_write_multi_stream_4 bus_space_write_multi_4
60 #define bus_space_read_multi_stream_2 bus_space_read_multi_2
61 #define bus_space_read_multi_stream_4 bus_space_read_multi_4
62 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
63
64 #include <dev/ata/atareg.h>
65 #include <dev/ata/atavar.h>
66 #include <dev/ic/wdcreg.h>
67 #include <dev/ic/wdcvar.h>
68
69 #include <dev/scsipi/scsi_all.h> /* for SCSI status */
70
71 #define DEBUG_INTR 0x01
72 #define DEBUG_XFERS 0x02
73 #define DEBUG_STATUS 0x04
74 #define DEBUG_FUNCS 0x08
75 #define DEBUG_PROBE 0x10
76 #ifdef WDCDEBUG
77 int wdcdebug_atapi_mask = 0;
78 #define WDCDEBUG_PRINT(args, level) \
79 if (wdcdebug_atapi_mask & (level)) \
80 printf args
81 #else
82 #define WDCDEBUG_PRINT(args, level)
83 #endif
84
85 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */
86 int wdc_atapi_get_params __P((struct scsipi_channel *, int, int,
87 struct ataparams *));
88 void wdc_atapi_probe_device __P((struct atapibus_softc *, int));
89 void wdc_atapi_minphys __P((struct buf *bp));
90 void wdc_atapi_start __P((struct channel_softc *,struct wdc_xfer *));
91 int wdc_atapi_intr __P((struct channel_softc *, struct wdc_xfer *, int));
92 void wdc_atapi_kill_xfer __P((struct channel_softc *, struct wdc_xfer *));
93 int wdc_atapi_ctrl __P((struct channel_softc *, struct wdc_xfer *, int));
94 void wdc_atapi_phase_complete __P((struct wdc_xfer *));
95 void wdc_atapi_done __P((struct channel_softc *, struct wdc_xfer *));
96 void wdc_atapi_reset __P((struct channel_softc *, struct wdc_xfer *));
97 void wdc_atapi_scsipi_request __P((struct scsipi_channel *,
98 scsipi_adapter_req_t, void *));
99 void wdc_atapi_kill_pending __P((struct scsipi_periph *));
100 void wdc_atapi_polldsc __P((void *arg));
101
102 #define MAX_SIZE MAXPHYS
103
104 const struct scsipi_bustype wdc_atapi_bustype = {
105 SCSIPI_BUSTYPE_ATAPI,
106 atapi_scsipi_cmd,
107 atapi_interpret_sense,
108 atapi_print_addr,
109 wdc_atapi_kill_pending,
110 };
111
112 void
113 wdc_atapibus_attach(chp)
114 struct channel_softc *chp;
115 {
116 struct wdc_softc *wdc = chp->wdc;
117 struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic;
118 struct scsipi_channel *chan = &chp->ch_atapi_channel;
119 struct ata_atapi_attach aa;
120
121 /*
122 * Fill in the scsipi_adapter.
123 */
124 memset(adapt, 0, sizeof(*adapt));
125 adapt->adapt_dev = &wdc->sc_dev;
126 adapt->adapt_nchannels = wdc->nchannels;
127 adapt->adapt_request = wdc_atapi_scsipi_request;
128 adapt->adapt_minphys = wdc_atapi_minphys;
129 if (wdc->cap & WDC_CAPABILITY_NOIRQ)
130 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY;
131 wdc->sc_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device;
132
133 /*
134 * Fill in the scsipi_channel.
135 */
136 memset(chan, 0, sizeof(*chan));
137 chan->chan_adapter = adapt;
138 chan->chan_bustype = &wdc_atapi_bustype;
139 chan->chan_channel = chp->channel;
140 chan->chan_flags = SCSIPI_CHAN_OPENINGS;
141 chan->chan_openings = 1;
142 chan->chan_max_periph = 1;
143 chan->chan_ntargets = 2;
144 chan->chan_nluns = 1;
145
146 memset(&aa, 0, sizeof(aa));
147 aa.aa_type = T_ATAPI;
148 aa.aa_channel = chan->chan_channel;
149 aa.aa_openings = chan->chan_openings;
150 aa.aa_drv_data = chp->ch_drive; /* pass the whole array */
151 aa.aa_bus_private = chan;
152 chp->atapibus = config_found(&wdc->sc_dev, &aa, atapiprint);
153 }
154
155 void
156 wdc_atapi_minphys(bp)
157 struct buf *bp;
158 {
159
160 if (bp->b_bcount > MAX_SIZE)
161 bp->b_bcount = MAX_SIZE;
162 minphys(bp);
163 }
164
165 /*
166 * Kill off all pending xfers for a periph.
167 *
168 * Must be called at splbio().
169 */
170 void
171 wdc_atapi_kill_pending(periph)
172 struct scsipi_periph *periph;
173 {
174 struct wdc_softc *wdc =
175 (void *)periph->periph_channel->chan_adapter->adapt_dev;
176 struct channel_softc *chp =
177 wdc->channels[periph->periph_channel->chan_channel];
178
179 wdc_kill_pending(chp);
180 }
181
182 void
183 wdc_atapi_kill_xfer(chp, xfer)
184 struct channel_softc *chp;
185 struct wdc_xfer *xfer;
186 {
187 struct scsipi_xfer *sc_xfer = xfer->cmd;
188
189 callout_stop(&chp->ch_callout);
190 /* remove this command from xfer queue */
191 wdc_free_xfer(chp, xfer);
192 sc_xfer->error = XS_DRIVER_STUFFUP;
193 scsipi_done(sc_xfer);
194 }
195
196 int
197 wdc_atapi_get_params(chan, drive, flags, id)
198 struct scsipi_channel *chan;
199 int drive, flags;
200 struct ataparams *id;
201 {
202 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev;
203 struct channel_softc *chp = wdc->channels[chan->chan_channel];
204 struct wdc_command wdc_c;
205
206 /* if no ATAPI device detected at wdc attach time, skip */
207 /*
208 * XXX this will break scsireprobe if this is of any interest for
209 * ATAPI devices one day.
210 */
211 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) {
212 WDCDEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n",
213 drive), DEBUG_PROBE);
214 return -1;
215 }
216 memset(&wdc_c, 0, sizeof(struct wdc_command));
217 wdc_c.r_command = ATAPI_SOFT_RESET;
218 wdc_c.r_st_bmask = 0;
219 wdc_c.r_st_pmask = 0;
220 wdc_c.flags = AT_POLL;
221 wdc_c.timeout = WDC_RESET_WAIT;
222 if (wdc_exec_command(&chp->ch_drive[drive], &wdc_c) != WDC_COMPLETE) {
223 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for"
224 " drive %s:%d:%d: driver failed\n",
225 chp->wdc->sc_dev.dv_xname, chp->channel, drive);
226 panic("wdc_atapi_get_params");
227 }
228 if (wdc_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) {
229 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET "
230 "failed for drive %s:%d:%d: error 0x%x\n",
231 chp->wdc->sc_dev.dv_xname, chp->channel, drive,
232 wdc_c.r_error), DEBUG_PROBE);
233 return -1;
234 }
235 chp->ch_drive[drive].state = 0;
236
237 bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status);
238
239 /* Some ATAPI devices need a bit more time after software reset. */
240 delay(5000);
241 if (ata_get_params(&chp->ch_drive[drive], AT_POLL, id) != 0) {
242 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE "
243 "failed for drive %s:%d:%d: error 0x%x\n",
244 chp->wdc->sc_dev.dv_xname, chp->channel, drive,
245 wdc_c.r_error), DEBUG_PROBE);
246 return -1;
247 }
248 return 0;
249 }
250
251 void
252 wdc_atapi_probe_device(sc, target)
253 struct atapibus_softc *sc;
254 int target;
255 {
256 struct scsipi_channel *chan = sc->sc_channel;
257 struct scsipi_periph *periph;
258 struct ataparams ids;
259 struct ataparams *id = &ids;
260 struct ata_drive_datas *drvp = &sc->sc_drvs[target];
261 struct scsipibus_attach_args sa;
262 char serial_number[21], model[41], firmware_revision[9];
263
264 /* skip if already attached */
265 if (scsipi_lookup_periph(chan, target, 0) != NULL)
266 return;
267
268 if (wdc_atapi_get_params(chan, target,
269 XS_CTL_POLL|XS_CTL_NOSLEEP, id) == 0) {
270 #ifdef ATAPI_DEBUG_PROBE
271 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n",
272 sc->sc_dev.dv_xname, target,
273 id->atap_config & ATAPI_CFG_CMD_MASK,
274 id->atap_config & ATAPI_CFG_DRQ_MASK);
275 #endif
276 periph = scsipi_alloc_periph(M_NOWAIT);
277 if (periph == NULL) {
278 printf("%s: unable to allocate periph for drive %d\n",
279 sc->sc_dev.dv_xname, target);
280 return;
281 }
282 periph->periph_dev = NULL;
283 periph->periph_channel = chan;
284 periph->periph_switch = &atapi_probe_periphsw;
285 periph->periph_target = target;
286 periph->periph_lun = 0;
287
288 #ifdef SCSIPI_DEBUG
289 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI &&
290 SCSIPI_DEBUG_TARGET == target)
291 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS;
292 #endif
293 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config);
294 if (id->atap_config & ATAPI_CFG_REMOV)
295 periph->periph_flags |= PERIPH_REMOVABLE;
296 if (periph->periph_type == T_SEQUENTIAL)
297 drvp->drive_flags |= DRIVE_ATAPIST;
298
299 sa.sa_periph = periph;
300 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config);
301 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ?
302 T_REMOV : T_FIXED;
303 scsipi_strvis(model, 40, id->atap_model, 40);
304 scsipi_strvis(serial_number, 20, id->atap_serial, 20);
305 scsipi_strvis(firmware_revision, 8, id->atap_revision, 8);
306 sa.sa_inqbuf.vendor = model;
307 sa.sa_inqbuf.product = serial_number;
308 sa.sa_inqbuf.revision = firmware_revision;
309
310 /*
311 * Determine the operating mode capabilities of the device.
312 */
313 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16)
314 periph->periph_cap |= PERIPH_CAP_CMD16;
315 /* XXX This is gross. */
316 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK);
317
318 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa);
319
320 if (drvp->drv_softc)
321 wdc_probe_caps(drvp);
322 }
323 }
324
325 void
326 wdc_atapi_scsipi_request(chan, req, arg)
327 struct scsipi_channel *chan;
328 scsipi_adapter_req_t req;
329 void *arg;
330 {
331 struct scsipi_adapter *adapt = chan->chan_adapter;
332 struct scsipi_periph *periph;
333 struct scsipi_xfer *sc_xfer;
334 struct wdc_softc *wdc = (void *)adapt->adapt_dev;
335 struct wdc_xfer *xfer;
336 int channel = chan->chan_channel;
337 int drive, s;
338
339 switch (req) {
340 case ADAPTER_REQ_RUN_XFER:
341 sc_xfer = arg;
342 periph = sc_xfer->xs_periph;
343 drive = periph->periph_target;
344
345 WDCDEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n",
346 wdc->sc_dev.dv_xname, channel, drive), DEBUG_XFERS);
347 if ((wdc->sc_dev.dv_flags & DVF_ACTIVE) == 0) {
348 sc_xfer->error = XS_DRIVER_STUFFUP;
349 scsipi_done(sc_xfer);
350 return;
351 }
352
353 xfer = wdc_get_xfer(WDC_NOSLEEP);
354 if (xfer == NULL) {
355 sc_xfer->error = XS_RESOURCE_SHORTAGE;
356 scsipi_done(sc_xfer);
357 return;
358 }
359
360 if (sc_xfer->xs_control & XS_CTL_POLL)
361 xfer->c_flags |= C_POLL;
362 xfer->drive = drive;
363 xfer->c_flags |= C_ATAPI;
364 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY ||
365 sc_xfer->cmd->opcode == GPCMD_SEND_KEY ||
366 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) {
367 /*
368 * DVD authentication commands must always be done in
369 * PIO mode.
370 */
371 xfer->c_flags |= C_FORCEPIO;
372 }
373 xfer->cmd = sc_xfer;
374 xfer->databuf = sc_xfer->data;
375 xfer->c_bcount = sc_xfer->datalen;
376 xfer->c_start = wdc_atapi_start;
377 xfer->c_intr = wdc_atapi_intr;
378 xfer->c_kill_xfer = wdc_atapi_kill_xfer;
379 xfer->c_dscpoll = 0;
380 s = splbio();
381 wdc_exec_xfer(wdc->channels[channel], xfer);
382 #ifdef DIAGNOSTIC
383 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 &&
384 (sc_xfer->xs_status & XS_STS_DONE) == 0)
385 panic("wdc_atapi_scsipi_request: polled command "
386 "not done");
387 #endif
388 splx(s);
389 return;
390
391 default:
392 /* Not supported, nothing to do. */
393 ;
394 }
395 }
396
397 void
398 wdc_atapi_start(chp, xfer)
399 struct channel_softc *chp;
400 struct wdc_xfer *xfer;
401 {
402 struct scsipi_xfer *sc_xfer = xfer->cmd;
403 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
404
405 WDCDEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n",
406 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive,
407 sc_xfer->xs_control), DEBUG_XFERS);
408 /* Adjust C_DMA, it may have changed if we are requesting sense */
409 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
410 sc_xfer->datalen > 0 && !(xfer->c_flags & C_FORCEPIO)) {
411 if (drvp->n_xfers <= NXFER)
412 drvp->n_xfers++;
413 xfer->c_flags |= C_DMA;
414 } else {
415 xfer->c_flags &= ~C_DMA;
416 }
417 /* start timeout machinery */
418 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0)
419 callout_reset(&chp->ch_callout, sc_xfer->timeout * hz / 1000,
420 wdctimeout, chp);
421 /* Do control operations specially. */
422 if (drvp->state < READY) {
423 if (drvp->state != RESET) {
424 printf("%s:%d:%d: bad state %d in wdc_atapi_start\n",
425 chp->wdc->sc_dev.dv_xname, chp->channel,
426 xfer->drive, drvp->state);
427 panic("wdc_atapi_start: bad state");
428 }
429 drvp->state = PIOMODE;
430 wdc_atapi_ctrl(chp, xfer, 0);
431 return;
432 }
433 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
434 WDSD_IBM | (xfer->drive << 4));
435 if (wait_for_unbusy(chp, ATAPI_DELAY) < 0) {
436 printf("wdc_atapi_start: not ready, st = %02x\n",
437 chp->ch_status);
438 sc_xfer->error = XS_TIMEOUT;
439 wdc_atapi_reset(chp, xfer);
440 return;
441 }
442
443 /*
444 * Even with WDCS_ERR, the device should accept a command packet
445 * Limit length to what can be stuffed into the cylinder register
446 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536,
447 * but not all devices do that and it's not obvious from the
448 * ATAPI spec that that behaviour should be expected. If more
449 * data is necessary, multiple data transfer phases will be done.
450 */
451
452 wdccommand(chp, xfer->drive, ATAPI_PKT_CMD,
453 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff,
454 0, 0, 0,
455 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0);
456
457 /*
458 * If there is no interrupt for CMD input, busy-wait for it (done in
459 * the interrupt routine. If it is a polled command, call the interrupt
460 * routine until command is done.
461 */
462 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) !=
463 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) {
464 /* Wait for at last 400ns for status bit to be valid */
465 DELAY(1);
466 if (chp->ch_flags & WDCF_DMA_WAIT) {
467 wdc_dmawait(chp, xfer, sc_xfer->timeout);
468 chp->ch_flags &= ~WDCF_DMA_WAIT;
469 }
470 wdc_atapi_intr(chp, xfer, 0);
471 } else {
472 chp->ch_flags |= WDCF_IRQ_WAIT;
473 }
474 if (sc_xfer->xs_control & XS_CTL_POLL) {
475 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) {
476 /* Wait for at last 400ns for status bit to be valid */
477 DELAY(1);
478 wdc_atapi_intr(chp, xfer, 0);
479 }
480 }
481 }
482
483 int
484 wdc_atapi_intr(chp, xfer, irq)
485 struct channel_softc *chp;
486 struct wdc_xfer *xfer;
487 int irq;
488 {
489 struct scsipi_xfer *sc_xfer = xfer->cmd;
490 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
491 int len, phase, i, retries=0;
492 int ire;
493 int dma_flags = 0;
494 void *cmd;
495
496 WDCDEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n",
497 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive), DEBUG_INTR);
498
499 /* Is it not a transfer, but a control operation? */
500 if (drvp->state < READY) {
501 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n",
502 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
503 drvp->state);
504 panic("wdc_atapi_intr: bad state\n");
505 }
506 /*
507 * If we missed an interrupt in a PIO transfer, reset and restart.
508 * Don't try to continue transfer, we may have missed cycles.
509 */
510 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) {
511 sc_xfer->error = XS_TIMEOUT;
512 wdc_atapi_reset(chp, xfer);
513 return 1;
514 }
515
516 /* Ack interrupt done in wait_for_unbusy */
517 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
518 WDSD_IBM | (xfer->drive << 4));
519 if (wait_for_unbusy(chp,
520 (irq == 0) ? sc_xfer->timeout : 0) != 0) {
521 if (irq && (xfer->c_flags & C_TIMEOU) == 0)
522 return 0; /* IRQ was not for us */
523 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n",
524 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
525 xfer->c_bcount, xfer->c_skip);
526 if (xfer->c_flags & C_DMA) {
527 ata_dmaerr(drvp);
528 }
529 sc_xfer->error = XS_TIMEOUT;
530 wdc_atapi_reset(chp, xfer);
531 return 1;
532 }
533 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
534 chp->wdc->irqack(chp);
535
536 /* If we missed an IRQ and were using DMA, flag it as a DMA error */
537 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) {
538 ata_dmaerr(drvp);
539 }
540 /*
541 * if the request sense command was aborted, report the short sense
542 * previously recorded, else continue normal processing
543 */
544
545 if (xfer->c_flags & C_DMA)
546 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN)
547 ? WDC_DMA_READ : 0;
548 again:
549 len = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo) +
550 256 * bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_hi);
551 ire = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_ireason);
552 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ);
553 WDCDEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x "
554 "ire 0x%x :", xfer->c_bcount,
555 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR);
556
557 switch (phase) {
558 case PHASE_CMDOUT:
559 cmd = sc_xfer->cmd;
560 WDCDEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR);
561 /* Init the DMA channel if necessary */
562 if (xfer->c_flags & C_DMA) {
563 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg,
564 chp->channel, xfer->drive,
565 xfer->databuf, xfer->c_bcount, dma_flags) != 0) {
566 sc_xfer->error = XS_DRIVER_STUFFUP;
567 break;
568 }
569 }
570 /* send packet command */
571 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */
572 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
573 if (drvp->drive_flags & DRIVE_CAP32) {
574 bus_space_write_multi_4(chp->data32iot,
575 chp->data32ioh, 0,
576 (u_int32_t *)cmd,
577 sc_xfer->cmdlen >> 2);
578 } else {
579 bus_space_write_multi_2(chp->cmd_iot,
580 chp->cmd_ioh, wd_data,
581 (u_int16_t *)cmd,
582 sc_xfer->cmdlen >> 1);
583 }
584 } else {
585 if (drvp->drive_flags & DRIVE_CAP32) {
586 bus_space_write_multi_stream_4(chp->data32iot,
587 chp->data32ioh, 0,
588 (u_int32_t *)cmd,
589 sc_xfer->cmdlen >> 2);
590 } else {
591 bus_space_write_multi_stream_2(chp->cmd_iot,
592 chp->cmd_ioh, wd_data,
593 (u_int16_t *)cmd,
594 sc_xfer->cmdlen >> 1);
595 }
596 }
597 /* Start the DMA channel if necessary */
598 if (xfer->c_flags & C_DMA) {
599 (*chp->wdc->dma_start)(chp->wdc->dma_arg,
600 chp->channel, xfer->drive);
601 chp->ch_flags |= WDCF_DMA_WAIT;
602 }
603
604 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
605 chp->ch_flags |= WDCF_IRQ_WAIT;
606 }
607 return 1;
608
609 case PHASE_DATAOUT:
610 /* write data */
611 WDCDEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR);
612 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 ||
613 (xfer->c_flags & C_DMA) != 0) {
614 printf("wdc_atapi_intr: bad data phase DATAOUT\n");
615 if (xfer->c_flags & C_DMA) {
616 ata_dmaerr(drvp);
617 }
618 sc_xfer->error = XS_TIMEOUT;
619 wdc_atapi_reset(chp, xfer);
620 return 1;
621 }
622 if (xfer->c_bcount < len) {
623 printf("wdc_atapi_intr: warning: write only "
624 "%d of %d requested bytes\n", xfer->c_bcount, len);
625 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
626 bus_space_write_multi_2(chp->cmd_iot,
627 chp->cmd_ioh, wd_data,
628 (u_int16_t *)((char *)xfer->databuf +
629 xfer->c_skip),
630 xfer->c_bcount >> 1);
631 } else {
632 bus_space_write_multi_stream_2(chp->cmd_iot,
633 chp->cmd_ioh, wd_data,
634 (u_int16_t *)((char *)xfer->databuf +
635 xfer->c_skip),
636 xfer->c_bcount >> 1);
637 }
638 for (i = xfer->c_bcount; i < len; i += 2)
639 bus_space_write_2(chp->cmd_iot, chp->cmd_ioh,
640 wd_data, 0);
641 xfer->c_skip += xfer->c_bcount;
642 xfer->c_bcount = 0;
643 } else {
644 if (drvp->drive_flags & DRIVE_CAP32) {
645 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
646 bus_space_write_multi_4(chp->data32iot,
647 chp->data32ioh, 0,
648 (u_int32_t *)((char *)xfer->databuf +
649 xfer->c_skip),
650 len >> 2);
651 else
652 bus_space_write_multi_stream_4(chp->data32iot,
653 chp->data32ioh, wd_data,
654 (u_int32_t *)((char *)xfer->databuf +
655 xfer->c_skip),
656 len >> 2);
657
658 xfer->c_skip += len & 0xfffffffc;
659 xfer->c_bcount -= len & 0xfffffffc;
660 len = len & 0x03;
661 }
662 if (len > 0) {
663 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
664 bus_space_write_multi_2(chp->cmd_iot,
665 chp->cmd_ioh, wd_data,
666 (u_int16_t *)((char *)xfer->databuf +
667 xfer->c_skip),
668 len >> 1);
669 else
670 bus_space_write_multi_stream_2(chp->cmd_iot,
671 chp->cmd_ioh, wd_data,
672 (u_int16_t *)((char *)xfer->databuf +
673 xfer->c_skip),
674 len >> 1);
675 xfer->c_skip += len;
676 xfer->c_bcount -= len;
677 }
678 }
679 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
680 chp->ch_flags |= WDCF_IRQ_WAIT;
681 }
682 return 1;
683
684 case PHASE_DATAIN:
685 /* Read data */
686 WDCDEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR);
687 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 ||
688 (xfer->c_flags & C_DMA) != 0) {
689 printf("wdc_atapi_intr: bad data phase DATAIN\n");
690 if (xfer->c_flags & C_DMA) {
691 ata_dmaerr(drvp);
692 }
693 sc_xfer->error = XS_TIMEOUT;
694 wdc_atapi_reset(chp, xfer);
695 return 1;
696 }
697 if (xfer->c_bcount < len) {
698 printf("wdc_atapi_intr: warning: reading only "
699 "%d of %d bytes\n", xfer->c_bcount, len);
700 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
701 bus_space_read_multi_2(chp->cmd_iot,
702 chp->cmd_ioh, wd_data,
703 (u_int16_t *)((char *)xfer->databuf +
704 xfer->c_skip),
705 xfer->c_bcount >> 1);
706 } else {
707 bus_space_read_multi_stream_2(chp->cmd_iot,
708 chp->cmd_ioh, wd_data,
709 (u_int16_t *)((char *)xfer->databuf +
710 xfer->c_skip),
711 xfer->c_bcount >> 1);
712 }
713 wdcbit_bucket(chp, len - xfer->c_bcount);
714 xfer->c_skip += xfer->c_bcount;
715 xfer->c_bcount = 0;
716 } else {
717 if (drvp->drive_flags & DRIVE_CAP32) {
718 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
719 bus_space_read_multi_4(chp->data32iot,
720 chp->data32ioh, 0,
721 (u_int32_t *)((char *)xfer->databuf +
722 xfer->c_skip),
723 len >> 2);
724 else
725 bus_space_read_multi_stream_4(chp->data32iot,
726 chp->data32ioh, wd_data,
727 (u_int32_t *)((char *)xfer->databuf +
728 xfer->c_skip),
729 len >> 2);
730
731 xfer->c_skip += len & 0xfffffffc;
732 xfer->c_bcount -= len & 0xfffffffc;
733 len = len & 0x03;
734 }
735 if (len > 0) {
736 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
737 bus_space_read_multi_2(chp->cmd_iot,
738 chp->cmd_ioh, wd_data,
739 (u_int16_t *)((char *)xfer->databuf +
740 xfer->c_skip),
741 len >> 1);
742 else
743 bus_space_read_multi_stream_2(chp->cmd_iot,
744 chp->cmd_ioh, wd_data,
745 (u_int16_t *)((char *)xfer->databuf +
746 xfer->c_skip),
747 len >> 1);
748 xfer->c_skip += len;
749 xfer->c_bcount -=len;
750 }
751 }
752 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
753 chp->ch_flags |= WDCF_IRQ_WAIT;
754 }
755 return 1;
756
757 case PHASE_ABORTED:
758 case PHASE_COMPLETED:
759 WDCDEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR);
760 if (xfer->c_flags & C_DMA) {
761 xfer->c_bcount -= sc_xfer->datalen;
762 }
763 sc_xfer->resid = xfer->c_bcount;
764 wdc_atapi_phase_complete(xfer);
765 return(1);
766
767 default:
768 if (++retries<500) {
769 DELAY(100);
770 chp->ch_status = bus_space_read_1(chp->cmd_iot,
771 chp->cmd_ioh, wd_status);
772 chp->ch_error = bus_space_read_1(chp->cmd_iot,
773 chp->cmd_ioh, wd_error);
774 goto again;
775 }
776 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase);
777 if (chp->ch_status & WDCS_ERR) {
778 sc_xfer->error = XS_SHORTSENSE;
779 sc_xfer->sense.atapi_sense = chp->ch_error;
780 } else {
781 if (xfer->c_flags & C_DMA) {
782 ata_dmaerr(drvp);
783 }
784 sc_xfer->error = XS_RESET;
785 wdc_atapi_reset(chp, xfer);
786 return (1);
787 }
788 }
789 WDCDEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x "
790 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense),
791 DEBUG_INTR);
792 wdc_atapi_done(chp, xfer);
793 return (1);
794 }
795
796 int
797 wdc_atapi_ctrl(chp, xfer, irq)
798 struct channel_softc *chp;
799 struct wdc_xfer *xfer;
800 int irq;
801 {
802 struct scsipi_xfer *sc_xfer = xfer->cmd;
803 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
804 char *errstring = NULL;
805 int delay = (irq == 0) ? ATAPI_DELAY : 0;
806
807 /* Ack interrupt done in wait_for_unbusy */
808 again:
809 WDCDEBUG_PRINT(("wdc_atapi_ctrl %s:%d:%d state %d\n",
810 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive, drvp->state),
811 DEBUG_INTR | DEBUG_FUNCS);
812 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
813 WDSD_IBM | (xfer->drive << 4));
814 switch (drvp->state) {
815 case PIOMODE:
816 /* Don't try to set mode if controller can't be adjusted */
817 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0)
818 goto ready;
819 /* Also don't try if the drive didn't report its mode */
820 if ((drvp->drive_flags & DRIVE_MODE) == 0)
821 goto ready;
822 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
823 0x08 | drvp->PIO_mode, WDSF_SET_MODE);
824 drvp->state = PIOMODE_WAIT;
825 break;
826 case PIOMODE_WAIT:
827 errstring = "piomode";
828 if (wait_for_unbusy(chp, delay))
829 goto timeout;
830 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
831 chp->wdc->irqack(chp);
832 if (chp->ch_status & WDCS_ERR) {
833 if (chp->ch_error == WDCE_ABRT) {
834 /*
835 * some ATAPI drives rejects pio settings.
836 * all we can do here is fall back to PIO 0
837 */
838 drvp->drive_flags &= ~DRIVE_MODE;
839 drvp->drive_flags &= ~(DRIVE_DMA|DRIVE_UDMA);
840 drvp->PIO_mode = 0;
841 drvp->DMA_mode = 0;
842 printf("%s:%d:%d: pio setting rejected, "
843 "falling back to PIO mode 0\n",
844 chp->wdc->sc_dev.dv_xname,
845 chp->channel, xfer->drive);
846 chp->wdc->set_modes(chp);
847 goto ready;
848 }
849 goto error;
850 }
851 /* fall through */
852
853 case DMAMODE:
854 if (drvp->drive_flags & DRIVE_UDMA) {
855 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
856 0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
857 } else if (drvp->drive_flags & DRIVE_DMA) {
858 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
859 0x20 | drvp->DMA_mode, WDSF_SET_MODE);
860 } else {
861 goto ready;
862 }
863 drvp->state = DMAMODE_WAIT;
864 break;
865 case DMAMODE_WAIT:
866 errstring = "dmamode";
867 if (wait_for_unbusy(chp, delay))
868 goto timeout;
869 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
870 chp->wdc->irqack(chp);
871 if (chp->ch_status & WDCS_ERR)
872 goto error;
873 /* fall through */
874
875 case READY:
876 ready:
877 drvp->state = READY;
878 xfer->c_intr = wdc_atapi_intr;
879 callout_stop(&chp->ch_callout);
880 wdc_atapi_start(chp, xfer);
881 return 1;
882 }
883 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
884 chp->ch_flags |= WDCF_IRQ_WAIT;
885 xfer->c_intr = wdc_atapi_ctrl;
886 } else {
887 goto again;
888 }
889 return 1;
890
891 timeout:
892 if (irq && (xfer->c_flags & C_TIMEOU) == 0) {
893 return 0; /* IRQ was not for us */
894 }
895 printf("%s:%d:%d: %s timed out\n",
896 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
897 sc_xfer->error = XS_TIMEOUT;
898 wdc_atapi_reset(chp, xfer);
899 return 1;
900 error:
901 printf("%s:%d:%d: %s ",
902 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
903 errstring);
904 printf("error (0x%x)\n", chp->ch_error);
905 sc_xfer->error = XS_SHORTSENSE;
906 sc_xfer->sense.atapi_sense = chp->ch_error;
907 wdc_atapi_reset(chp, xfer);
908 return 1;
909 }
910
911 void
912 wdc_atapi_phase_complete(xfer)
913 struct wdc_xfer *xfer;
914 {
915 struct channel_softc *chp = xfer->chp;
916 struct scsipi_xfer *sc_xfer = xfer->cmd;
917 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
918
919 /* wait for DSC if needed */
920 if (drvp->drive_flags & DRIVE_ATAPIST) {
921 WDCDEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) "
922 "polldsc %d\n", chp->wdc->sc_dev.dv_xname, chp->channel,
923 xfer->drive, xfer->c_dscpoll), DEBUG_XFERS);
924 if (cold) {
925 if (wdcwait(chp, WDCS_DSC, WDCS_DSC,
926 sc_xfer->timeout)) {
927 printf("%s:%d:%d: wait_for_dsc failed\n",
928 chp->wdc->sc_dev.dv_xname, chp->channel,
929 xfer->drive);
930 sc_xfer->error = XS_TIMEOUT;
931 wdc_atapi_reset(chp, xfer);
932 return;
933 }
934 } else {
935 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10)) {
936 /* 10ms not enouth, try again in 1 tick */
937 if (xfer->c_dscpoll++ >
938 sc_xfer->timeout * hz / 1000) {
939 printf("%s:%d:%d: wait_for_dsc "
940 "failed\n",
941 chp->wdc->sc_dev.dv_xname,
942 chp->channel, xfer->drive);
943 sc_xfer->error = XS_TIMEOUT;
944 wdc_atapi_reset(chp, xfer);
945 return;
946 }
947 callout_reset(&chp->ch_callout, 1,
948 wdc_atapi_polldsc, xfer);
949 return;
950 }
951 }
952 }
953
954 /*
955 * Some drive occasionally set WDCS_ERR with
956 * "ATA illegal length indication" in the error
957 * register. If we read some data the sense is valid
958 * anyway, so don't report the error.
959 */
960 if (chp->ch_status & WDCS_ERR &&
961 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 ||
962 sc_xfer->resid == sc_xfer->datalen)) {
963 /* save the short sense */
964 sc_xfer->error = XS_SHORTSENSE;
965 sc_xfer->sense.atapi_sense = chp->ch_error;
966 if ((sc_xfer->xs_periph->periph_quirks &
967 PQUIRK_NOSENSE) == 0) {
968 /* ask scsipi to send a REQUEST_SENSE */
969 sc_xfer->error = XS_BUSY;
970 sc_xfer->status = SCSI_CHECK;
971 } else if (chp->wdc->dma_status &
972 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) {
973 ata_dmaerr(drvp);
974 sc_xfer->error = XS_RESET;
975 wdc_atapi_reset(chp, xfer);
976 return;
977 }
978 }
979 if (xfer->c_bcount != 0) {
980 WDCDEBUG_PRINT(("wdc_atapi_intr: bcount value is "
981 "%d after io\n", xfer->c_bcount), DEBUG_XFERS);
982 }
983 #ifdef DIAGNOSTIC
984 if (xfer->c_bcount < 0) {
985 printf("wdc_atapi_intr warning: bcount value "
986 "is %d after io\n", xfer->c_bcount);
987 }
988 #endif
989 WDCDEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), "
990 "error 0x%x sense 0x%x\n", sc_xfer->error,
991 sc_xfer->sense.atapi_sense), DEBUG_INTR);
992 wdc_atapi_done(chp, xfer);
993 }
994
995 void
996 wdc_atapi_done(chp, xfer)
997 struct channel_softc *chp;
998 struct wdc_xfer *xfer;
999 {
1000 struct scsipi_xfer *sc_xfer = xfer->cmd;
1001
1002 WDCDEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n",
1003 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
1004 (u_int)xfer->c_flags), DEBUG_XFERS);
1005 callout_stop(&chp->ch_callout);
1006 /* remove this command from xfer queue */
1007 wdc_free_xfer(chp, xfer);
1008
1009 WDCDEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS);
1010 scsipi_done(sc_xfer);
1011 WDCDEBUG_PRINT(("wdcstart from wdc_atapi_done, flags 0x%x\n",
1012 chp->ch_flags), DEBUG_XFERS);
1013 wdcstart(chp);
1014 }
1015
1016 void
1017 wdc_atapi_reset(chp, xfer)
1018 struct channel_softc *chp;
1019 struct wdc_xfer *xfer;
1020 {
1021 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
1022 struct scsipi_xfer *sc_xfer = xfer->cmd;
1023
1024 wdccommandshort(chp, xfer->drive, ATAPI_SOFT_RESET);
1025 drvp->state = 0;
1026 if (wait_for_unbusy(chp, WDC_RESET_WAIT) != 0) {
1027 printf("%s:%d:%d: reset failed\n",
1028 chp->wdc->sc_dev.dv_xname, chp->channel,
1029 xfer->drive);
1030 sc_xfer->error = XS_SELTIMEOUT;
1031 }
1032 wdc_atapi_done(chp, xfer);
1033 return;
1034 }
1035
1036 void
1037 wdc_atapi_polldsc(arg)
1038 void *arg;
1039 {
1040 wdc_atapi_phase_complete(arg);
1041 }
1042