atapi_wdc.c revision 1.46
1 /* $NetBSD: atapi_wdc.c,v 1.46 2001/12/02 22:44:33 bouyer Exp $ */ 2 3 /* 4 * Copyright (c) 1998 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by the University of 17 * California, Berkeley and its contributors. 18 * 4. Neither the name of the University nor the names of its contributors 19 * may be used to endorse or promote products derived from this software 20 * without specific prior written permission. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 23 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 24 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 25 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 26 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 27 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 28 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 29 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 32 * 33 */ 34 35 #include <sys/cdefs.h> 36 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.46 2001/12/02 22:44:33 bouyer Exp $"); 37 38 #ifndef WDCDEBUG 39 #define WDCDEBUG 40 #endif /* WDCDEBUG */ 41 42 #include <sys/param.h> 43 #include <sys/systm.h> 44 #include <sys/kernel.h> 45 #include <sys/file.h> 46 #include <sys/stat.h> 47 #include <sys/buf.h> 48 #include <sys/malloc.h> 49 #include <sys/device.h> 50 #include <sys/syslog.h> 51 #include <sys/proc.h> 52 #include <sys/dvdio.h> 53 54 #include <machine/intr.h> 55 #include <machine/bus.h> 56 57 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 58 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 59 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 60 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 61 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 62 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 63 64 #include <dev/ata/atareg.h> 65 #include <dev/ata/atavar.h> 66 #include <dev/ic/wdcreg.h> 67 #include <dev/ic/wdcvar.h> 68 69 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 70 71 #define DEBUG_INTR 0x01 72 #define DEBUG_XFERS 0x02 73 #define DEBUG_STATUS 0x04 74 #define DEBUG_FUNCS 0x08 75 #define DEBUG_PROBE 0x10 76 #ifdef WDCDEBUG 77 int wdcdebug_atapi_mask = 0; 78 #define WDCDEBUG_PRINT(args, level) \ 79 if (wdcdebug_atapi_mask & (level)) \ 80 printf args 81 #else 82 #define WDCDEBUG_PRINT(args, level) 83 #endif 84 85 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */ 86 int wdc_atapi_get_params __P((struct scsipi_channel *, int, int, 87 struct ataparams *)); 88 void wdc_atapi_probe_device __P((struct atapibus_softc *, int)); 89 void wdc_atapi_minphys __P((struct buf *bp)); 90 void wdc_atapi_start __P((struct channel_softc *,struct wdc_xfer *)); 91 int wdc_atapi_intr __P((struct channel_softc *, struct wdc_xfer *, int)); 92 void wdc_atapi_kill_xfer __P((struct channel_softc *, struct wdc_xfer *)); 93 int wdc_atapi_ctrl __P((struct channel_softc *, struct wdc_xfer *, int)); 94 void wdc_atapi_phase_complete __P((struct wdc_xfer *)); 95 void wdc_atapi_done __P((struct channel_softc *, struct wdc_xfer *)); 96 void wdc_atapi_reset __P((struct channel_softc *, struct wdc_xfer *)); 97 void wdc_atapi_scsipi_request __P((struct scsipi_channel *, 98 scsipi_adapter_req_t, void *)); 99 void wdc_atapi_kill_pending __P((struct scsipi_periph *)); 100 void wdc_atapi_polldsc __P((void *arg)); 101 102 #define MAX_SIZE MAXPHYS 103 104 const struct scsipi_bustype wdc_atapi_bustype = { 105 SCSIPI_BUSTYPE_ATAPI, 106 atapi_scsipi_cmd, 107 atapi_interpret_sense, 108 atapi_print_addr, 109 wdc_atapi_kill_pending, 110 }; 111 112 void 113 wdc_atapibus_attach(chp) 114 struct channel_softc *chp; 115 { 116 struct wdc_softc *wdc = chp->wdc; 117 struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic; 118 struct scsipi_channel *chan = &chp->ch_atapi_channel; 119 120 /* 121 * Fill in the scsipi_adapter. 122 */ 123 memset(adapt, 0, sizeof(*adapt)); 124 adapt->adapt_dev = &wdc->sc_dev; 125 adapt->adapt_nchannels = wdc->nchannels; 126 adapt->adapt_request = wdc_atapi_scsipi_request; 127 adapt->adapt_minphys = wdc_atapi_minphys; 128 if (wdc->cap & WDC_CAPABILITY_NOIRQ) 129 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY; 130 wdc->sc_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device; 131 132 /* 133 * Fill in the scsipi_channel. 134 */ 135 memset(chan, 0, sizeof(*chan)); 136 chan->chan_adapter = adapt; 137 chan->chan_bustype = &wdc_atapi_bustype; 138 chan->chan_channel = chp->channel; 139 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 140 chan->chan_openings = 1; 141 chan->chan_max_periph = 1; 142 chan->chan_ntargets = 2; 143 chan->chan_nluns = 1; 144 145 chp->atapibus = config_found(&wdc->sc_dev, chan, atapiprint); 146 } 147 148 void 149 wdc_atapi_minphys(bp) 150 struct buf *bp; 151 { 152 153 if (bp->b_bcount > MAX_SIZE) 154 bp->b_bcount = MAX_SIZE; 155 minphys(bp); 156 } 157 158 /* 159 * Kill off all pending xfers for a periph. 160 * 161 * Must be called at splbio(). 162 */ 163 void 164 wdc_atapi_kill_pending(periph) 165 struct scsipi_periph *periph; 166 { 167 struct wdc_softc *wdc = 168 (void *)periph->periph_channel->chan_adapter->adapt_dev; 169 struct channel_softc *chp = 170 wdc->channels[periph->periph_channel->chan_channel]; 171 172 wdc_kill_pending(chp); 173 } 174 175 void 176 wdc_atapi_kill_xfer(chp, xfer) 177 struct channel_softc *chp; 178 struct wdc_xfer *xfer; 179 { 180 struct scsipi_xfer *sc_xfer = xfer->cmd; 181 182 callout_stop(&chp->ch_callout); 183 /* remove this command from xfer queue */ 184 wdc_free_xfer(chp, xfer); 185 sc_xfer->error = XS_DRIVER_STUFFUP; 186 scsipi_done(sc_xfer); 187 } 188 189 int 190 wdc_atapi_get_params(chan, drive, flags, id) 191 struct scsipi_channel *chan; 192 int drive, flags; 193 struct ataparams *id; 194 { 195 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 196 struct channel_softc *chp = wdc->channels[chan->chan_channel]; 197 struct wdc_command wdc_c; 198 199 /* if no ATAPI device detected at wdc attach time, skip */ 200 /* 201 * XXX this will break scsireprobe if this is of any interest for 202 * ATAPI devices one day. 203 */ 204 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) { 205 WDCDEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n", 206 drive), DEBUG_PROBE); 207 return -1; 208 } 209 memset(&wdc_c, 0, sizeof(struct wdc_command)); 210 wdc_c.r_command = ATAPI_SOFT_RESET; 211 wdc_c.r_st_bmask = 0; 212 wdc_c.r_st_pmask = 0; 213 wdc_c.flags = AT_POLL; 214 wdc_c.timeout = WDC_RESET_WAIT; 215 if (wdc_exec_command(&chp->ch_drive[drive], &wdc_c) != WDC_COMPLETE) { 216 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for" 217 " drive %s:%d:%d: driver failed\n", 218 chp->wdc->sc_dev.dv_xname, chp->channel, drive); 219 panic("wdc_atapi_get_params"); 220 } 221 if (wdc_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 222 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET " 223 "failed for drive %s:%d:%d: error 0x%x\n", 224 chp->wdc->sc_dev.dv_xname, chp->channel, drive, 225 wdc_c.r_error), DEBUG_PROBE); 226 return -1; 227 } 228 chp->ch_drive[drive].state = 0; 229 230 bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_status); 231 232 /* Some ATAPI devices need a bit more time after software reset. */ 233 delay(5000); 234 if (ata_get_params(&chp->ch_drive[drive], AT_POLL, id) != 0) { 235 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE " 236 "failed for drive %s:%d:%d: error 0x%x\n", 237 chp->wdc->sc_dev.dv_xname, chp->channel, drive, 238 wdc_c.r_error), DEBUG_PROBE); 239 return -1; 240 } 241 return 0; 242 } 243 244 void 245 wdc_atapi_probe_device(sc, target) 246 struct atapibus_softc *sc; 247 int target; 248 { 249 struct scsipi_channel *chan = sc->sc_channel; 250 struct scsipi_periph *periph; 251 struct ataparams ids; 252 struct ataparams *id = &ids; 253 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 254 struct channel_softc *chp = wdc->channels[chan->chan_channel]; 255 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 256 struct scsipibus_attach_args sa; 257 char serial_number[21], model[41], firmware_revision[9]; 258 259 /* skip if already attached */ 260 if (scsipi_lookup_periph(chan, target, 0) != NULL) 261 return; 262 263 if (wdc_atapi_get_params(chan, target, 264 XS_CTL_POLL|XS_CTL_NOSLEEP, id) == 0) { 265 #ifdef ATAPI_DEBUG_PROBE 266 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 267 sc->sc_dev.dv_xname, target, 268 id->atap_config & ATAPI_CFG_CMD_MASK, 269 id->atap_config & ATAPI_CFG_DRQ_MASK); 270 #endif 271 periph = scsipi_alloc_periph(M_NOWAIT); 272 if (periph == NULL) { 273 printf("%s: unable to allocate periph for drive %d\n", 274 sc->sc_dev.dv_xname, target); 275 return; 276 } 277 periph->periph_dev = NULL; 278 periph->periph_channel = chan; 279 periph->periph_switch = &atapi_probe_periphsw; 280 periph->periph_target = target; 281 periph->periph_lun = 0; 282 283 #ifdef SCSIPI_DEBUG 284 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 285 SCSIPI_DEBUG_TARGET == target) 286 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 287 #endif 288 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 289 if (id->atap_config & ATAPI_CFG_REMOV) 290 periph->periph_flags |= PERIPH_REMOVABLE; 291 if (periph->periph_type == T_SEQUENTIAL) 292 drvp->drive_flags |= DRIVE_ATAPIST; 293 294 sa.sa_periph = periph; 295 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 296 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 297 T_REMOV : T_FIXED; 298 scsipi_strvis(model, 40, id->atap_model, 40); 299 scsipi_strvis(serial_number, 20, id->atap_serial, 20); 300 scsipi_strvis(firmware_revision, 8, id->atap_revision, 8); 301 sa.sa_inqbuf.vendor = model; 302 sa.sa_inqbuf.product = serial_number; 303 sa.sa_inqbuf.revision = firmware_revision; 304 305 /* 306 * Determine the operating mode capabilities of the device. 307 */ 308 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16) 309 periph->periph_cap |= PERIPH_CAP_CMD16; 310 /* XXX This is gross. */ 311 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 312 313 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 314 315 if (drvp->drv_softc) 316 wdc_probe_caps(drvp); 317 } 318 } 319 320 void 321 wdc_atapi_scsipi_request(chan, req, arg) 322 struct scsipi_channel *chan; 323 scsipi_adapter_req_t req; 324 void *arg; 325 { 326 struct scsipi_adapter *adapt = chan->chan_adapter; 327 struct scsipi_periph *periph; 328 struct scsipi_xfer *sc_xfer; 329 struct wdc_softc *wdc = (void *)adapt->adapt_dev; 330 struct wdc_xfer *xfer; 331 int channel = chan->chan_channel; 332 int drive, s; 333 334 switch (req) { 335 case ADAPTER_REQ_RUN_XFER: 336 sc_xfer = arg; 337 periph = sc_xfer->xs_periph; 338 drive = periph->periph_target; 339 340 WDCDEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n", 341 wdc->sc_dev.dv_xname, channel, drive), DEBUG_XFERS); 342 if ((wdc->sc_dev.dv_flags & DVF_ACTIVE) == 0) { 343 sc_xfer->error = XS_DRIVER_STUFFUP; 344 scsipi_done(sc_xfer); 345 return; 346 } 347 348 xfer = wdc_get_xfer(WDC_NOSLEEP); 349 if (xfer == NULL) { 350 sc_xfer->error = XS_RESOURCE_SHORTAGE; 351 scsipi_done(sc_xfer); 352 return; 353 } 354 355 if (sc_xfer->xs_control & XS_CTL_POLL) 356 xfer->c_flags |= C_POLL; 357 xfer->drive = drive; 358 xfer->c_flags |= C_ATAPI; 359 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY || 360 sc_xfer->cmd->opcode == GPCMD_SEND_KEY || 361 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) { 362 /* 363 * DVD authentication commands must always be done in 364 * PIO mode. 365 */ 366 xfer->c_flags |= C_FORCEPIO; 367 } 368 xfer->cmd = sc_xfer; 369 xfer->databuf = sc_xfer->data; 370 xfer->c_bcount = sc_xfer->datalen; 371 xfer->c_start = wdc_atapi_start; 372 xfer->c_intr = wdc_atapi_intr; 373 xfer->c_kill_xfer = wdc_atapi_kill_xfer; 374 xfer->c_dscpoll = 0; 375 s = splbio(); 376 wdc_exec_xfer(wdc->channels[channel], xfer); 377 #ifdef DIAGNOSTIC 378 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 379 (sc_xfer->xs_status & XS_STS_DONE) == 0) 380 panic("wdc_atapi_scsipi_request: polled command " 381 "not done"); 382 #endif 383 splx(s); 384 return; 385 386 default: 387 /* Not supported, nothing to do. */ 388 ; 389 } 390 } 391 392 void 393 wdc_atapi_start(chp, xfer) 394 struct channel_softc *chp; 395 struct wdc_xfer *xfer; 396 { 397 struct scsipi_xfer *sc_xfer = xfer->cmd; 398 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 399 400 WDCDEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n", 401 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive, 402 sc_xfer->xs_control), DEBUG_XFERS); 403 /* Adjust C_DMA, it may have changed if we are requesting sense */ 404 if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) && 405 sc_xfer->datalen > 0 && !(xfer->c_flags & C_FORCEPIO)) { 406 if (drvp->n_xfers <= NXFER) 407 drvp->n_xfers++; 408 xfer->c_flags |= C_DMA; 409 } else { 410 xfer->c_flags &= ~C_DMA; 411 } 412 /* start timeout machinery */ 413 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 414 callout_reset(&chp->ch_callout, sc_xfer->timeout * hz / 1000, 415 wdctimeout, chp); 416 /* Do control operations specially. */ 417 if (drvp->state < READY) { 418 if (drvp->state != RESET) { 419 printf("%s:%d:%d: bad state %d in wdc_atapi_start\n", 420 chp->wdc->sc_dev.dv_xname, chp->channel, 421 xfer->drive, drvp->state); 422 panic("wdc_atapi_start: bad state"); 423 } 424 drvp->state = PIOMODE; 425 wdc_atapi_ctrl(chp, xfer, 0); 426 return; 427 } 428 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 429 WDSD_IBM | (xfer->drive << 4)); 430 if (wait_for_unbusy(chp, ATAPI_DELAY) < 0) { 431 printf("wdc_atapi_start: not ready, st = %02x\n", 432 chp->ch_status); 433 sc_xfer->error = XS_TIMEOUT; 434 wdc_atapi_reset(chp, xfer); 435 return; 436 } 437 438 /* 439 * Even with WDCS_ERR, the device should accept a command packet 440 * Limit length to what can be stuffed into the cylinder register 441 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536, 442 * but not all devices do that and it's not obvious from the 443 * ATAPI spec that that behaviour should be expected. If more 444 * data is necessary, multiple data transfer phases will be done. 445 */ 446 447 wdccommand(chp, xfer->drive, ATAPI_PKT_CMD, 448 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff, 449 0, 0, 0, 450 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0); 451 452 /* 453 * If there is no interrupt for CMD input, busy-wait for it (done in 454 * the interrupt routine. If it is a polled command, call the interrupt 455 * routine until command is done. 456 */ 457 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) != 458 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) { 459 /* Wait for at last 400ns for status bit to be valid */ 460 DELAY(1); 461 if (chp->ch_flags & WDCF_DMA_WAIT) { 462 wdc_dmawait(chp, xfer, sc_xfer->timeout); 463 chp->ch_flags &= ~WDCF_DMA_WAIT; 464 } 465 wdc_atapi_intr(chp, xfer, 0); 466 } else { 467 chp->ch_flags |= WDCF_IRQ_WAIT; 468 } 469 if (sc_xfer->xs_control & XS_CTL_POLL) { 470 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 471 /* Wait for at last 400ns for status bit to be valid */ 472 DELAY(1); 473 wdc_atapi_intr(chp, xfer, 0); 474 } 475 } 476 } 477 478 int 479 wdc_atapi_intr(chp, xfer, irq) 480 struct channel_softc *chp; 481 struct wdc_xfer *xfer; 482 int irq; 483 { 484 struct scsipi_xfer *sc_xfer = xfer->cmd; 485 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 486 int len, phase, i, retries=0; 487 int ire; 488 int dma_flags = 0; 489 void *cmd; 490 491 WDCDEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n", 492 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive), DEBUG_INTR); 493 494 /* Is it not a transfer, but a control operation? */ 495 if (drvp->state < READY) { 496 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n", 497 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 498 drvp->state); 499 panic("wdc_atapi_intr: bad state\n"); 500 } 501 /* 502 * If we missed an interrupt in a PIO transfer, reset and restart. 503 * Don't try to continue transfer, we may have missed cycles. 504 */ 505 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 506 sc_xfer->error = XS_TIMEOUT; 507 wdc_atapi_reset(chp, xfer); 508 return 1; 509 } 510 511 /* Ack interrupt done in wait_for_unbusy */ 512 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 513 WDSD_IBM | (xfer->drive << 4)); 514 if (wait_for_unbusy(chp, 515 (irq == 0) ? sc_xfer->timeout : 0) != 0) { 516 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 517 return 0; /* IRQ was not for us */ 518 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n", 519 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 520 xfer->c_bcount, xfer->c_skip); 521 if (xfer->c_flags & C_DMA) { 522 ata_dmaerr(drvp); 523 } 524 sc_xfer->error = XS_TIMEOUT; 525 wdc_atapi_reset(chp, xfer); 526 return 1; 527 } 528 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 529 chp->wdc->irqack(chp); 530 531 /* If we missed an IRQ and were using DMA, flag it as a DMA error */ 532 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) { 533 ata_dmaerr(drvp); 534 } 535 /* 536 * if the request sense command was aborted, report the short sense 537 * previously recorded, else continue normal processing 538 */ 539 540 if (xfer->c_flags & C_DMA) 541 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 542 ? WDC_DMA_READ : 0; 543 again: 544 len = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo) + 545 256 * bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_hi); 546 ire = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_ireason); 547 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ); 548 WDCDEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x " 549 "ire 0x%x :", xfer->c_bcount, 550 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR); 551 552 switch (phase) { 553 case PHASE_CMDOUT: 554 cmd = sc_xfer->cmd; 555 WDCDEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR); 556 /* Init the DMA channel if necessary */ 557 if (xfer->c_flags & C_DMA) { 558 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 559 chp->channel, xfer->drive, 560 xfer->databuf, xfer->c_bcount, dma_flags) != 0) { 561 sc_xfer->error = XS_DRIVER_STUFFUP; 562 break; 563 } 564 } 565 /* send packet command */ 566 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */ 567 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 568 if (drvp->drive_flags & DRIVE_CAP32) { 569 bus_space_write_multi_4(chp->data32iot, 570 chp->data32ioh, 0, 571 (u_int32_t *)cmd, 572 sc_xfer->cmdlen >> 2); 573 } else { 574 bus_space_write_multi_2(chp->cmd_iot, 575 chp->cmd_ioh, wd_data, 576 (u_int16_t *)cmd, 577 sc_xfer->cmdlen >> 1); 578 } 579 } else { 580 if (drvp->drive_flags & DRIVE_CAP32) { 581 bus_space_write_multi_stream_4(chp->data32iot, 582 chp->data32ioh, 0, 583 (u_int32_t *)cmd, 584 sc_xfer->cmdlen >> 2); 585 } else { 586 bus_space_write_multi_stream_2(chp->cmd_iot, 587 chp->cmd_ioh, wd_data, 588 (u_int16_t *)cmd, 589 sc_xfer->cmdlen >> 1); 590 } 591 } 592 /* Start the DMA channel if necessary */ 593 if (xfer->c_flags & C_DMA) { 594 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 595 chp->channel, xfer->drive); 596 chp->ch_flags |= WDCF_DMA_WAIT; 597 } 598 599 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 600 chp->ch_flags |= WDCF_IRQ_WAIT; 601 } 602 return 1; 603 604 case PHASE_DATAOUT: 605 /* write data */ 606 WDCDEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR); 607 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 || 608 (xfer->c_flags & C_DMA) != 0) { 609 printf("wdc_atapi_intr: bad data phase DATAOUT\n"); 610 if (xfer->c_flags & C_DMA) { 611 ata_dmaerr(drvp); 612 } 613 sc_xfer->error = XS_TIMEOUT; 614 wdc_atapi_reset(chp, xfer); 615 return 1; 616 } 617 if (xfer->c_bcount < len) { 618 printf("wdc_atapi_intr: warning: write only " 619 "%d of %d requested bytes\n", xfer->c_bcount, len); 620 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 621 bus_space_write_multi_2(chp->cmd_iot, 622 chp->cmd_ioh, wd_data, 623 (u_int16_t *)((char *)xfer->databuf + 624 xfer->c_skip), 625 xfer->c_bcount >> 1); 626 } else { 627 bus_space_write_multi_stream_2(chp->cmd_iot, 628 chp->cmd_ioh, wd_data, 629 (u_int16_t *)((char *)xfer->databuf + 630 xfer->c_skip), 631 xfer->c_bcount >> 1); 632 } 633 for (i = xfer->c_bcount; i < len; i += 2) 634 bus_space_write_2(chp->cmd_iot, chp->cmd_ioh, 635 wd_data, 0); 636 xfer->c_skip += xfer->c_bcount; 637 xfer->c_bcount = 0; 638 } else { 639 if (drvp->drive_flags & DRIVE_CAP32) { 640 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 641 bus_space_write_multi_4(chp->data32iot, 642 chp->data32ioh, 0, 643 (u_int32_t *)((char *)xfer->databuf + 644 xfer->c_skip), 645 len >> 2); 646 else 647 bus_space_write_multi_stream_4(chp->data32iot, 648 chp->data32ioh, wd_data, 649 (u_int32_t *)((char *)xfer->databuf + 650 xfer->c_skip), 651 len >> 2); 652 653 xfer->c_skip += len & 0xfffffffc; 654 xfer->c_bcount -= len & 0xfffffffc; 655 len = len & 0x03; 656 } 657 if (len > 0) { 658 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 659 bus_space_write_multi_2(chp->cmd_iot, 660 chp->cmd_ioh, wd_data, 661 (u_int16_t *)((char *)xfer->databuf + 662 xfer->c_skip), 663 len >> 1); 664 else 665 bus_space_write_multi_stream_2(chp->cmd_iot, 666 chp->cmd_ioh, wd_data, 667 (u_int16_t *)((char *)xfer->databuf + 668 xfer->c_skip), 669 len >> 1); 670 xfer->c_skip += len; 671 xfer->c_bcount -= len; 672 } 673 } 674 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 675 chp->ch_flags |= WDCF_IRQ_WAIT; 676 } 677 return 1; 678 679 case PHASE_DATAIN: 680 /* Read data */ 681 WDCDEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR); 682 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 || 683 (xfer->c_flags & C_DMA) != 0) { 684 printf("wdc_atapi_intr: bad data phase DATAIN\n"); 685 if (xfer->c_flags & C_DMA) { 686 ata_dmaerr(drvp); 687 } 688 sc_xfer->error = XS_TIMEOUT; 689 wdc_atapi_reset(chp, xfer); 690 return 1; 691 } 692 if (xfer->c_bcount < len) { 693 printf("wdc_atapi_intr: warning: reading only " 694 "%d of %d bytes\n", xfer->c_bcount, len); 695 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 696 bus_space_read_multi_2(chp->cmd_iot, 697 chp->cmd_ioh, wd_data, 698 (u_int16_t *)((char *)xfer->databuf + 699 xfer->c_skip), 700 xfer->c_bcount >> 1); 701 } else { 702 bus_space_read_multi_stream_2(chp->cmd_iot, 703 chp->cmd_ioh, wd_data, 704 (u_int16_t *)((char *)xfer->databuf + 705 xfer->c_skip), 706 xfer->c_bcount >> 1); 707 } 708 wdcbit_bucket(chp, len - xfer->c_bcount); 709 xfer->c_skip += xfer->c_bcount; 710 xfer->c_bcount = 0; 711 } else { 712 if (drvp->drive_flags & DRIVE_CAP32) { 713 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 714 bus_space_read_multi_4(chp->data32iot, 715 chp->data32ioh, 0, 716 (u_int32_t *)((char *)xfer->databuf + 717 xfer->c_skip), 718 len >> 2); 719 else 720 bus_space_read_multi_stream_4(chp->data32iot, 721 chp->data32ioh, wd_data, 722 (u_int32_t *)((char *)xfer->databuf + 723 xfer->c_skip), 724 len >> 2); 725 726 xfer->c_skip += len & 0xfffffffc; 727 xfer->c_bcount -= len & 0xfffffffc; 728 len = len & 0x03; 729 } 730 if (len > 0) { 731 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 732 bus_space_read_multi_2(chp->cmd_iot, 733 chp->cmd_ioh, wd_data, 734 (u_int16_t *)((char *)xfer->databuf + 735 xfer->c_skip), 736 len >> 1); 737 else 738 bus_space_read_multi_stream_2(chp->cmd_iot, 739 chp->cmd_ioh, wd_data, 740 (u_int16_t *)((char *)xfer->databuf + 741 xfer->c_skip), 742 len >> 1); 743 xfer->c_skip += len; 744 xfer->c_bcount -=len; 745 } 746 } 747 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 748 chp->ch_flags |= WDCF_IRQ_WAIT; 749 } 750 return 1; 751 752 case PHASE_ABORTED: 753 case PHASE_COMPLETED: 754 WDCDEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR); 755 if (xfer->c_flags & C_DMA) { 756 xfer->c_bcount -= sc_xfer->datalen; 757 } 758 sc_xfer->resid = xfer->c_bcount; 759 wdc_atapi_phase_complete(xfer); 760 return(1); 761 762 default: 763 if (++retries<500) { 764 DELAY(100); 765 chp->ch_status = bus_space_read_1(chp->cmd_iot, 766 chp->cmd_ioh, wd_status); 767 chp->ch_error = bus_space_read_1(chp->cmd_iot, 768 chp->cmd_ioh, wd_error); 769 goto again; 770 } 771 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase); 772 if (chp->ch_status & WDCS_ERR) { 773 sc_xfer->error = XS_SHORTSENSE; 774 sc_xfer->sense.atapi_sense = chp->ch_error; 775 } else { 776 if (xfer->c_flags & C_DMA) { 777 ata_dmaerr(drvp); 778 } 779 sc_xfer->error = XS_RESET; 780 wdc_atapi_reset(chp, xfer); 781 return (1); 782 } 783 } 784 WDCDEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x " 785 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense), 786 DEBUG_INTR); 787 wdc_atapi_done(chp, xfer); 788 return (1); 789 } 790 791 int 792 wdc_atapi_ctrl(chp, xfer, irq) 793 struct channel_softc *chp; 794 struct wdc_xfer *xfer; 795 int irq; 796 { 797 struct scsipi_xfer *sc_xfer = xfer->cmd; 798 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 799 char *errstring = NULL; 800 int delay = (irq == 0) ? ATAPI_DELAY : 0; 801 802 /* Ack interrupt done in wait_for_unbusy */ 803 again: 804 WDCDEBUG_PRINT(("wdc_atapi_ctrl %s:%d:%d state %d\n", 805 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive, drvp->state), 806 DEBUG_INTR | DEBUG_FUNCS); 807 bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh, 808 WDSD_IBM | (xfer->drive << 4)); 809 switch (drvp->state) { 810 case PIOMODE: 811 /* Don't try to set mode if controller can't be adjusted */ 812 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 813 goto ready; 814 /* Also don't try if the drive didn't report its mode */ 815 if ((drvp->drive_flags & DRIVE_MODE) == 0) 816 goto ready; 817 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 818 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 819 drvp->state = PIOMODE_WAIT; 820 break; 821 case PIOMODE_WAIT: 822 errstring = "piomode"; 823 if (wait_for_unbusy(chp, delay)) 824 goto timeout; 825 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 826 chp->wdc->irqack(chp); 827 if (chp->ch_status & WDCS_ERR) { 828 if (chp->ch_error == WDCE_ABRT) { 829 /* 830 * some ATAPI drives rejects pio settings. 831 * all we can do here is fall back to PIO 0 832 */ 833 drvp->drive_flags &= ~DRIVE_MODE; 834 drvp->drive_flags &= ~(DRIVE_DMA|DRIVE_UDMA); 835 drvp->PIO_mode = 0; 836 drvp->DMA_mode = 0; 837 printf("%s:%d:%d: pio setting rejected, " 838 "falling back to PIO mode 0\n", 839 chp->wdc->sc_dev.dv_xname, 840 chp->channel, xfer->drive); 841 chp->wdc->set_modes(chp); 842 goto ready; 843 } 844 goto error; 845 } 846 /* fall through */ 847 848 case DMAMODE: 849 if (drvp->drive_flags & DRIVE_UDMA) { 850 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 851 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 852 } else if (drvp->drive_flags & DRIVE_DMA) { 853 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 854 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 855 } else { 856 goto ready; 857 } 858 drvp->state = DMAMODE_WAIT; 859 break; 860 case DMAMODE_WAIT: 861 errstring = "dmamode"; 862 if (wait_for_unbusy(chp, delay)) 863 goto timeout; 864 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 865 chp->wdc->irqack(chp); 866 if (chp->ch_status & WDCS_ERR) 867 goto error; 868 /* fall through */ 869 870 case READY: 871 ready: 872 drvp->state = READY; 873 xfer->c_intr = wdc_atapi_intr; 874 callout_stop(&chp->ch_callout); 875 wdc_atapi_start(chp, xfer); 876 return 1; 877 } 878 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 879 chp->ch_flags |= WDCF_IRQ_WAIT; 880 xfer->c_intr = wdc_atapi_ctrl; 881 } else { 882 goto again; 883 } 884 return 1; 885 886 timeout: 887 if (irq && (xfer->c_flags & C_TIMEOU) == 0) { 888 return 0; /* IRQ was not for us */ 889 } 890 printf("%s:%d:%d: %s timed out\n", 891 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring); 892 sc_xfer->error = XS_TIMEOUT; 893 wdc_atapi_reset(chp, xfer); 894 return 1; 895 error: 896 printf("%s:%d:%d: %s ", 897 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 898 errstring); 899 printf("error (0x%x)\n", chp->ch_error); 900 sc_xfer->error = XS_SHORTSENSE; 901 sc_xfer->sense.atapi_sense = chp->ch_error; 902 wdc_atapi_reset(chp, xfer); 903 return 1; 904 } 905 906 void 907 wdc_atapi_phase_complete(xfer) 908 struct wdc_xfer *xfer; 909 { 910 struct channel_softc *chp = xfer->chp; 911 struct scsipi_xfer *sc_xfer = xfer->cmd; 912 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 913 914 /* wait for DSC if needed */ 915 if (drvp->drive_flags & DRIVE_ATAPIST) { 916 WDCDEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) " 917 "polldsc %d\n", chp->wdc->sc_dev.dv_xname, chp->channel, 918 xfer->drive, xfer->c_dscpoll), DEBUG_XFERS); 919 if (cold) { 920 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 921 sc_xfer->timeout)) { 922 printf("%s:%d:%d: wait_for_dsc failed\n", 923 chp->wdc->sc_dev.dv_xname, chp->channel, 924 xfer->drive); 925 sc_xfer->error = XS_TIMEOUT; 926 wdc_atapi_reset(chp, xfer); 927 return; 928 } 929 } else { 930 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10)) { 931 /* 10ms not enouth, try again in 1 tick */ 932 if (xfer->c_dscpoll++ > 933 sc_xfer->timeout * hz / 1000) { 934 printf("%s:%d:%d: wait_for_dsc " 935 "failed\n", 936 chp->wdc->sc_dev.dv_xname, 937 chp->channel, xfer->drive); 938 sc_xfer->error = XS_TIMEOUT; 939 wdc_atapi_reset(chp, xfer); 940 return; 941 } 942 callout_reset(&chp->ch_callout, 1, 943 wdc_atapi_polldsc, xfer); 944 return; 945 } 946 } 947 } 948 949 /* 950 * Some drive occasionally set WDCS_ERR with 951 * "ATA illegal length indication" in the error 952 * register. If we read some data the sense is valid 953 * anyway, so don't report the error. 954 */ 955 if (chp->ch_status & WDCS_ERR && 956 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 957 sc_xfer->resid == sc_xfer->datalen)) { 958 /* save the short sense */ 959 sc_xfer->error = XS_SHORTSENSE; 960 sc_xfer->sense.atapi_sense = chp->ch_error; 961 if ((sc_xfer->xs_periph->periph_quirks & 962 PQUIRK_NOSENSE) == 0) { 963 /* ask scsipi to send a REQUEST_SENSE */ 964 sc_xfer->error = XS_BUSY; 965 sc_xfer->status = SCSI_CHECK; 966 } else if (chp->wdc->dma_status & 967 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) { 968 ata_dmaerr(drvp); 969 sc_xfer->error = XS_RESET; 970 wdc_atapi_reset(chp, xfer); 971 return; 972 } 973 } 974 if (xfer->c_bcount != 0) { 975 WDCDEBUG_PRINT(("wdc_atapi_intr: bcount value is " 976 "%d after io\n", xfer->c_bcount), DEBUG_XFERS); 977 } 978 #ifdef DIAGNOSTIC 979 if (xfer->c_bcount < 0) { 980 printf("wdc_atapi_intr warning: bcount value " 981 "is %d after io\n", xfer->c_bcount); 982 } 983 #endif 984 WDCDEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), " 985 "error 0x%x sense 0x%x\n", sc_xfer->error, 986 sc_xfer->sense.atapi_sense), DEBUG_INTR); 987 wdc_atapi_done(chp, xfer); 988 } 989 990 void 991 wdc_atapi_done(chp, xfer) 992 struct channel_softc *chp; 993 struct wdc_xfer *xfer; 994 { 995 struct scsipi_xfer *sc_xfer = xfer->cmd; 996 997 WDCDEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n", 998 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, 999 (u_int)xfer->c_flags), DEBUG_XFERS); 1000 callout_stop(&chp->ch_callout); 1001 /* remove this command from xfer queue */ 1002 wdc_free_xfer(chp, xfer); 1003 1004 WDCDEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS); 1005 scsipi_done(sc_xfer); 1006 WDCDEBUG_PRINT(("wdcstart from wdc_atapi_done, flags 0x%x\n", 1007 chp->ch_flags), DEBUG_XFERS); 1008 wdcstart(chp); 1009 } 1010 1011 void 1012 wdc_atapi_reset(chp, xfer) 1013 struct channel_softc *chp; 1014 struct wdc_xfer *xfer; 1015 { 1016 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive]; 1017 struct scsipi_xfer *sc_xfer = xfer->cmd; 1018 1019 wdccommandshort(chp, xfer->drive, ATAPI_SOFT_RESET); 1020 drvp->state = 0; 1021 if (wait_for_unbusy(chp, WDC_RESET_WAIT) != 0) { 1022 printf("%s:%d:%d: reset failed\n", 1023 chp->wdc->sc_dev.dv_xname, chp->channel, 1024 xfer->drive); 1025 sc_xfer->error = XS_SELTIMEOUT; 1026 } 1027 wdc_atapi_done(chp, xfer); 1028 return; 1029 } 1030 1031 void 1032 wdc_atapi_polldsc(arg) 1033 void *arg; 1034 { 1035 wdc_atapi_phase_complete(arg); 1036 } 1037
Indexes created Mon Sep 22 21:09:42 GMT 2025