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atapi_wdc.c revision 1.58
      1 /*	$NetBSD: atapi_wdc.c,v 1.58 2003/10/05 17:48:49 bouyer Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998, 2001 Manuel Bouyer.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *	This product includes software developed by Manuel Bouyer.
     17  * 4. The name of the author may not be used to endorse or promote products
     18  *    derived from this software without specific prior written permission.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     29  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     30  *
     31  */
     32 
     33 #include <sys/cdefs.h>
     34 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.58 2003/10/05 17:48:49 bouyer Exp $");
     35 
     36 #ifndef WDCDEBUG
     37 #define WDCDEBUG
     38 #endif /* WDCDEBUG */
     39 
     40 #include <sys/param.h>
     41 #include <sys/systm.h>
     42 #include <sys/kernel.h>
     43 #include <sys/file.h>
     44 #include <sys/stat.h>
     45 #include <sys/buf.h>
     46 #include <sys/malloc.h>
     47 #include <sys/device.h>
     48 #include <sys/syslog.h>
     49 #include <sys/proc.h>
     50 #include <sys/dvdio.h>
     51 
     52 #include <machine/intr.h>
     53 #include <machine/bus.h>
     54 
     55 #ifndef __BUS_SPACE_HAS_STREAM_METHODS
     56 #define    bus_space_write_multi_stream_2    bus_space_write_multi_2
     57 #define    bus_space_write_multi_stream_4    bus_space_write_multi_4
     58 #define    bus_space_read_multi_stream_2    bus_space_read_multi_2
     59 #define    bus_space_read_multi_stream_4    bus_space_read_multi_4
     60 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */
     61 
     62 #include <dev/ata/atareg.h>
     63 #include <dev/ata/atavar.h>
     64 #include <dev/ic/wdcreg.h>
     65 #include <dev/ic/wdcvar.h>
     66 
     67 #include <dev/scsipi/scsi_all.h> /* for SCSI status */
     68 
     69 #define DEBUG_INTR   0x01
     70 #define DEBUG_XFERS  0x02
     71 #define DEBUG_STATUS 0x04
     72 #define DEBUG_FUNCS  0x08
     73 #define DEBUG_PROBE  0x10
     74 #ifdef WDCDEBUG
     75 int wdcdebug_atapi_mask = 0;
     76 #define WDCDEBUG_PRINT(args, level) \
     77 	if (wdcdebug_atapi_mask & (level)) \
     78 		printf args
     79 #else
     80 #define WDCDEBUG_PRINT(args, level)
     81 #endif
     82 
     83 #define ATAPI_DELAY 10	/* 10 ms, this is used only before sending a cmd */
     84 int   wdc_atapi_get_params __P((struct scsipi_channel *, int,
     85 				struct ataparams *));
     86 void  wdc_atapi_probe_device __P((struct atapibus_softc *, int));
     87 void  wdc_atapi_minphys  __P((struct buf *bp));
     88 void  wdc_atapi_start	__P((struct channel_softc *,struct wdc_xfer *));
     89 int   wdc_atapi_intr	 __P((struct channel_softc *, struct wdc_xfer *, int));
     90 void  wdc_atapi_kill_xfer __P((struct channel_softc *, struct wdc_xfer *));
     91 int   wdc_atapi_ctrl	 __P((struct channel_softc *, struct wdc_xfer *, int));
     92 void  wdc_atapi_phase_complete __P((struct wdc_xfer *));
     93 void  wdc_atapi_done	 __P((struct channel_softc *, struct wdc_xfer *));
     94 void  wdc_atapi_reset	 __P((struct channel_softc *, struct wdc_xfer *));
     95 void  wdc_atapi_scsipi_request __P((struct scsipi_channel *,
     96 	scsipi_adapter_req_t, void *));
     97 void  wdc_atapi_kill_pending __P((struct scsipi_periph *));
     98 void  wdc_atapi_polldsc __P((void *arg));
     99 
    100 #define MAX_SIZE MAXPHYS
    101 
    102 const struct scsipi_bustype wdc_atapi_bustype = {
    103 	SCSIPI_BUSTYPE_ATAPI,
    104 	atapi_scsipi_cmd,
    105 	atapi_interpret_sense,
    106 	atapi_print_addr,
    107 	wdc_atapi_kill_pending,
    108 };
    109 
    110 void
    111 wdc_atapibus_attach(chp)
    112 	struct channel_softc *chp;
    113 {
    114 	struct wdc_softc *wdc = chp->wdc;
    115 	struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic;
    116 	struct scsipi_channel *chan = &chp->ch_atapi_channel;
    117 
    118 	/*
    119 	 * Fill in the scsipi_adapter.
    120 	 */
    121 	adapt->adapt_dev = &wdc->sc_dev;
    122 	adapt->adapt_nchannels = wdc->nchannels;
    123 	adapt->adapt_request = wdc_atapi_scsipi_request;
    124 	adapt->adapt_minphys = wdc_atapi_minphys;
    125 	if (wdc->cap & WDC_CAPABILITY_NOIRQ)
    126 		adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY;
    127 	wdc->sc_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device;
    128 
    129 	/*
    130 	 * Fill in the scsipi_channel.
    131 	 */
    132 	memset(chan, 0, sizeof(*chan));
    133 	chan->chan_adapter = adapt;
    134 	chan->chan_bustype = &wdc_atapi_bustype;
    135 	chan->chan_channel = chp->channel;
    136 	chan->chan_flags = SCSIPI_CHAN_OPENINGS;
    137 	chan->chan_openings = 1;
    138 	chan->chan_max_periph = 1;
    139 	chan->chan_ntargets = 2;
    140 	chan->chan_nluns = 1;
    141 
    142 	chp->atapibus = config_found(&wdc->sc_dev, chan, atapiprint);
    143 }
    144 
    145 void
    146 wdc_atapi_minphys(bp)
    147 	struct buf *bp;
    148 {
    149 
    150 	if (bp->b_bcount > MAX_SIZE)
    151 		bp->b_bcount = MAX_SIZE;
    152 	minphys(bp);
    153 }
    154 
    155 /*
    156  * Kill off all pending xfers for a periph.
    157  *
    158  * Must be called at splbio().
    159  */
    160 void
    161 wdc_atapi_kill_pending(periph)
    162 	struct scsipi_periph *periph;
    163 {
    164 	struct wdc_softc *wdc =
    165 	    (void *)periph->periph_channel->chan_adapter->adapt_dev;
    166 	struct channel_softc *chp =
    167 	    wdc->channels[periph->periph_channel->chan_channel];
    168 
    169 	wdc_kill_pending(chp);
    170 }
    171 
    172 void
    173 wdc_atapi_kill_xfer(chp, xfer)
    174 	struct channel_softc *chp;
    175 	struct wdc_xfer *xfer;
    176 {
    177 	struct scsipi_xfer *sc_xfer = xfer->cmd;
    178 
    179 	callout_stop(&chp->ch_callout);
    180 	/* remove this command from xfer queue */
    181 	wdc_free_xfer(chp, xfer);
    182 	sc_xfer->error = XS_DRIVER_STUFFUP;
    183 	scsipi_done(sc_xfer);
    184 }
    185 
    186 int
    187 wdc_atapi_get_params(chan, drive, id)
    188 	struct scsipi_channel *chan;
    189 	int drive;
    190 	struct ataparams *id;
    191 {
    192 	struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev;
    193 	struct channel_softc *chp = wdc->channels[chan->chan_channel];
    194 	struct wdc_command wdc_c;
    195 
    196 	/* if no ATAPI device detected at wdc attach time, skip */
    197 	/*
    198 	 * XXX this will break scsireprobe if this is of any interest for
    199 	 * ATAPI devices one day.
    200 	 */
    201 	if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) {
    202 		WDCDEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n",
    203 		    drive), DEBUG_PROBE);
    204 		return -1;
    205 	}
    206 	wdccommandshort(chp, drive, ATAPI_SOFT_RESET);
    207 	chp->ch_drive[drive].state = 0;
    208 	if (wait_for_unbusy(chp, WDC_RESET_WAIT) != 0) {
    209 		WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET "
    210 		    "failed for drive %s:%d:%d\n",
    211 		    chp->wdc->sc_dev.dv_xname, chp->channel, drive),
    212 		    DEBUG_PROBE);
    213 		return -1;
    214 	}
    215 
    216 	/* Some ATAPI devices need a bit more time after software reset. */
    217 	delay(5000);
    218 	if (ata_get_params(&chp->ch_drive[drive], AT_WAIT, id) != 0) {
    219 		WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE "
    220 		    "failed for drive %s:%d:%d: error 0x%x\n",
    221 		    chp->wdc->sc_dev.dv_xname, chp->channel, drive,
    222 		    wdc_c.r_error), DEBUG_PROBE);
    223 		return -1;
    224 	}
    225 	return 0;
    226 }
    227 
    228 void
    229 wdc_atapi_probe_device(sc, target)
    230 	struct atapibus_softc *sc;
    231 	int target;
    232 {
    233 	struct scsipi_channel *chan = sc->sc_channel;
    234 	struct scsipi_periph *periph;
    235 	struct ataparams ids;
    236 	struct ataparams *id = &ids;
    237 	struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev;
    238 	struct channel_softc *chp = wdc->channels[chan->chan_channel];
    239 	struct ata_drive_datas *drvp = &chp->ch_drive[target];
    240 	struct scsipibus_attach_args sa;
    241 	char serial_number[21], model[41], firmware_revision[9];
    242 
    243 	/* skip if already attached */
    244 	if (scsipi_lookup_periph(chan, target, 0) != NULL)
    245 		return;
    246 
    247 	if (wdc_atapi_get_params(chan, target, id) == 0) {
    248 #ifdef ATAPI_DEBUG_PROBE
    249 		printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n",
    250 		    sc->sc_dev.dv_xname, target,
    251 		    id->atap_config & ATAPI_CFG_CMD_MASK,
    252 		    id->atap_config & ATAPI_CFG_DRQ_MASK);
    253 #endif
    254 		periph = scsipi_alloc_periph(M_NOWAIT);
    255 		if (periph == NULL) {
    256 			printf("%s: unable to allocate periph for drive %d\n",
    257 			    sc->sc_dev.dv_xname, target);
    258 			return;
    259 		}
    260 		periph->periph_dev = NULL;
    261 		periph->periph_channel = chan;
    262 		periph->periph_switch = &atapi_probe_periphsw;
    263 		periph->periph_target = target;
    264 		periph->periph_lun = 0;
    265 		periph->periph_quirks = PQUIRK_ONLYBIG;
    266 
    267 #ifdef SCSIPI_DEBUG
    268 		if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI &&
    269 		    SCSIPI_DEBUG_TARGET == target)
    270 			periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS;
    271 #endif
    272 		periph->periph_type = ATAPI_CFG_TYPE(id->atap_config);
    273 		if (id->atap_config & ATAPI_CFG_REMOV)
    274 			periph->periph_flags |= PERIPH_REMOVABLE;
    275 		if (periph->periph_type == T_SEQUENTIAL)
    276 			drvp->drive_flags |= DRIVE_ATAPIST;
    277 
    278 		sa.sa_periph = periph;
    279 		sa.sa_inqbuf.type =  ATAPI_CFG_TYPE(id->atap_config);
    280 		sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ?
    281 		    T_REMOV : T_FIXED;
    282 		scsipi_strvis(model, 40, id->atap_model, 40);
    283 		scsipi_strvis(serial_number, 20, id->atap_serial, 20);
    284 		scsipi_strvis(firmware_revision, 8, id->atap_revision, 8);
    285 		sa.sa_inqbuf.vendor = model;
    286 		sa.sa_inqbuf.product = serial_number;
    287 		sa.sa_inqbuf.revision = firmware_revision;
    288 
    289 		/*
    290 		 * Determine the operating mode capabilities of the device.
    291 		 */
    292 		if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16)
    293 			periph->periph_cap |= PERIPH_CAP_CMD16;
    294 		/* XXX This is gross. */
    295 		periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK);
    296 
    297 		drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa);
    298 
    299 		if (drvp->drv_softc)
    300 			wdc_probe_caps(drvp);
    301 	}
    302 }
    303 
    304 void
    305 wdc_atapi_scsipi_request(chan, req, arg)
    306 	struct scsipi_channel *chan;
    307 	scsipi_adapter_req_t req;
    308 	void *arg;
    309 {
    310 	struct scsipi_adapter *adapt = chan->chan_adapter;
    311 	struct scsipi_periph *periph;
    312 	struct scsipi_xfer *sc_xfer;
    313 	struct wdc_softc *wdc = (void *)adapt->adapt_dev;
    314 	struct wdc_xfer *xfer;
    315 	int channel = chan->chan_channel;
    316 	int drive, s;
    317 
    318 	switch (req) {
    319 	case ADAPTER_REQ_RUN_XFER:
    320 		sc_xfer = arg;
    321 		periph = sc_xfer->xs_periph;
    322 		drive = periph->periph_target;
    323 
    324 		WDCDEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n",
    325 		    wdc->sc_dev.dv_xname, channel, drive), DEBUG_XFERS);
    326 		if ((wdc->sc_dev.dv_flags & DVF_ACTIVE) == 0) {
    327 			sc_xfer->error = XS_DRIVER_STUFFUP;
    328 			scsipi_done(sc_xfer);
    329 			return;
    330 		}
    331 
    332 		xfer = wdc_get_xfer(WDC_NOSLEEP);
    333 		if (xfer == NULL) {
    334 			sc_xfer->error = XS_RESOURCE_SHORTAGE;
    335 			scsipi_done(sc_xfer);
    336 			return;
    337 		}
    338 
    339 		if (sc_xfer->xs_control & XS_CTL_POLL)
    340 			xfer->c_flags |= C_POLL;
    341 		xfer->drive = drive;
    342 		xfer->c_flags |= C_ATAPI;
    343 		if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY ||
    344 		    sc_xfer->cmd->opcode == GPCMD_SEND_KEY ||
    345 		    sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) {
    346 			/*
    347 			 * DVD authentication commands must always be done in
    348 			 * PIO mode.
    349 			 */
    350 			xfer->c_flags |= C_FORCEPIO;
    351 		}
    352 		/*
    353 		 * DMA can't deal with transfers which are not a multiple of
    354 		 * 2 bytes. It's a bug to request such transfers for ATAPI
    355 		 * but as the request can come from userland, we have to
    356 		 * protect against it.
    357 		 * Also some devices seems to not handle DMA xfers of less than
    358 		 * 4 bytes.
    359 		 */
    360 		if (sc_xfer->datalen < 4 || (sc_xfer->datalen & 0x01))
    361 			xfer->c_flags |= C_FORCEPIO;
    362 
    363 		xfer->cmd = sc_xfer;
    364 		xfer->databuf = sc_xfer->data;
    365 		xfer->c_bcount = sc_xfer->datalen;
    366 		xfer->c_start = wdc_atapi_start;
    367 		xfer->c_intr = wdc_atapi_intr;
    368 		xfer->c_kill_xfer = wdc_atapi_kill_xfer;
    369 		xfer->c_dscpoll = 0;
    370 		s = splbio();
    371 		wdc_exec_xfer(wdc->channels[channel], xfer);
    372 #ifdef DIAGNOSTIC
    373 		if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 &&
    374 		    (sc_xfer->xs_status & XS_STS_DONE) == 0)
    375 			panic("wdc_atapi_scsipi_request: polled command "
    376 			    "not done");
    377 #endif
    378 		splx(s);
    379 		return;
    380 
    381 	default:
    382 		/* Not supported, nothing to do. */
    383 		;
    384 	}
    385 }
    386 
    387 void
    388 wdc_atapi_start(chp, xfer)
    389 	struct channel_softc *chp;
    390 	struct wdc_xfer *xfer;
    391 {
    392 	struct scsipi_xfer *sc_xfer = xfer->cmd;
    393 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
    394 
    395 	WDCDEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n",
    396 	    chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive,
    397 	    sc_xfer->xs_control), DEBUG_XFERS);
    398 	/* Adjust C_DMA, it may have changed if we are requesting sense */
    399 	if ((drvp->drive_flags & (DRIVE_DMA | DRIVE_UDMA)) &&
    400 	    sc_xfer->datalen > 0 && !(xfer->c_flags & C_FORCEPIO)) {
    401 		if (drvp->n_xfers <= NXFER)
    402 			drvp->n_xfers++;
    403 		xfer->c_flags |= C_DMA;
    404 	} else {
    405 		xfer->c_flags &= ~C_DMA;
    406 	}
    407 	/* start timeout machinery */
    408 	if ((sc_xfer->xs_control & XS_CTL_POLL) == 0)
    409 		callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout),
    410 		    wdctimeout, chp);
    411 	/* Do control operations specially. */
    412 	if (drvp->state < READY) {
    413 		if (drvp->state != RESET) {
    414 			printf("%s:%d:%d: bad state %d in wdc_atapi_start\n",
    415 			    chp->wdc->sc_dev.dv_xname, chp->channel,
    416 			    xfer->drive, drvp->state);
    417 			panic("wdc_atapi_start: bad state");
    418 		}
    419 		drvp->state = PIOMODE;
    420 		wdc_atapi_ctrl(chp, xfer, 0);
    421 		return;
    422 	}
    423 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    424 	    WDSD_IBM | (xfer->drive << 4));
    425 	if (wait_for_unbusy(chp, ATAPI_DELAY) < 0) {
    426 		printf("wdc_atapi_start: not ready, st = %02x\n",
    427 		    chp->ch_status);
    428 		sc_xfer->error = XS_TIMEOUT;
    429 		wdc_atapi_reset(chp, xfer);
    430 		return;
    431 	}
    432 
    433 	/*
    434 	 * Even with WDCS_ERR, the device should accept a command packet
    435 	 * Limit length to what can be stuffed into the cylinder register
    436 	 * (16 bits).  Some CD-ROMs seem to interpret '0' as 65536,
    437 	 * but not all devices do that and it's not obvious from the
    438 	 * ATAPI spec that that behaviour should be expected.  If more
    439 	 * data is necessary, multiple data transfer phases will be done.
    440 	 */
    441 
    442 	wdccommand(chp, xfer->drive, ATAPI_PKT_CMD,
    443 	    xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff,
    444 	    0, 0, 0,
    445 	    (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0);
    446 
    447 	/*
    448 	 * If there is no interrupt for CMD input, busy-wait for it (done in
    449 	 * the interrupt routine. If it is a polled command, call the interrupt
    450 	 * routine until command is done.
    451 	 */
    452 	if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) !=
    453 	    ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) {
    454 		/* Wait for at last 400ns for status bit to be valid */
    455 		DELAY(1);
    456 		if (chp->ch_flags & WDCF_DMA_WAIT) {
    457 			wdc_dmawait(chp, xfer, sc_xfer->timeout);
    458 			chp->ch_flags &= ~WDCF_DMA_WAIT;
    459 		}
    460 		wdc_atapi_intr(chp, xfer, 0);
    461 	} else {
    462 		chp->ch_flags |= WDCF_IRQ_WAIT;
    463 	}
    464 	if (sc_xfer->xs_control & XS_CTL_POLL) {
    465 		while ((sc_xfer->xs_status & XS_STS_DONE) == 0) {
    466 			/* Wait for at last 400ns for status bit to be valid */
    467 			DELAY(1);
    468 			wdc_atapi_intr(chp, xfer, 0);
    469 		}
    470 	}
    471 }
    472 
    473 int
    474 wdc_atapi_intr(chp, xfer, irq)
    475 	struct channel_softc *chp;
    476 	struct wdc_xfer *xfer;
    477 	int irq;
    478 {
    479 	struct scsipi_xfer *sc_xfer = xfer->cmd;
    480 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
    481 	int len, phase, i, retries=0;
    482 	int ire;
    483 	int dma_flags = 0;
    484 	void *cmd;
    485 
    486 	WDCDEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n",
    487 	    chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive), DEBUG_INTR);
    488 
    489 	/* Is it not a transfer, but a control operation? */
    490 	if (drvp->state < READY) {
    491 		printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n",
    492 		    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    493 		    drvp->state);
    494 		panic("wdc_atapi_intr: bad state");
    495 	}
    496 	/*
    497 	 * If we missed an interrupt in a PIO transfer, reset and restart.
    498 	 * Don't try to continue transfer, we may have missed cycles.
    499 	 */
    500 	if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) {
    501 		sc_xfer->error = XS_TIMEOUT;
    502 		wdc_atapi_reset(chp, xfer);
    503 		return 1;
    504 	}
    505 
    506 	/* Ack interrupt done in wait_for_unbusy */
    507 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    508 	    WDSD_IBM | (xfer->drive << 4));
    509 	if (wait_for_unbusy(chp,
    510 	    (irq == 0) ? sc_xfer->timeout : 0) != 0) {
    511 		if (irq && (xfer->c_flags & C_TIMEOU) == 0)
    512 			return 0; /* IRQ was not for us */
    513 		printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n",
    514 		    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    515 		    xfer->c_bcount, xfer->c_skip);
    516 		if (xfer->c_flags & C_DMA) {
    517 			ata_dmaerr(drvp);
    518 		}
    519 		sc_xfer->error = XS_TIMEOUT;
    520 		wdc_atapi_reset(chp, xfer);
    521 		return 1;
    522 	}
    523 	if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
    524 		chp->wdc->irqack(chp);
    525 
    526 	/*
    527 	 * If we missed an IRQ and were using DMA, flag it as a DMA error
    528 	 * and reset device.
    529 	 */
    530 	if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) {
    531 		ata_dmaerr(drvp);
    532 		sc_xfer->error = XS_RESET;
    533 		wdc_atapi_reset(chp, xfer);
    534 		return (1);
    535 	}
    536 	/*
    537 	 * if the request sense command was aborted, report the short sense
    538 	 * previously recorded, else continue normal processing
    539 	 */
    540 
    541 	if (xfer->c_flags & C_DMA)
    542 		dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN)
    543 		    ?  WDC_DMA_READ : 0;
    544 again:
    545 	len = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_lo) +
    546 	    256 * bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_cyl_hi);
    547 	ire = bus_space_read_1(chp->cmd_iot, chp->cmd_ioh, wd_ireason);
    548 	phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ);
    549 	WDCDEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x "
    550 	    "ire 0x%x :", xfer->c_bcount,
    551 	    len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR);
    552 
    553 	switch (phase) {
    554 	case PHASE_CMDOUT:
    555 		cmd = sc_xfer->cmd;
    556 		WDCDEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR);
    557 		/* Init the DMA channel if necessary */
    558 		if (xfer->c_flags & C_DMA) {
    559 			if ((*chp->wdc->dma_init)(chp->wdc->dma_arg,
    560 			    chp->channel, xfer->drive,
    561 			    xfer->databuf, xfer->c_bcount, dma_flags) != 0) {
    562 				sc_xfer->error = XS_DRIVER_STUFFUP;
    563 				break;
    564 			}
    565 		}
    566 		/* send packet command */
    567 		/* Commands are 12 or 16 bytes long. It's 32-bit aligned */
    568 		if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
    569 			if (drvp->drive_flags & DRIVE_CAP32)
    570 				bus_space_write_multi_4(chp->data32iot,
    571 				    chp->data32ioh, 0, (u_int32_t *)cmd,
    572 				    sc_xfer->cmdlen >> 2);
    573 			else
    574 				bus_space_write_multi_2(chp->cmd_iot,
    575 				    chp->cmd_ioh, wd_data, (u_int16_t *)cmd,
    576 				    sc_xfer->cmdlen >> 1);
    577 		} else {
    578 			if (drvp->drive_flags & DRIVE_CAP32)
    579 				bus_space_write_multi_stream_4(chp->data32iot,
    580 				    chp->data32ioh, 0, (u_int32_t *)cmd,
    581 				    sc_xfer->cmdlen >> 2);
    582 			else
    583 				bus_space_write_multi_stream_2(chp->cmd_iot,
    584 				    chp->cmd_ioh, wd_data, (u_int16_t *)cmd,
    585 				    sc_xfer->cmdlen >> 1);
    586 		}
    587 		/* Start the DMA channel if necessary */
    588 		if (xfer->c_flags & C_DMA) {
    589 			(*chp->wdc->dma_start)(chp->wdc->dma_arg,
    590 			    chp->channel, xfer->drive);
    591 			chp->ch_flags |= WDCF_DMA_WAIT;
    592 		}
    593 
    594 		if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
    595 			chp->ch_flags |= WDCF_IRQ_WAIT;
    596 		}
    597 		return 1;
    598 
    599 	 case PHASE_DATAOUT:
    600 		/* write data */
    601 		WDCDEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR);
    602 		if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 ||
    603 		    (xfer->c_flags & C_DMA) != 0) {
    604 			printf("wdc_atapi_intr: bad data phase DATAOUT\n");
    605 			if (xfer->c_flags & C_DMA) {
    606 				ata_dmaerr(drvp);
    607 			}
    608 			sc_xfer->error = XS_TIMEOUT;
    609 			wdc_atapi_reset(chp, xfer);
    610 			return 1;
    611 		}
    612 		if (xfer->c_bcount < len) {
    613 			printf("wdc_atapi_intr: warning: write only "
    614 			    "%d of %d requested bytes\n", xfer->c_bcount, len);
    615 			if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
    616 				bus_space_write_multi_2(chp->cmd_iot,
    617 				    chp->cmd_ioh, wd_data,
    618 				    (u_int16_t *)((char *)xfer->databuf +
    619 				                  xfer->c_skip),
    620 				    xfer->c_bcount >> 1);
    621 			} else {
    622 				bus_space_write_multi_stream_2(chp->cmd_iot,
    623 				    chp->cmd_ioh, wd_data,
    624 				    (u_int16_t *)((char *)xfer->databuf +
    625 				                  xfer->c_skip),
    626 				    xfer->c_bcount >> 1);
    627 			}
    628 			for (i = xfer->c_bcount; i < len; i += 2)
    629 				bus_space_write_2(chp->cmd_iot, chp->cmd_ioh,
    630 				    wd_data, 0);
    631 			xfer->c_skip += xfer->c_bcount;
    632 			xfer->c_bcount = 0;
    633 		} else {
    634 			if (drvp->drive_flags & DRIVE_CAP32) {
    635 			    if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
    636 				bus_space_write_multi_4(chp->data32iot,
    637 				    chp->data32ioh, 0,
    638 				    (u_int32_t *)((char *)xfer->databuf +
    639 				                  xfer->c_skip),
    640 				    len >> 2);
    641 			    else
    642 				bus_space_write_multi_stream_4(chp->data32iot,
    643 				    chp->data32ioh, wd_data,
    644 				    (u_int32_t *)((char *)xfer->databuf +
    645 				                  xfer->c_skip),
    646 				    len >> 2);
    647 
    648 			    xfer->c_skip += len & 0xfffffffc;
    649 			    xfer->c_bcount -= len & 0xfffffffc;
    650 			    len = len & 0x03;
    651 			}
    652 			if (len > 0) {
    653 			    if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
    654 				bus_space_write_multi_2(chp->cmd_iot,
    655 				    chp->cmd_ioh, wd_data,
    656 				    (u_int16_t *)((char *)xfer->databuf +
    657 				                  xfer->c_skip),
    658 				    len >> 1);
    659 			    else
    660 				bus_space_write_multi_stream_2(chp->cmd_iot,
    661 				    chp->cmd_ioh, wd_data,
    662 				    (u_int16_t *)((char *)xfer->databuf +
    663 				                  xfer->c_skip),
    664 				    len >> 1);
    665 			    xfer->c_skip += len;
    666 			    xfer->c_bcount -= len;
    667 			}
    668 		}
    669 		if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
    670 			chp->ch_flags |= WDCF_IRQ_WAIT;
    671 		}
    672 		return 1;
    673 
    674 	case PHASE_DATAIN:
    675 		/* Read data */
    676 		WDCDEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR);
    677 		if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 ||
    678 		    (xfer->c_flags & C_DMA) != 0) {
    679 			printf("wdc_atapi_intr: bad data phase DATAIN\n");
    680 			if (xfer->c_flags & C_DMA) {
    681 				ata_dmaerr(drvp);
    682 			}
    683 			sc_xfer->error = XS_TIMEOUT;
    684 			wdc_atapi_reset(chp, xfer);
    685 			return 1;
    686 		}
    687 		if (xfer->c_bcount < len) {
    688 			printf("wdc_atapi_intr: warning: reading only "
    689 			    "%d of %d bytes\n", xfer->c_bcount, len);
    690 			if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) {
    691 			    bus_space_read_multi_2(chp->cmd_iot,
    692 			    chp->cmd_ioh, wd_data,
    693 			    (u_int16_t *)((char *)xfer->databuf +
    694 			                  xfer->c_skip),
    695 			    xfer->c_bcount >> 1);
    696 			} else {
    697 			    bus_space_read_multi_stream_2(chp->cmd_iot,
    698 			    chp->cmd_ioh, wd_data,
    699 			    (u_int16_t *)((char *)xfer->databuf +
    700 			                  xfer->c_skip),
    701 			    xfer->c_bcount >> 1);
    702 			}
    703 			wdcbit_bucket(chp, len - xfer->c_bcount);
    704 			xfer->c_skip += xfer->c_bcount;
    705 			xfer->c_bcount = 0;
    706 		} else {
    707 			if (drvp->drive_flags & DRIVE_CAP32) {
    708 			    if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
    709 				bus_space_read_multi_4(chp->data32iot,
    710 				    chp->data32ioh, 0,
    711 				    (u_int32_t *)((char *)xfer->databuf +
    712 				                  xfer->c_skip),
    713 				    len >> 2);
    714 			    else
    715 				bus_space_read_multi_stream_4(chp->data32iot,
    716 				    chp->data32ioh, wd_data,
    717 				    (u_int32_t *)((char *)xfer->databuf +
    718 				                  xfer->c_skip),
    719 				    len >> 2);
    720 
    721 			    xfer->c_skip += len & 0xfffffffc;
    722 			    xfer->c_bcount -= len & 0xfffffffc;
    723 			    len = len & 0x03;
    724 			}
    725 			if (len > 0) {
    726 			    if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM))
    727 				bus_space_read_multi_2(chp->cmd_iot,
    728 				    chp->cmd_ioh, wd_data,
    729 				    (u_int16_t *)((char *)xfer->databuf +
    730 				                  xfer->c_skip),
    731 				    len >> 1);
    732 			    else
    733 				bus_space_read_multi_stream_2(chp->cmd_iot,
    734 				    chp->cmd_ioh, wd_data,
    735 				    (u_int16_t *)((char *)xfer->databuf +
    736 				                  xfer->c_skip),
    737 				    len >> 1);
    738 			    xfer->c_skip += len;
    739 			    xfer->c_bcount -=len;
    740 			}
    741 		}
    742 		if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
    743 			chp->ch_flags |= WDCF_IRQ_WAIT;
    744 		}
    745 		return 1;
    746 
    747 	case PHASE_ABORTED:
    748 	case PHASE_COMPLETED:
    749 		WDCDEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR);
    750 		if (xfer->c_flags & C_DMA) {
    751 			xfer->c_bcount -= sc_xfer->datalen;
    752 		}
    753 		sc_xfer->resid = xfer->c_bcount;
    754 		wdc_atapi_phase_complete(xfer);
    755 		return(1);
    756 
    757 	default:
    758 		if (++retries<500) {
    759 			DELAY(100);
    760 			chp->ch_status = bus_space_read_1(chp->cmd_iot,
    761 			    chp->cmd_ioh, wd_status);
    762 			chp->ch_error = bus_space_read_1(chp->cmd_iot,
    763 			    chp->cmd_ioh, wd_error);
    764 			goto again;
    765 		}
    766 		printf("wdc_atapi_intr: unknown phase 0x%x\n", phase);
    767 		if (chp->ch_status & WDCS_ERR) {
    768 			sc_xfer->error = XS_SHORTSENSE;
    769 			sc_xfer->sense.atapi_sense = chp->ch_error;
    770 		} else {
    771 			if (xfer->c_flags & C_DMA) {
    772 				ata_dmaerr(drvp);
    773 			}
    774 			sc_xfer->error = XS_RESET;
    775 			wdc_atapi_reset(chp, xfer);
    776 			return (1);
    777 		}
    778 	}
    779 	WDCDEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x "
    780 	    "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense),
    781 	    DEBUG_INTR);
    782 	wdc_atapi_done(chp, xfer);
    783 	return (1);
    784 }
    785 
    786 int
    787 wdc_atapi_ctrl(chp, xfer, irq)
    788 	struct channel_softc *chp;
    789 	struct wdc_xfer *xfer;
    790 	int irq;
    791 {
    792 	struct scsipi_xfer *sc_xfer = xfer->cmd;
    793 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
    794 	char *errstring = NULL;
    795 	int delay = (irq == 0) ? ATAPI_DELAY : 0;
    796 
    797 	/* Ack interrupt done in wait_for_unbusy */
    798 again:
    799 	WDCDEBUG_PRINT(("wdc_atapi_ctrl %s:%d:%d state %d\n",
    800 	    chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive, drvp->state),
    801 	    DEBUG_INTR | DEBUG_FUNCS);
    802 	bus_space_write_1(chp->cmd_iot, chp->cmd_ioh, wd_sdh,
    803 	    WDSD_IBM | (xfer->drive << 4));
    804 	switch (drvp->state) {
    805 	case PIOMODE:
    806 		/* Don't try to set mode if controller can't be adjusted */
    807 		if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0)
    808 			goto ready;
    809 		/* Also don't try if the drive didn't report its mode */
    810 		if ((drvp->drive_flags & DRIVE_MODE) == 0)
    811 			goto ready;
    812 		wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    813 		    0x08 | drvp->PIO_mode, WDSF_SET_MODE);
    814 		drvp->state = PIOMODE_WAIT;
    815 		break;
    816 	case PIOMODE_WAIT:
    817 		errstring = "piomode";
    818 		if (wait_for_unbusy(chp, delay))
    819 			goto timeout;
    820 		if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
    821 			chp->wdc->irqack(chp);
    822 		if (chp->ch_status & WDCS_ERR) {
    823 			if (chp->ch_error == WDCE_ABRT) {
    824 				/*
    825 				 * some ATAPI drives rejects pio settings.
    826 				 * all we can do here is fall back to PIO 0
    827 				 */
    828 				drvp->drive_flags &= ~DRIVE_MODE;
    829 				drvp->drive_flags &= ~(DRIVE_DMA|DRIVE_UDMA);
    830 				drvp->PIO_mode = 0;
    831 				drvp->DMA_mode = 0;
    832 				printf("%s:%d:%d: pio setting rejected, "
    833 				    "falling back to PIO mode 0\n",
    834 				    chp->wdc->sc_dev.dv_xname,
    835 				    chp->channel, xfer->drive);
    836 				chp->wdc->set_modes(chp);
    837 				goto ready;
    838 			}
    839 			goto error;
    840 		}
    841 	/* fall through */
    842 
    843 	case DMAMODE:
    844 		if (drvp->drive_flags & DRIVE_UDMA) {
    845 			wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    846 			    0x40 | drvp->UDMA_mode, WDSF_SET_MODE);
    847 		} else if (drvp->drive_flags & DRIVE_DMA) {
    848 			wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0,
    849 			    0x20 | drvp->DMA_mode, WDSF_SET_MODE);
    850 		} else {
    851 			goto ready;
    852 		}
    853 		drvp->state = DMAMODE_WAIT;
    854 		break;
    855 	case DMAMODE_WAIT:
    856 		errstring = "dmamode";
    857 		if (wait_for_unbusy(chp, delay))
    858 			goto timeout;
    859 		if (chp->wdc->cap & WDC_CAPABILITY_IRQACK)
    860 			chp->wdc->irqack(chp);
    861 		if (chp->ch_status & WDCS_ERR)
    862 			goto error;
    863 	/* fall through */
    864 
    865 	case READY:
    866 	ready:
    867 		drvp->state = READY;
    868 		xfer->c_intr = wdc_atapi_intr;
    869 		callout_stop(&chp->ch_callout);
    870 		wdc_atapi_start(chp, xfer);
    871 		return 1;
    872 	}
    873 	if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) {
    874 		chp->ch_flags |= WDCF_IRQ_WAIT;
    875 		xfer->c_intr = wdc_atapi_ctrl;
    876 	} else {
    877 		goto again;
    878 	}
    879 	return 1;
    880 
    881 timeout:
    882 	if (irq && (xfer->c_flags & C_TIMEOU) == 0) {
    883 		return 0; /* IRQ was not for us */
    884 	}
    885 	printf("%s:%d:%d: %s timed out\n",
    886 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive, errstring);
    887 	sc_xfer->error = XS_TIMEOUT;
    888 	wdc_atapi_reset(chp, xfer);
    889 	return 1;
    890 error:
    891 	printf("%s:%d:%d: %s ",
    892 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    893 	    errstring);
    894 	printf("error (0x%x)\n", chp->ch_error);
    895 	sc_xfer->error = XS_SHORTSENSE;
    896 	sc_xfer->sense.atapi_sense = chp->ch_error;
    897 	wdc_atapi_reset(chp, xfer);
    898 	return 1;
    899 }
    900 
    901 void
    902 wdc_atapi_phase_complete(xfer)
    903 	struct wdc_xfer *xfer;
    904 {
    905 	struct channel_softc *chp = xfer->chp;
    906 	struct scsipi_xfer *sc_xfer = xfer->cmd;
    907 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
    908 
    909 	/* wait for DSC if needed */
    910 	if (drvp->drive_flags & DRIVE_ATAPIST) {
    911 		WDCDEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) "
    912 		    "polldsc %d\n", chp->wdc->sc_dev.dv_xname, chp->channel,
    913 		    xfer->drive, xfer->c_dscpoll), DEBUG_XFERS);
    914 #if 1
    915 		if (cold)
    916 			panic("wdc_atapi_phase_complete: cold");
    917 #endif
    918 		if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10)) {
    919 			/* 10ms not enough, try again in 1 tick */
    920 			if (xfer->c_dscpoll++ >
    921 			    mstohz(sc_xfer->timeout)) {
    922 				printf("%s:%d:%d: wait_for_dsc failed\n",
    923 				    chp->wdc->sc_dev.dv_xname, chp->channel,
    924 				    xfer->drive);
    925 				sc_xfer->error = XS_TIMEOUT;
    926 				wdc_atapi_reset(chp, xfer);
    927 			} else
    928 				callout_reset(&chp->ch_callout, 1,
    929 				    wdc_atapi_polldsc, xfer);
    930 			return;
    931 		}
    932 	}
    933 
    934 	/*
    935 	 * Some drive occasionally set WDCS_ERR with
    936 	 * "ATA illegal length indication" in the error
    937 	 * register. If we read some data the sense is valid
    938 	 * anyway, so don't report the error.
    939 	 */
    940 	if (chp->ch_status & WDCS_ERR &&
    941 	    ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 ||
    942 	    sc_xfer->resid == sc_xfer->datalen)) {
    943 		/* save the short sense */
    944 		sc_xfer->error = XS_SHORTSENSE;
    945 		sc_xfer->sense.atapi_sense = chp->ch_error;
    946 		if ((sc_xfer->xs_periph->periph_quirks &
    947 		    PQUIRK_NOSENSE) == 0) {
    948 			/* ask scsipi to send a REQUEST_SENSE */
    949 			sc_xfer->error = XS_BUSY;
    950 			sc_xfer->status = SCSI_CHECK;
    951 		} else if (chp->wdc->dma_status &
    952 		    (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) {
    953 			ata_dmaerr(drvp);
    954 			sc_xfer->error = XS_RESET;
    955 			wdc_atapi_reset(chp, xfer);
    956 			return;
    957 		}
    958 	}
    959 	if (xfer->c_bcount != 0) {
    960 		WDCDEBUG_PRINT(("wdc_atapi_intr: bcount value is "
    961 		    "%d after io\n", xfer->c_bcount), DEBUG_XFERS);
    962 	}
    963 #ifdef DIAGNOSTIC
    964 	if (xfer->c_bcount < 0) {
    965 		printf("wdc_atapi_intr warning: bcount value "
    966 		    "is %d after io\n", xfer->c_bcount);
    967 	}
    968 #endif
    969 	WDCDEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), "
    970 	    "error 0x%x sense 0x%x\n", sc_xfer->error,
    971 	    sc_xfer->sense.atapi_sense), DEBUG_INTR);
    972 	wdc_atapi_done(chp, xfer);
    973 }
    974 
    975 void
    976 wdc_atapi_done(chp, xfer)
    977 	struct channel_softc *chp;
    978 	struct wdc_xfer *xfer;
    979 {
    980 	struct scsipi_xfer *sc_xfer = xfer->cmd;
    981 
    982 	WDCDEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n",
    983 	    chp->wdc->sc_dev.dv_xname, chp->channel, xfer->drive,
    984 	    (u_int)xfer->c_flags), DEBUG_XFERS);
    985 	callout_stop(&chp->ch_callout);
    986 	/* remove this command from xfer queue */
    987 	wdc_free_xfer(chp, xfer);
    988 
    989 	WDCDEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS);
    990 	scsipi_done(sc_xfer);
    991 	WDCDEBUG_PRINT(("wdcstart from wdc_atapi_done, flags 0x%x\n",
    992 	    chp->ch_flags), DEBUG_XFERS);
    993 	wdcstart(chp);
    994 }
    995 
    996 void
    997 wdc_atapi_reset(chp, xfer)
    998 	struct channel_softc *chp;
    999 	struct wdc_xfer *xfer;
   1000 {
   1001 	struct ata_drive_datas *drvp = &chp->ch_drive[xfer->drive];
   1002 	struct scsipi_xfer *sc_xfer = xfer->cmd;
   1003 
   1004 	wdccommandshort(chp, xfer->drive, ATAPI_SOFT_RESET);
   1005 	drvp->state = 0;
   1006 	if (wait_for_unbusy(chp, WDC_RESET_WAIT) != 0) {
   1007 		printf("%s:%d:%d: reset failed\n",
   1008 		    chp->wdc->sc_dev.dv_xname, chp->channel,
   1009 		    xfer->drive);
   1010 		sc_xfer->error = XS_SELTIMEOUT;
   1011 	}
   1012 	wdc_atapi_done(chp, xfer);
   1013 	return;
   1014 }
   1015 
   1016 void
   1017 wdc_atapi_polldsc(arg)
   1018 	void *arg;
   1019 {
   1020 	wdc_atapi_phase_complete(arg);
   1021 }
   1022