atapi_wdc.c revision 1.66
1 /* $NetBSD: atapi_wdc.c,v 1.66 2004/01/03 01:50:53 thorpej Exp $ */ 2 3 /* 4 * Copyright (c) 1998, 2001 Manuel Bouyer. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. All advertising materials mentioning features or use of this software 15 * must display the following acknowledgement: 16 * This product includes software developed by Manuel Bouyer. 17 * 4. The name of the author may not be used to endorse or promote products 18 * derived from this software without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 21 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 22 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 23 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 24 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 25 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 26 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 27 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 28 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 29 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 #include <sys/cdefs.h> 33 __KERNEL_RCSID(0, "$NetBSD: atapi_wdc.c,v 1.66 2004/01/03 01:50:53 thorpej Exp $"); 34 35 #ifndef WDCDEBUG 36 #define WDCDEBUG 37 #endif /* WDCDEBUG */ 38 39 #include <sys/param.h> 40 #include <sys/systm.h> 41 #include <sys/kernel.h> 42 #include <sys/file.h> 43 #include <sys/stat.h> 44 #include <sys/buf.h> 45 #include <sys/malloc.h> 46 #include <sys/device.h> 47 #include <sys/syslog.h> 48 #include <sys/proc.h> 49 #include <sys/dvdio.h> 50 51 #include <machine/intr.h> 52 #include <machine/bus.h> 53 54 #ifndef __BUS_SPACE_HAS_STREAM_METHODS 55 #define bus_space_write_multi_stream_2 bus_space_write_multi_2 56 #define bus_space_write_multi_stream_4 bus_space_write_multi_4 57 #define bus_space_read_multi_stream_2 bus_space_read_multi_2 58 #define bus_space_read_multi_stream_4 bus_space_read_multi_4 59 #endif /* __BUS_SPACE_HAS_STREAM_METHODS */ 60 61 #include <dev/ata/atareg.h> 62 #include <dev/ata/atavar.h> 63 #include <dev/ic/wdcreg.h> 64 #include <dev/ic/wdcvar.h> 65 66 #include <dev/scsipi/scsi_all.h> /* for SCSI status */ 67 68 #define DEBUG_INTR 0x01 69 #define DEBUG_XFERS 0x02 70 #define DEBUG_STATUS 0x04 71 #define DEBUG_FUNCS 0x08 72 #define DEBUG_PROBE 0x10 73 #ifdef WDCDEBUG 74 int wdcdebug_atapi_mask = 0; 75 #define WDCDEBUG_PRINT(args, level) \ 76 if (wdcdebug_atapi_mask & (level)) \ 77 printf args 78 #else 79 #define WDCDEBUG_PRINT(args, level) 80 #endif 81 82 #define ATAPI_DELAY 10 /* 10 ms, this is used only before sending a cmd */ 83 #define ATAPI_MODE_DELAY 1000 /* 1s, timeout for SET_FEATYRE cmds */ 84 85 static int wdc_atapi_get_params(struct scsipi_channel *, int, 86 struct ataparams *); 87 static void wdc_atapi_probe_device(struct atapibus_softc *, int); 88 static void wdc_atapi_minphys (struct buf *bp); 89 static void wdc_atapi_start(struct wdc_channel *,struct ata_xfer *); 90 static int wdc_atapi_intr(struct wdc_channel *, struct ata_xfer *, int); 91 static void wdc_atapi_kill_xfer(struct wdc_channel *, struct ata_xfer *); 92 static void wdc_atapi_phase_complete(struct ata_xfer *); 93 static void wdc_atapi_done(struct wdc_channel *, struct ata_xfer *); 94 static void wdc_atapi_reset(struct wdc_channel *, struct ata_xfer *); 95 static void wdc_atapi_scsipi_request(struct scsipi_channel *, 96 scsipi_adapter_req_t, void *); 97 static void wdc_atapi_kill_pending(struct scsipi_periph *); 98 static void wdc_atapi_polldsc(void *arg); 99 100 #define MAX_SIZE MAXPHYS 101 102 static const struct scsipi_bustype wdc_atapi_bustype = { 103 SCSIPI_BUSTYPE_ATAPI, 104 atapi_scsipi_cmd, 105 atapi_interpret_sense, 106 atapi_print_addr, 107 wdc_atapi_kill_pending, 108 }; 109 110 void 111 wdc_atapibus_attach(struct atabus_softc *ata_sc) 112 { 113 struct wdc_channel *chp = ata_sc->sc_chan; 114 struct wdc_softc *wdc = chp->wdc; 115 struct scsipi_adapter *adapt = &wdc->sc_atapi_adapter._generic; 116 struct scsipi_channel *chan = &chp->ch_atapi_channel; 117 118 /* 119 * Fill in the scsipi_adapter. 120 */ 121 adapt->adapt_dev = &wdc->sc_dev; 122 adapt->adapt_nchannels = wdc->nchannels; 123 adapt->adapt_request = wdc_atapi_scsipi_request; 124 adapt->adapt_minphys = wdc_atapi_minphys; 125 if (wdc->cap & WDC_CAPABILITY_NOIRQ) 126 adapt->adapt_flags |= SCSIPI_ADAPT_POLL_ONLY; 127 wdc->sc_atapi_adapter.atapi_probe_device = wdc_atapi_probe_device; 128 129 /* 130 * Fill in the scsipi_channel. 131 */ 132 memset(chan, 0, sizeof(*chan)); 133 chan->chan_adapter = adapt; 134 chan->chan_bustype = &wdc_atapi_bustype; 135 chan->chan_channel = chp->channel; 136 chan->chan_flags = SCSIPI_CHAN_OPENINGS; 137 chan->chan_openings = 1; 138 chan->chan_max_periph = 1; 139 chan->chan_ntargets = 2; 140 chan->chan_nluns = 1; 141 142 chp->atapibus = config_found(&ata_sc->sc_dev, chan, atapiprint); 143 } 144 145 static void 146 wdc_atapi_minphys(struct buf *bp) 147 { 148 149 if (bp->b_bcount > MAX_SIZE) 150 bp->b_bcount = MAX_SIZE; 151 minphys(bp); 152 } 153 154 /* 155 * Kill off all pending xfers for a periph. 156 * 157 * Must be called at splbio(). 158 */ 159 static void 160 wdc_atapi_kill_pending(struct scsipi_periph *periph) 161 { 162 struct wdc_softc *wdc = 163 (void *)periph->periph_channel->chan_adapter->adapt_dev; 164 struct wdc_channel *chp = 165 wdc->channels[periph->periph_channel->chan_channel]; 166 167 wdc_kill_pending(chp); 168 } 169 170 static void 171 wdc_atapi_kill_xfer(struct wdc_channel *chp, struct ata_xfer *xfer) 172 { 173 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 174 175 callout_stop(&chp->ch_callout); 176 /* remove this command from xfer queue */ 177 wdc_free_xfer(chp, xfer); 178 sc_xfer->error = XS_DRIVER_STUFFUP; 179 scsipi_done(sc_xfer); 180 } 181 182 static int 183 wdc_atapi_get_params(struct scsipi_channel *chan, int drive, 184 struct ataparams *id) 185 { 186 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 187 struct wdc_channel *chp = wdc->channels[chan->chan_channel]; 188 struct wdc_command wdc_c; 189 190 /* if no ATAPI device detected at wdc attach time, skip */ 191 if ((chp->ch_drive[drive].drive_flags & DRIVE_ATAPI) == 0) { 192 WDCDEBUG_PRINT(("wdc_atapi_get_params: drive %d not present\n", 193 drive), DEBUG_PROBE); 194 return -1; 195 } 196 197 memset(&wdc_c, 0, sizeof(struct wdc_command)); 198 wdc_c.r_command = ATAPI_SOFT_RESET; 199 wdc_c.r_st_bmask = 0; 200 wdc_c.r_st_pmask = 0; 201 wdc_c.flags = AT_POLL; 202 wdc_c.timeout = WDC_RESET_WAIT; 203 if (wdc_exec_command(&chp->ch_drive[drive], &wdc_c) != WDC_COMPLETE) { 204 printf("wdc_atapi_get_params: ATAPI_SOFT_RESET failed for" 205 " drive %s:%d:%d: driver failed\n", 206 chp->wdc->sc_dev.dv_xname, chp->channel, drive); 207 panic("wdc_atapi_get_params"); 208 } 209 if (wdc_c.flags & (AT_ERROR | AT_TIMEOU | AT_DF)) { 210 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_SOFT_RESET " 211 "failed for drive %s:%d:%d: error 0x%x\n", 212 chp->wdc->sc_dev.dv_xname, chp->channel, drive, 213 wdc_c.r_error), DEBUG_PROBE); 214 return -1; 215 } 216 chp->ch_drive[drive].state = 0; 217 218 bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_status], 0); 219 220 /* Some ATAPI devices need a bit more time after software reset. */ 221 delay(5000); 222 if (ata_get_params(&chp->ch_drive[drive], AT_WAIT, id) != 0) { 223 WDCDEBUG_PRINT(("wdc_atapi_get_params: ATAPI_IDENTIFY_DEVICE " 224 "failed for drive %s:%d:%d: error 0x%x\n", 225 chp->wdc->sc_dev.dv_xname, chp->channel, drive, 226 wdc_c.r_error), DEBUG_PROBE); 227 return -1; 228 } 229 return 0; 230 } 231 232 static void 233 wdc_atapi_probe_device(struct atapibus_softc *sc, int target) 234 { 235 struct scsipi_channel *chan = sc->sc_channel; 236 struct scsipi_periph *periph; 237 struct ataparams ids; 238 struct ataparams *id = &ids; 239 struct wdc_softc *wdc = (void *)chan->chan_adapter->adapt_dev; 240 struct wdc_channel *chp = wdc->channels[chan->chan_channel]; 241 struct ata_drive_datas *drvp = &chp->ch_drive[target]; 242 struct scsipibus_attach_args sa; 243 char serial_number[21], model[41], firmware_revision[9]; 244 245 /* skip if already attached */ 246 if (scsipi_lookup_periph(chan, target, 0) != NULL) 247 return; 248 249 if (wdc_atapi_get_params(chan, target, id) == 0) { 250 #ifdef ATAPI_DEBUG_PROBE 251 printf("%s drive %d: cmdsz 0x%x drqtype 0x%x\n", 252 sc->sc_dev.dv_xname, target, 253 id->atap_config & ATAPI_CFG_CMD_MASK, 254 id->atap_config & ATAPI_CFG_DRQ_MASK); 255 #endif 256 periph = scsipi_alloc_periph(M_NOWAIT); 257 if (periph == NULL) { 258 printf("%s: unable to allocate periph for drive %d\n", 259 sc->sc_dev.dv_xname, target); 260 return; 261 } 262 periph->periph_dev = NULL; 263 periph->periph_channel = chan; 264 periph->periph_switch = &atapi_probe_periphsw; 265 periph->periph_target = target; 266 periph->periph_lun = 0; 267 periph->periph_quirks = PQUIRK_ONLYBIG; 268 269 #ifdef SCSIPI_DEBUG 270 if (SCSIPI_DEBUG_TYPE == SCSIPI_BUSTYPE_ATAPI && 271 SCSIPI_DEBUG_TARGET == target) 272 periph->periph_dbflags |= SCSIPI_DEBUG_FLAGS; 273 #endif 274 periph->periph_type = ATAPI_CFG_TYPE(id->atap_config); 275 if (id->atap_config & ATAPI_CFG_REMOV) 276 periph->periph_flags |= PERIPH_REMOVABLE; 277 if (periph->periph_type == T_SEQUENTIAL) 278 drvp->drive_flags |= DRIVE_ATAPIST; 279 280 sa.sa_periph = periph; 281 sa.sa_inqbuf.type = ATAPI_CFG_TYPE(id->atap_config); 282 sa.sa_inqbuf.removable = id->atap_config & ATAPI_CFG_REMOV ? 283 T_REMOV : T_FIXED; 284 scsipi_strvis(model, 40, id->atap_model, 40); 285 scsipi_strvis(serial_number, 20, id->atap_serial, 20); 286 scsipi_strvis(firmware_revision, 8, id->atap_revision, 8); 287 sa.sa_inqbuf.vendor = model; 288 sa.sa_inqbuf.product = serial_number; 289 sa.sa_inqbuf.revision = firmware_revision; 290 291 /* 292 * Determine the operating mode capabilities of the device. 293 */ 294 if ((id->atap_config & ATAPI_CFG_CMD_MASK) == ATAPI_CFG_CMD_16) 295 periph->periph_cap |= PERIPH_CAP_CMD16; 296 /* XXX This is gross. */ 297 periph->periph_cap |= (id->atap_config & ATAPI_CFG_DRQ_MASK); 298 299 drvp->drv_softc = atapi_probe_device(sc, target, periph, &sa); 300 301 if (drvp->drv_softc) 302 wdc_probe_caps(drvp); 303 else 304 drvp->drive_flags &= ~DRIVE_ATAPI; 305 } 306 } 307 308 static void 309 wdc_atapi_scsipi_request(struct scsipi_channel *chan, scsipi_adapter_req_t req, 310 void *arg) 311 { 312 struct scsipi_adapter *adapt = chan->chan_adapter; 313 struct scsipi_periph *periph; 314 struct scsipi_xfer *sc_xfer; 315 struct wdc_softc *wdc = (void *)adapt->adapt_dev; 316 struct ata_xfer *xfer; 317 int channel = chan->chan_channel; 318 int drive, s; 319 320 switch (req) { 321 case ADAPTER_REQ_RUN_XFER: 322 sc_xfer = arg; 323 periph = sc_xfer->xs_periph; 324 drive = periph->periph_target; 325 326 WDCDEBUG_PRINT(("wdc_atapi_scsipi_request %s:%d:%d\n", 327 wdc->sc_dev.dv_xname, channel, drive), DEBUG_XFERS); 328 if ((wdc->sc_dev.dv_flags & DVF_ACTIVE) == 0) { 329 sc_xfer->error = XS_DRIVER_STUFFUP; 330 scsipi_done(sc_xfer); 331 return; 332 } 333 334 xfer = wdc_get_xfer(WDC_NOSLEEP); 335 if (xfer == NULL) { 336 sc_xfer->error = XS_RESOURCE_SHORTAGE; 337 scsipi_done(sc_xfer); 338 return; 339 } 340 341 if (sc_xfer->xs_control & XS_CTL_POLL) 342 xfer->c_flags |= C_POLL; 343 if ((wdc->channels[channel]->ch_drive[drive].drive_flags & 344 (DRIVE_DMA | DRIVE_UDMA)) && sc_xfer->datalen > 0) 345 xfer->c_flags |= C_DMA; 346 xfer->c_drive = drive; 347 xfer->c_flags |= C_ATAPI; 348 if (sc_xfer->cmd->opcode == GPCMD_REPORT_KEY || 349 sc_xfer->cmd->opcode == GPCMD_SEND_KEY || 350 sc_xfer->cmd->opcode == GPCMD_READ_DVD_STRUCTURE) { 351 /* 352 * DVD authentication commands must always be done in 353 * PIO mode. 354 */ 355 xfer->c_flags &= ~C_DMA; 356 } 357 /* 358 * DMA can't deal with transfers which are not a multiple of 359 * 2 bytes. It's a bug to request such transfers for ATAPI 360 * but as the request can come from userland, we have to 361 * protect against it. 362 * Also some devices seems to not handle DMA xfers of less than 363 * 4 bytes. 364 */ 365 if (sc_xfer->datalen < 4 || (sc_xfer->datalen & 0x01)) 366 xfer->c_flags &= ~C_DMA; 367 368 xfer->c_cmd = sc_xfer; 369 xfer->c_databuf = sc_xfer->data; 370 xfer->c_bcount = sc_xfer->datalen; 371 xfer->c_start = wdc_atapi_start; 372 xfer->c_intr = wdc_atapi_intr; 373 xfer->c_kill_xfer = wdc_atapi_kill_xfer; 374 xfer->c_dscpoll = 0; 375 s = splbio(); 376 wdc_exec_xfer(wdc->channels[channel], xfer); 377 #ifdef DIAGNOSTIC 378 if ((sc_xfer->xs_control & XS_CTL_POLL) != 0 && 379 (sc_xfer->xs_status & XS_STS_DONE) == 0) 380 panic("wdc_atapi_scsipi_request: polled command " 381 "not done"); 382 #endif 383 splx(s); 384 return; 385 386 default: 387 /* Not supported, nothing to do. */ 388 ; 389 } 390 } 391 392 static void 393 wdc_atapi_start(struct wdc_channel *chp, struct ata_xfer *xfer) 394 { 395 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 396 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 397 int wait_flags = (sc_xfer->xs_control & XS_CTL_POLL) ? AT_POLL : 0; 398 char *errstring; 399 400 WDCDEBUG_PRINT(("wdc_atapi_start %s:%d:%d, scsi flags 0x%x \n", 401 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive, 402 sc_xfer->xs_control), DEBUG_XFERS); 403 if ((xfer->c_flags & C_DMA) && (drvp->n_xfers <= NXFER)) 404 drvp->n_xfers++; 405 /* Do control operations specially. */ 406 if (__predict_false(drvp->state < READY)) { 407 /* If it's not a polled command, we need the kenrel thread */ 408 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0 && 409 (chp->ch_flags & WDCF_TH_RUN) == 0) { 410 chp->ch_queue->queue_freeze++; 411 wakeup(&chp->thread); 412 return; 413 } 414 /* 415 * disable interrupts, all commands here should be quick 416 * enouth to be able to poll, and we don't go here that often 417 */ 418 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 419 WDCTL_4BIT | WDCTL_IDS); 420 if (chp->wdc->cap & WDC_CAPABILITY_SELECT) 421 chp->wdc->select(chp, xfer->c_drive); 422 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 423 WDSD_IBM | (xfer->c_drive << 4)); 424 /* Don't try to set mode if controller can't be adjusted */ 425 if ((chp->wdc->cap & WDC_CAPABILITY_MODE) == 0) 426 goto ready; 427 /* Also don't try if the drive didn't report its mode */ 428 if ((drvp->drive_flags & DRIVE_MODE) == 0) 429 goto ready; 430 errstring = "unbusy"; 431 if (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags)) 432 goto timeout; 433 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 434 0x08 | drvp->PIO_mode, WDSF_SET_MODE); 435 errstring = "piomode"; 436 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 437 goto timeout; 438 if (chp->ch_status & WDCS_ERR) { 439 if (chp->ch_error == WDCE_ABRT) { 440 /* 441 * some ATAPI drives rejects pio settings. 442 * all we can do here is fall back to PIO 0 443 */ 444 drvp->drive_flags &= ~DRIVE_MODE; 445 drvp->drive_flags &= ~(DRIVE_DMA|DRIVE_UDMA); 446 drvp->PIO_mode = 0; 447 drvp->DMA_mode = 0; 448 printf("%s:%d:%d: pio setting rejected, " 449 "falling back to PIO mode 0\n", 450 chp->wdc->sc_dev.dv_xname, 451 chp->channel, xfer->c_drive); 452 chp->wdc->set_modes(chp); 453 goto ready; 454 } 455 goto error; 456 } 457 if (drvp->drive_flags & DRIVE_UDMA) { 458 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 459 0x40 | drvp->UDMA_mode, WDSF_SET_MODE); 460 } else if (drvp->drive_flags & DRIVE_DMA) { 461 wdccommand(chp, drvp->drive, SET_FEATURES, 0, 0, 0, 462 0x20 | drvp->DMA_mode, WDSF_SET_MODE); 463 } else { 464 goto ready; 465 } 466 errstring = "dmamode"; 467 if (wdc_wait_for_unbusy(chp, ATAPI_MODE_DELAY, wait_flags)) 468 goto timeout; 469 if (chp->ch_status & WDCS_ERR) 470 goto error; 471 ready: 472 drvp->state = READY; 473 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, 474 WDCTL_4BIT); 475 } 476 /* start timeout machinery */ 477 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) 478 callout_reset(&chp->ch_callout, mstohz(sc_xfer->timeout), 479 wdctimeout, chp); 480 481 if (chp->wdc->cap & WDC_CAPABILITY_SELECT) 482 chp->wdc->select(chp, xfer->c_drive); 483 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 484 WDSD_IBM | (xfer->c_drive << 4)); 485 switch (wdc_wait_for_unbusy(chp, ATAPI_DELAY, wait_flags) < 0) { 486 case WDCWAIT_OK: 487 break; 488 case WDCWAIT_TOUT: 489 printf("wdc_atapi_start: not ready, st = %02x\n", 490 chp->ch_status); 491 sc_xfer->error = XS_TIMEOUT; 492 wdc_atapi_reset(chp, xfer); 493 return; 494 case WDCWAIT_THR: 495 return; 496 } 497 498 /* 499 * Even with WDCS_ERR, the device should accept a command packet 500 * Limit length to what can be stuffed into the cylinder register 501 * (16 bits). Some CD-ROMs seem to interpret '0' as 65536, 502 * but not all devices do that and it's not obvious from the 503 * ATAPI spec that that behaviour should be expected. If more 504 * data is necessary, multiple data transfer phases will be done. 505 */ 506 507 wdccommand(chp, xfer->c_drive, ATAPI_PKT_CMD, 508 xfer->c_bcount <= 0xffff ? xfer->c_bcount : 0xffff, 509 0, 0, 0, 510 (xfer->c_flags & C_DMA) ? ATAPI_PKT_CMD_FTRE_DMA : 0); 511 512 /* 513 * If there is no interrupt for CMD input, busy-wait for it (done in 514 * the interrupt routine. If it is a polled command, call the interrupt 515 * routine until command is done. 516 */ 517 if ((sc_xfer->xs_periph->periph_cap & ATAPI_CFG_DRQ_MASK) != 518 ATAPI_CFG_IRQ_DRQ || (sc_xfer->xs_control & XS_CTL_POLL)) { 519 /* Wait for at last 400ns for status bit to be valid */ 520 DELAY(1); 521 if (chp->ch_flags & WDCF_DMA_WAIT) { 522 wdc_dmawait(chp, xfer, sc_xfer->timeout); 523 chp->ch_flags &= ~WDCF_DMA_WAIT; 524 } 525 wdc_atapi_intr(chp, xfer, 0); 526 } else { 527 chp->ch_flags |= WDCF_IRQ_WAIT; 528 } 529 if (sc_xfer->xs_control & XS_CTL_POLL) { 530 while ((sc_xfer->xs_status & XS_STS_DONE) == 0) { 531 /* Wait for at last 400ns for status bit to be valid */ 532 DELAY(1); 533 wdc_atapi_intr(chp, xfer, 0); 534 } 535 } 536 return; 537 timeout: 538 printf("%s:%d:%d: %s timed out\n", 539 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive, errstring); 540 sc_xfer->error = XS_TIMEOUT; 541 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 542 wdc_atapi_reset(chp, xfer); 543 return; 544 error: 545 printf("%s:%d:%d: %s ", 546 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive, 547 errstring); 548 printf("error (0x%x)\n", chp->ch_error); 549 sc_xfer->error = XS_SHORTSENSE; 550 sc_xfer->sense.atapi_sense = chp->ch_error; 551 bus_space_write_1(chp->ctl_iot, chp->ctl_ioh, wd_aux_ctlr, WDCTL_4BIT); 552 wdc_atapi_reset(chp, xfer); 553 return; 554 } 555 556 static int 557 wdc_atapi_intr(struct wdc_channel *chp, struct ata_xfer *xfer, int irq) 558 { 559 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 560 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 561 int len, phase, i, retries=0; 562 int ire; 563 int dma_flags = 0; 564 void *cmd; 565 566 WDCDEBUG_PRINT(("wdc_atapi_intr %s:%d:%d\n", 567 chp->wdc->sc_dev.dv_xname, chp->channel, drvp->drive), DEBUG_INTR); 568 569 /* Is it not a transfer, but a control operation? */ 570 if (drvp->state < READY) { 571 printf("%s:%d:%d: bad state %d in wdc_atapi_intr\n", 572 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive, 573 drvp->state); 574 panic("wdc_atapi_intr: bad state"); 575 } 576 /* 577 * If we missed an interrupt in a PIO transfer, reset and restart. 578 * Don't try to continue transfer, we may have missed cycles. 579 */ 580 if ((xfer->c_flags & (C_TIMEOU | C_DMA)) == C_TIMEOU) { 581 sc_xfer->error = XS_TIMEOUT; 582 wdc_atapi_reset(chp, xfer); 583 return 1; 584 } 585 586 /* Ack interrupt done in wdc_wait_for_unbusy */ 587 if (chp->wdc->cap & WDC_CAPABILITY_SELECT) 588 chp->wdc->select(chp, xfer->c_drive); 589 bus_space_write_1(chp->cmd_iot, chp->cmd_iohs[wd_sdh], 0, 590 WDSD_IBM | (xfer->c_drive << 4)); 591 if (wdc_wait_for_unbusy(chp, 592 (irq == 0) ? sc_xfer->timeout : 0, AT_POLL) == WDCWAIT_TOUT) { 593 if (irq && (xfer->c_flags & C_TIMEOU) == 0) 594 return 0; /* IRQ was not for us */ 595 printf("%s:%d:%d: device timeout, c_bcount=%d, c_skip=%d\n", 596 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive, 597 xfer->c_bcount, xfer->c_skip); 598 if (xfer->c_flags & C_DMA) { 599 ata_dmaerr(drvp, 600 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 601 } 602 sc_xfer->error = XS_TIMEOUT; 603 wdc_atapi_reset(chp, xfer); 604 return 1; 605 } 606 if (chp->wdc->cap & WDC_CAPABILITY_IRQACK) 607 chp->wdc->irqack(chp); 608 609 /* 610 * If we missed an IRQ and were using DMA, flag it as a DMA error 611 * and reset device. 612 */ 613 if ((xfer->c_flags & C_TIMEOU) && (xfer->c_flags & C_DMA)) { 614 ata_dmaerr(drvp, (xfer->c_flags & C_POLL) ? AT_POLL : 0); 615 sc_xfer->error = XS_RESET; 616 wdc_atapi_reset(chp, xfer); 617 return (1); 618 } 619 /* 620 * if the request sense command was aborted, report the short sense 621 * previously recorded, else continue normal processing 622 */ 623 624 if (xfer->c_flags & C_DMA) 625 dma_flags = (sc_xfer->xs_control & XS_CTL_DATA_IN) 626 ? WDC_DMA_READ : 0; 627 again: 628 len = bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_cyl_lo], 0) + 629 256 * bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_cyl_hi], 0); 630 ire = bus_space_read_1(chp->cmd_iot, chp->cmd_iohs[wd_ireason], 0); 631 phase = (ire & (WDCI_CMD | WDCI_IN)) | (chp->ch_status & WDCS_DRQ); 632 WDCDEBUG_PRINT(("wdc_atapi_intr: c_bcount %d len %d st 0x%x err 0x%x " 633 "ire 0x%x :", xfer->c_bcount, 634 len, chp->ch_status, chp->ch_error, ire), DEBUG_INTR); 635 636 switch (phase) { 637 case PHASE_CMDOUT: 638 cmd = sc_xfer->cmd; 639 WDCDEBUG_PRINT(("PHASE_CMDOUT\n"), DEBUG_INTR); 640 /* Init the DMA channel if necessary */ 641 if (xfer->c_flags & C_DMA) { 642 if ((*chp->wdc->dma_init)(chp->wdc->dma_arg, 643 chp->channel, xfer->c_drive, 644 xfer->c_databuf, xfer->c_bcount, dma_flags) != 0) { 645 sc_xfer->error = XS_DRIVER_STUFFUP; 646 break; 647 } 648 } 649 /* send packet command */ 650 /* Commands are 12 or 16 bytes long. It's 32-bit aligned */ 651 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 652 if (drvp->drive_flags & DRIVE_CAP32) 653 bus_space_write_multi_4(chp->data32iot, 654 chp->data32ioh, 0, (u_int32_t *)cmd, 655 sc_xfer->cmdlen >> 2); 656 else 657 bus_space_write_multi_2(chp->cmd_iot, 658 chp->cmd_iohs[wd_data], 0, (u_int16_t *)cmd, 659 sc_xfer->cmdlen >> 1); 660 } else { 661 if (drvp->drive_flags & DRIVE_CAP32) 662 bus_space_write_multi_stream_4(chp->data32iot, 663 chp->data32ioh, 0, (u_int32_t *)cmd, 664 sc_xfer->cmdlen >> 2); 665 else 666 bus_space_write_multi_stream_2(chp->cmd_iot, 667 chp->cmd_iohs[wd_data], 0, (u_int16_t *)cmd, 668 sc_xfer->cmdlen >> 1); 669 } 670 /* Start the DMA channel if necessary */ 671 if (xfer->c_flags & C_DMA) { 672 (*chp->wdc->dma_start)(chp->wdc->dma_arg, 673 chp->channel, xfer->c_drive); 674 chp->ch_flags |= WDCF_DMA_WAIT; 675 } 676 677 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 678 chp->ch_flags |= WDCF_IRQ_WAIT; 679 } 680 return 1; 681 682 case PHASE_DATAOUT: 683 /* write data */ 684 WDCDEBUG_PRINT(("PHASE_DATAOUT\n"), DEBUG_INTR); 685 if ((sc_xfer->xs_control & XS_CTL_DATA_OUT) == 0 || 686 (xfer->c_flags & C_DMA) != 0) { 687 printf("wdc_atapi_intr: bad data phase DATAOUT\n"); 688 if (xfer->c_flags & C_DMA) { 689 ata_dmaerr(drvp, 690 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 691 } 692 sc_xfer->error = XS_TIMEOUT; 693 wdc_atapi_reset(chp, xfer); 694 return 1; 695 } 696 if (xfer->c_bcount < len) { 697 printf("wdc_atapi_intr: warning: write only " 698 "%d of %d requested bytes\n", xfer->c_bcount, len); 699 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 700 bus_space_write_multi_2(chp->cmd_iot, 701 chp->cmd_iohs[wd_data], 0, 702 (u_int16_t *)((char *)xfer->c_databuf + 703 xfer->c_skip), 704 xfer->c_bcount >> 1); 705 } else { 706 bus_space_write_multi_stream_2(chp->cmd_iot, 707 chp->cmd_iohs[wd_data], 0, 708 (u_int16_t *)((char *)xfer->c_databuf + 709 xfer->c_skip), 710 xfer->c_bcount >> 1); 711 } 712 for (i = xfer->c_bcount; i < len; i += 2) 713 bus_space_write_2(chp->cmd_iot, 714 chp->cmd_iohs[wd_data], 0, 0); 715 xfer->c_skip += xfer->c_bcount; 716 xfer->c_bcount = 0; 717 } else { 718 if (drvp->drive_flags & DRIVE_CAP32) { 719 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 720 bus_space_write_multi_4(chp->data32iot, 721 chp->data32ioh, 0, 722 (u_int32_t *)((char *)xfer->c_databuf + 723 xfer->c_skip), 724 len >> 2); 725 else 726 bus_space_write_multi_stream_4(chp->data32iot, 727 chp->data32ioh, wd_data, 728 (u_int32_t *)((char *)xfer->c_databuf + 729 xfer->c_skip), 730 len >> 2); 731 732 xfer->c_skip += len & 0xfffffffc; 733 xfer->c_bcount -= len & 0xfffffffc; 734 len = len & 0x03; 735 } 736 if (len > 0) { 737 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 738 bus_space_write_multi_2(chp->cmd_iot, 739 chp->cmd_iohs[wd_data], 0, 740 (u_int16_t *)((char *)xfer->c_databuf + 741 xfer->c_skip), 742 len >> 1); 743 else 744 bus_space_write_multi_stream_2(chp->cmd_iot, 745 chp->cmd_iohs[wd_data], 0, 746 (u_int16_t *)((char *)xfer->c_databuf + 747 xfer->c_skip), 748 len >> 1); 749 xfer->c_skip += len; 750 xfer->c_bcount -= len; 751 } 752 } 753 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 754 chp->ch_flags |= WDCF_IRQ_WAIT; 755 } 756 return 1; 757 758 case PHASE_DATAIN: 759 /* Read data */ 760 WDCDEBUG_PRINT(("PHASE_DATAIN\n"), DEBUG_INTR); 761 if ((sc_xfer->xs_control & XS_CTL_DATA_IN) == 0 || 762 (xfer->c_flags & C_DMA) != 0) { 763 printf("wdc_atapi_intr: bad data phase DATAIN\n"); 764 if (xfer->c_flags & C_DMA) { 765 ata_dmaerr(drvp, 766 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 767 } 768 sc_xfer->error = XS_TIMEOUT; 769 wdc_atapi_reset(chp, xfer); 770 return 1; 771 } 772 if (xfer->c_bcount < len) { 773 printf("wdc_atapi_intr: warning: reading only " 774 "%d of %d bytes\n", xfer->c_bcount, len); 775 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) { 776 bus_space_read_multi_2(chp->cmd_iot, 777 chp->cmd_iohs[wd_data], 0, 778 (u_int16_t *)((char *)xfer->c_databuf + 779 xfer->c_skip), 780 xfer->c_bcount >> 1); 781 } else { 782 bus_space_read_multi_stream_2(chp->cmd_iot, 783 chp->cmd_iohs[wd_data], 0, 784 (u_int16_t *)((char *)xfer->c_databuf + 785 xfer->c_skip), 786 xfer->c_bcount >> 1); 787 } 788 wdcbit_bucket(chp, len - xfer->c_bcount); 789 xfer->c_skip += xfer->c_bcount; 790 xfer->c_bcount = 0; 791 } else { 792 if (drvp->drive_flags & DRIVE_CAP32) { 793 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 794 bus_space_read_multi_4(chp->data32iot, 795 chp->data32ioh, 0, 796 (u_int32_t *)((char *)xfer->c_databuf + 797 xfer->c_skip), 798 len >> 2); 799 else 800 bus_space_read_multi_stream_4(chp->data32iot, 801 chp->data32ioh, wd_data, 802 (u_int32_t *)((char *)xfer->c_databuf + 803 xfer->c_skip), 804 len >> 2); 805 806 xfer->c_skip += len & 0xfffffffc; 807 xfer->c_bcount -= len & 0xfffffffc; 808 len = len & 0x03; 809 } 810 if (len > 0) { 811 if ((chp->wdc->cap & WDC_CAPABILITY_ATAPI_NOSTREAM)) 812 bus_space_read_multi_2(chp->cmd_iot, 813 chp->cmd_iohs[wd_data], 0, 814 (u_int16_t *)((char *)xfer->c_databuf + 815 xfer->c_skip), 816 len >> 1); 817 else 818 bus_space_read_multi_stream_2(chp->cmd_iot, 819 chp->cmd_iohs[wd_data], 0, 820 (u_int16_t *)((char *)xfer->c_databuf + 821 xfer->c_skip), 822 len >> 1); 823 xfer->c_skip += len; 824 xfer->c_bcount -=len; 825 } 826 } 827 if ((sc_xfer->xs_control & XS_CTL_POLL) == 0) { 828 chp->ch_flags |= WDCF_IRQ_WAIT; 829 } 830 return 1; 831 832 case PHASE_ABORTED: 833 case PHASE_COMPLETED: 834 WDCDEBUG_PRINT(("PHASE_COMPLETED\n"), DEBUG_INTR); 835 if (xfer->c_flags & C_DMA) { 836 xfer->c_bcount -= sc_xfer->datalen; 837 } 838 sc_xfer->resid = xfer->c_bcount; 839 wdc_atapi_phase_complete(xfer); 840 return(1); 841 842 default: 843 if (++retries<500) { 844 DELAY(100); 845 chp->ch_status = bus_space_read_1(chp->cmd_iot, 846 chp->cmd_iohs[wd_status], 0); 847 chp->ch_error = bus_space_read_1(chp->cmd_iot, 848 chp->cmd_iohs[wd_error], 0); 849 goto again; 850 } 851 printf("wdc_atapi_intr: unknown phase 0x%x\n", phase); 852 if (chp->ch_status & WDCS_ERR) { 853 sc_xfer->error = XS_SHORTSENSE; 854 sc_xfer->sense.atapi_sense = chp->ch_error; 855 } else { 856 if (xfer->c_flags & C_DMA) { 857 ata_dmaerr(drvp, 858 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 859 } 860 sc_xfer->error = XS_RESET; 861 wdc_atapi_reset(chp, xfer); 862 return (1); 863 } 864 } 865 WDCDEBUG_PRINT(("wdc_atapi_intr: wdc_atapi_done() (end), error 0x%x " 866 "sense 0x%x\n", sc_xfer->error, sc_xfer->sense.atapi_sense), 867 DEBUG_INTR); 868 wdc_atapi_done(chp, xfer); 869 return (1); 870 } 871 872 static void 873 wdc_atapi_phase_complete(struct ata_xfer *xfer) 874 { 875 struct wdc_channel *chp = xfer->c_chp; 876 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 877 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 878 879 /* wait for DSC if needed */ 880 if (drvp->drive_flags & DRIVE_ATAPIST) { 881 WDCDEBUG_PRINT(("wdc_atapi_phase_complete(%s:%d:%d) " 882 "polldsc %d\n", chp->wdc->sc_dev.dv_xname, chp->channel, 883 xfer->c_drive, xfer->c_dscpoll), DEBUG_XFERS); 884 #if 1 885 if (cold) 886 panic("wdc_atapi_phase_complete: cold"); 887 #endif 888 if (wdcwait(chp, WDCS_DSC, WDCS_DSC, 10, 889 AT_POLL) == WDCWAIT_TOUT) { 890 /* 10ms not enough, try again in 1 tick */ 891 if (xfer->c_dscpoll++ > 892 mstohz(sc_xfer->timeout)) { 893 printf("%s:%d:%d: wait_for_dsc " 894 "failed\n", 895 chp->wdc->sc_dev.dv_xname, 896 chp->channel, xfer->c_drive); 897 sc_xfer->error = XS_TIMEOUT; 898 wdc_atapi_reset(chp, xfer); 899 return; 900 } else 901 callout_reset(&chp->ch_callout, 1, 902 wdc_atapi_polldsc, xfer); 903 return; 904 } 905 } 906 907 /* 908 * Some drive occasionally set WDCS_ERR with 909 * "ATA illegal length indication" in the error 910 * register. If we read some data the sense is valid 911 * anyway, so don't report the error. 912 */ 913 if (chp->ch_status & WDCS_ERR && 914 ((sc_xfer->xs_control & XS_CTL_REQSENSE) == 0 || 915 sc_xfer->resid == sc_xfer->datalen)) { 916 /* save the short sense */ 917 sc_xfer->error = XS_SHORTSENSE; 918 sc_xfer->sense.atapi_sense = chp->ch_error; 919 if ((sc_xfer->xs_periph->periph_quirks & 920 PQUIRK_NOSENSE) == 0) { 921 /* ask scsipi to send a REQUEST_SENSE */ 922 sc_xfer->error = XS_BUSY; 923 sc_xfer->status = SCSI_CHECK; 924 } else if (chp->wdc->dma_status & 925 (WDC_DMAST_NOIRQ | WDC_DMAST_ERR)) { 926 ata_dmaerr(drvp, 927 (xfer->c_flags & C_POLL) ? AT_POLL : 0); 928 sc_xfer->error = XS_RESET; 929 wdc_atapi_reset(chp, xfer); 930 return; 931 } 932 } 933 if (xfer->c_bcount != 0) { 934 WDCDEBUG_PRINT(("wdc_atapi_intr: bcount value is " 935 "%d after io\n", xfer->c_bcount), DEBUG_XFERS); 936 } 937 #ifdef DIAGNOSTIC 938 if (xfer->c_bcount < 0) { 939 printf("wdc_atapi_intr warning: bcount value " 940 "is %d after io\n", xfer->c_bcount); 941 } 942 #endif 943 WDCDEBUG_PRINT(("wdc_atapi_phase_complete: wdc_atapi_done(), " 944 "error 0x%x sense 0x%x\n", sc_xfer->error, 945 sc_xfer->sense.atapi_sense), DEBUG_INTR); 946 wdc_atapi_done(chp, xfer); 947 } 948 949 static void 950 wdc_atapi_done(struct wdc_channel *chp, struct ata_xfer *xfer) 951 { 952 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 953 954 WDCDEBUG_PRINT(("wdc_atapi_done %s:%d:%d: flags 0x%x\n", 955 chp->wdc->sc_dev.dv_xname, chp->channel, xfer->c_drive, 956 (u_int)xfer->c_flags), DEBUG_XFERS); 957 callout_stop(&chp->ch_callout); 958 /* remove this command from xfer queue */ 959 wdc_free_xfer(chp, xfer); 960 961 WDCDEBUG_PRINT(("wdc_atapi_done: scsipi_done\n"), DEBUG_XFERS); 962 scsipi_done(sc_xfer); 963 WDCDEBUG_PRINT(("wdcstart from wdc_atapi_done, flags 0x%x\n", 964 chp->ch_flags), DEBUG_XFERS); 965 wdcstart(chp); 966 } 967 968 static void 969 wdc_atapi_reset(struct wdc_channel *chp, struct ata_xfer *xfer) 970 { 971 struct ata_drive_datas *drvp = &chp->ch_drive[xfer->c_drive]; 972 struct scsipi_xfer *sc_xfer = xfer->c_cmd; 973 974 wdccommandshort(chp, xfer->c_drive, ATAPI_SOFT_RESET); 975 drvp->state = 0; 976 if (wdc_wait_for_unbusy(chp, WDC_RESET_WAIT, AT_POLL) != 0) { 977 printf("%s:%d:%d: reset failed\n", 978 chp->wdc->sc_dev.dv_xname, chp->channel, 979 xfer->c_drive); 980 sc_xfer->error = XS_SELTIMEOUT; 981 } 982 wdc_atapi_done(chp, xfer); 983 return; 984 } 985 986 static void 987 wdc_atapi_polldsc(void *arg) 988 { 989 990 wdc_atapi_phase_complete(arg); 991 } 992
Indexes created Thu Sep 25 16:09:42 GMT 2025